Patents by Inventor Bo Qi
Bo Qi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220406594Abstract: Embodiments of the present disclosure generally relate to processes for forming silicon- and boron-containing films for use in, e.g., spacer-defined patterning applications. In an embodiment, a spacer-defined patterning process is provided. The process includes disposing a substrate in a processing volume of a processing chamber, the substrate having patterned features formed thereon, and flowing a first process gas into the processing volume, the first process gas comprising a silicon-containing species, the silicon-containing species having a higher molecular weight than SiH4. The process further includes flowing a second process gas into the processing volume, the second process gas comprising a boron-containing species, and depositing, under deposition conditions, a conformal film on the patterned features, the conformal film comprising silicon and boron.Type: ApplicationFiled: June 18, 2021Publication date: December 22, 2022Inventors: Aykut AYDIN, Rui CHENG, Karthik JANAKIRAMAN, Abhijit B. MALLICK, Takehito KOSHIZAWA, Bo QI
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Patent number: 11515170Abstract: Methods of etching film stacks to form gaps of uniform width are described. A film stack is etched through a hardmask. A conformal liner is deposited in the gap. The bottom of the liner is removed. The film stack is selectively etched relative to the liner. The liner is removed. The method may be repeated to a predetermined depth.Type: GrantFiled: December 30, 2020Date of Patent: November 29, 2022Assignee: APPLIED MATERIALS, INC.Inventors: Shishi Jiang, Pramit Manna, Bo Qi, Abhijit Basu Mallick, Rui Cheng, Tomohiko Kitajima, Harry S. Whitesell, Huiyuan Wang
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Patent number: 11495454Abstract: Examples of the present technology include semiconductor processing methods to form boron-containing materials on substrates. Exemplary processing methods may include delivering a deposition precursor that includes a boron-containing precursor to a processing region of a semiconductor processing chamber. A plasma may be formed from the deposition precursor within the processing region of the semiconductor processing chamber. The methods may further include depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber, where the substrate is characterized by a temperature of less than or about 50° C. The as-deposited boron-containing material may be characterized by a surface roughness of less than or about 2 nm, and a stress level of less-than or about ?500 MPa. In some embodiments, a layer of the boron-containing material may function as a hardmask.Type: GrantFiled: August 7, 2020Date of Patent: November 8, 2022Assignee: Applied Materials, Inc.Inventors: Huiyuan Wang, Rick Kustra, Bo Qi, Abhijit Basu Mallick, Kaushik Alayavalli, Jay D. Pinson
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Publication number: 20220351982Abstract: Embodiments of the present disclosure generally relate to fabricating electronic devices, such as memory devices. In one or more embodiments, a method for forming a device includes forming a film stack on a substrate, where the film stack contains a plurality of alternating layers of oxide layers and nitride layers and has a stack thickness, and etching the film stack to a first depth to form a plurality of openings between a plurality of structures. The method includes depositing an etch protection liner containing amorphous-silicon on the sidewalls and the bottoms of the structures, removing the etch protection liner from at least the bottoms of the openings, forming a plurality of holes by etching the film stack in the openings to further extend each bottom of the openings to a second depth of the hole, and removing the etch protection liner from the sidewalls.Type: ApplicationFiled: April 30, 2021Publication date: November 3, 2022Inventors: Zeqing SHEN, Bo QI, Abhijit B. MALLICK
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Publication number: 20220336212Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor and a carbon-containing precursor to a processing region of a semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include providing a boron-containing precursor to the processing region of the semiconductor processing chamber. The methods may include thermally reacting the silicon-containing precursor, the carbon-containing precursor, and the boron-containing precursor at a temperature above about 250° C. The methods may include forming a silicon-and-carbon-containing layer on the substrate.Type: ApplicationFiled: April 20, 2021Publication date: October 20, 2022Applicant: Applied Materials, Inc.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick
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Publication number: 20220319841Abstract: Examples of the present technology include semiconductor processing methods that provide a substrate in a substrate processing region of a substrate processing chamber, where the substrate is maintained at a temperature less than or about 50° C. A plasma may be generated from the hydrocarbon-containing precursor, and a carbon-containing material may be deposited from the plasma on the substrate. The carbon-containing material may include diamond-like-carbon, and may have greater than or about 60% of the carbon atoms with sp3 hybridized bonds.Type: ApplicationFiled: June 23, 2022Publication date: October 6, 2022Applicant: Applied Materials, Inc.Inventors: Huiyuan Wang, Rick Kustra, Bo Qi, Abhijit Basu Mallick, Kaushik Alayavalli, Jay D. Pinson
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Publication number: 20220310288Abstract: A post insulator includes an insulating post including a first end and a second end that are opposite to each other, a high-voltage-end grading ring connected to the first end of the insulating post, the high-voltage-end grading ring being insulated from the insulating post, a grounding-end grading ring connected to the second end of the insulating post, the grounding-end grading ring being insulated from the insulating post, and a charge control ring disposed on an outer surface of the insulating post, the charge control ring being insulated from the insulating post, and the charge control ring being configured to accumulate surface charges.Type: ApplicationFiled: October 14, 2020Publication date: September 29, 2022Applicants: STATE GRID CORPORATION OF CHINA, SINOMA ADVANCED MATERIALS CO., LTD., NORTH CHINA ELECTRIC POWER UNIVERSITY, SINOMA JIANGXI INSULATOR AND ELECTRICITY CO., LTD.Inventors: Licheng LU, Faqiang YAN, Bo QI, Zhiyi CHONG, Chengrong LI, Zhijun GUO, Xiao YANG, Yanxia DING
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Patent number: 11404263Abstract: Examples of the present technology include semiconductor processing methods that provide a substrate in a substrate processing region of a substrate processing chamber, where the substrate is maintained at a temperature less than or about 50° C. An inert precursor and a hydrocarbon-containing precursor may be flowed into the substrate processing region of the substrate processing chamber, where a flow rate ratio of the inert precursor to the hydrocarbon-containing precursor may be greater than or about 10:1. A plasma may be generated from the inert precursor and the hydrocarbon-containing precursor, and a carbon-containing material may be deposited from the plasma on the substrate. The carbon-containing material may include diamond-like-carbon, and may have greater than or about 60% of the carbon atoms with sp3 hybridized bonds.Type: GrantFiled: August 7, 2020Date of Patent: August 2, 2022Assignee: Applied Materials, Inc.Inventors: Huiyuan Wang, Rick Kustra, Bo Qi, Abhijit Basu Mallick, Kaushik Alayavalli, Jay D. Pinson
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Publication number: 20220223409Abstract: Exemplary methods of semiconductor processing may include providing a boron-and-carbon-and-nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include generating a capacitively-coupled plasma of the boron-and-carbon-and-nitrogen-containing precursor. The methods may include forming a boron-and-carbon-and-nitrogen-containing layer on the substrate. The boron-and-carbon-and-nitrogen-containing layer may be characterized by a dielectric constant below or about 3.5.Type: ApplicationFiled: January 8, 2021Publication date: July 14, 2022Applicant: Applied Materials, Inc.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
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Publication number: 20220186365Abstract: Methods for forming coating films comprising germanium oxide are disclosed. In some embodiments, the films are super-conformal to a feature on the surface of a substrate. The films are deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the super-conformal film.Type: ApplicationFiled: December 11, 2020Publication date: June 16, 2022Applicant: Applied Materials, Inc.Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick
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Publication number: 20220189824Abstract: Methods for forming defect-free gap fill materials comprising germanium oxide are disclosed. In some embodiments, the gap fill material is deposited by exposing a substrate surface to a germane precursor and an oxidant simultaneously. The germane precursor may be flowed intermittently. The substrate may also be exposed to a second oxidant to increase the relative concentration of oxygen within the gap fill material.Type: ApplicationFiled: December 11, 2020Publication date: June 16, 2022Applicant: Applied Materials, Inc.Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick
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Patent number: 11355354Abstract: Exemplary methods of semiconductor processing may include providing a silicon-containing precursor and an oxygen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The methods may include providing a carbon-containing precursor to the processing region of the semiconductor processing chamber. The carbon-containing precursor may be characterized by a carbon-carbon double bond or a carbon-carbon triple bond. The methods may include thermally reacting the silicon-containing precursor, the oxygen-containing precursor, and the carbon-containing precursor at a temperature below about 650° C. The methods may include forming a silicon-and-oxygen-and-carbon-containing layer on the substrate.Type: GrantFiled: January 25, 2021Date of Patent: June 7, 2022Assignee: Applied Materials, Inc.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
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Publication number: 20220127718Abstract: Methods for filling a substrate feature with a carbon gap fill, while leaving a void, are described. Methods comprise flowing a process gas into a high density plasma chemical vapor deposition (HDP-CVD) chamber, the chamber housing a substrate having at least one feature, the process gas comprising a hydrocarbon reactant, generating a plasma, and depositing a carbon film.Type: ApplicationFiled: October 26, 2020Publication date: April 28, 2022Applicant: Applied Materials, Inc.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick
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Publication number: 20220130658Abstract: Methods for depositing a silicon-containing film on a substrate are described. The method comprises heating a processing chamber to a temperature greater than or equal to 200° C.; maintaining the processing chamber at a pressure of less than or equal to 300 Torr; coflowing a silicon precursor and nitrous oxide (N2O) into the processing chamber, and depositing a conformal silicon-containing film on the substrate. The silicon-containing film has dielectric constant (k-value) in a range of from about 3.8 to about 4.0, has a breakdown voltage of greater than 8 MV/cm at a leakage current of 1 mA/cm2 and has a leakage current of less than 1 nA/cm2 at 2 MV/cm.Type: ApplicationFiled: October 23, 2020Publication date: April 28, 2022Applicant: Applied Materials, Inc.Inventors: Zeqing Shen, Bo Qi, Abhijit Basu Mallick
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Publication number: 20220093390Abstract: Exemplary deposition methods may include delivering a silicon-containing precursor and a boron-containing precursor to a processing region of a semiconductor processing chamber. The methods may include delivering a dopant-containing precursor with the silicon-containing precursor and the boron-containing precursor. The dopant-containing precursor may include one or more of carbon, nitrogen, oxygen, or sulfur. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a silicon-and-boron material on a substrate disposed within the processing region of the semiconductor processing chamber. The silicon-and-boron material may include greater than or about 1 at. % of a dopant from the dopant-containing precursor.Type: ApplicationFiled: September 18, 2020Publication date: March 24, 2022Applicant: Applied Materials, Inc.Inventors: Aykut Aydin, Rui Cheng, Yi Yang, Krishna Nittala, Karthik Janakiraman, Bo Qi, Abhijit Basu Mallick
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Patent number: 11281441Abstract: Compiling source code objects to improve efficiency of compiling is described herein. The compiling includes determining, by a compiler, an object type of a to-be-compiled object in source code. A counter is set for the to-be-compiled object. When the object type of the to-be-compiled object is an object type that can be operated by only one thread at one moment, the compiler sets a counter counting rule for the counter of the to-be-compiled object.Type: GrantFiled: September 21, 2020Date of Patent: March 22, 2022Assignee: Huawei Technologies Co., Ltd.Inventors: Brice Adam Dobry, Haichuan Wang, Shiqiang Cui, Bo Qi
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Patent number: 11276573Abstract: An exemplary method may include delivering a boron-containing precursor to a processing region of a semiconductor processing chamber. The method may also include forming a plasma within the processing region of the semiconductor processing chamber from the boron-containing precursor. The method may further include depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber. The boron-containing material may include greater than 50% of boron. In some embodiments, the boron-containing material may include substantially all boron. In some embodiments, the method may further include delivering at least one of a germanium-containing precursor, an oxygen-containing precursor, a silicon-containing precursor, a phosphorus-containing precursor, a carbon-containing precursor, and/or a nitrogen-containing precursor to the processing region of the semiconductor processing chamber.Type: GrantFiled: December 4, 2019Date of Patent: March 15, 2022Assignee: Applied Materials, Inc.Inventors: Bo Qi, Zeqing Shen, Abhijit Mallick
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Publication number: 20220068640Abstract: Examples of the present technology include semiconductor processing methods to form diffusion barriers for germanium in a semiconductor structure. The methods may include forming a semiconductor layer stack from pairs of Si-and-SiGe layers. The Si-and-SiGe layer pairs may be formed by forming a silicon layer, and then forming the germanium barrier layer of the silicon layer. In some embodiments, the germanium-barrier layer may be less than or about 20 ?. A silicon-germanium layer may be formed on the germanium-barrier layer to complete the formation of the Si-and-SiGe layer pair. In some embodiments, the silicon layer may be an amorphous silicon layer, and the SiGe layer may be characterized by greater than or about 5 atom % germanium. Examples of the present technology also include semiconductor structures that include a silicon-germanium layer, a germanium-barrier layer, and a silicon layer.Type: ApplicationFiled: August 27, 2020Publication date: March 3, 2022Applicant: Applied Materials, Inc.Inventors: Huiyuan Wang, Susmit Singha Roy, Takehito Koshizawa, Bo Qi, Abhijit Basu Mallick, Nitin K. Ingle
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Publication number: 20220044926Abstract: Examples of the present technology include semiconductor processing methods that provide a substrate in a substrate processing region of a substrate processing chamber, where the substrate is maintained at a temperature less than or about 50° C. An inert precursor and a hydrocarbon-containing precursor may be flowed into the substrate processing region of the substrate processing chamber, where a flow rate ratio of the inert precursor to the hydrocarbon-containing precursor may be greater than or about 10:1. A plasma may be generated from the inert precursor and the hydrocarbon-containing precursor, and a carbon-containing material may be deposited from the plasma on the substrate. The carbon-containing material may include diamond-like-carbon, and may have greater than or about 60% of the carbon atoms with sp3 hybridized bonds.Type: ApplicationFiled: August 7, 2020Publication date: February 10, 2022Applicant: Applied Materials, Inc.Inventors: Huiyuan Wang, Rick Kustra, Bo Qi, Abhijit Basu Mallick, Kaushik Alayavalli, Jay D. Pinson
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Publication number: 20220044927Abstract: Examples of the present technology include semiconductor processing methods to form boron-containing materials on substrates. Exemplary processing methods may include delivering a deposition precursor that includes a boron-containing precursor to a processing region of a semiconductor processing chamber. A plasma may be formed from the deposition precursor within the processing region of the semiconductor processing chamber. The methods may further include depositing a boron-containing material on a substrate disposed within the processing region of the semiconductor processing chamber, where the substrate is characterized by a temperature of less than or about 50° C. The as-deposited boron-containing material may be characterized by a surface roughness of less than or about 2 nm, and a stress level of less-than or about ?500 MPa. In some embodiments, a layer of the boron-containing material may function as a hardmask.Type: ApplicationFiled: August 7, 2020Publication date: February 10, 2022Applicant: Applied Materials, Inc.Inventors: Huiyuan Wang, Rick Kustra, Bo Qi, Abhijit Basu Mallick, Kaushik Alayavalli, Jay D. Pinson