Abstract: According to various examples, a device is described. The device may include an interposer. The device may also include a plurality of first through-silicon-vias disposed in the interposer, wherein the plurality of first through-silicon-vias have a first diameter. The device may also include a plurality of second through-silicon-vias disposed in the interposer, wherein the plurality of second through-silicon-vias have a second diameter larger than the first via diameter. The device may also include a first recess in the interposer positioned at bottom ends of the plurality of second through-silicon-vias.

Abstract: A device including a package substrate and a heat spreader may be provided. The package substrate may include a first surface and an opposing second surface. The package substrate may include a recess extending from the first surface, and a cavity extending from the second surface to the recess. The heat spreader may include a first portion and a second portion arranged on the first portion.

Abstract: According to various examples, a device is described. The device may include a printed circuit board. The device may include a semiconductor package including an interposer with a molded portion, and one or more of semiconductor devices. The one or more semiconductor devices may have at least a first device coupled to the molded portion. The device may include a first connector coupled to the molded portion, and a second connector coupled to the printed circuit board, the first connector and the second connector configured to be connected with a cable for signal connection between the first device and the printed circuit board.

Abstract: According to various examples, a device is described. The device may include a stiffener member including a first step section and a second step section. The device may also include a plurality of vias extending from or through the stiffener member. The device may be coupled to a printed circuit board.

Abstract: According to the various aspects, a package substrate with a heterogeneous substrate core including a first core layer that is coextensive with the package substrate and extends through a first section and a second section of the substrate core, in which the first section is adjacent to and thicker than the second section. The first section having at least a second layer and/or a third layer to provide the difference in thickness with the second section.

Abstract: According to various examples, a device is described. The device may include a printed circuit board. The device may also include a first recess in the printed circuit board, wherein the first recess comprises a circular side surface and a bottom surface. The device may also include a first solder ball disposed in the first recess. The device may also include a first conductive wall positioned behind the circular side surface of the first recess, wherein the first conductive wall surrounds a side surface of the first solder ball.

Abstract: A device is provided, including a package substrate, a first interposer including a plurality of first vias extending through the first interposer, and a second interposer including a plurality of second vias extending through the second interposer. The first interposer and the second interposer may be arranged on the package substrate and may be spaced apart from each other.

Abstract: The present disclosure relates to a semiconductor package, that may include a package substrate, a base die arranged on and electrically coupled to the package substrate, and at least one power plane module arranged on the package substrate at a periphery of the base die. The power plane module may include a top surface and a bottom surface, and at least one vertical interleaving metal layer electrically coupled at the bottom surface to the package substrate. The semiconductor package may further include a semiconductor device including a first section disposed on the base die, and a second section disposed on the power plane module, wherein the second section of the semiconductor device may be electrically coupled to the at least one vertical interleaving metal layer at the top surface of the power plane module.

Abstract: Two conductive reference layers are embedded in a semiconductor package substrate. The embedded reference layers facilitate low electromagnetic noise coupling between adjacent signals for semiconductor device package.

Abstract: To maintain the integrity of electrical contacts at a build-up layer of a chip package, while reducing electrical interference caused by a chip connected to the build-up layer, the chip package can include a stiffener formed from an electrically conductive material and positioned between the chip and the build-up layer. The chip can electrically connect to the build-up layer through electrical connections that extend through the stiffener. Compared with a stiffener that extends only over a single chip of the chip package, the present stiffener can help prevent warpage or other mechanical deformities that can degrade electrical contacts away from the chip at the build-up layer. Compared with a stiffener that extends only over an area away from the chip, such as a peripheral area, the present stiffener can help reduce electrical interference in an area of the build-up layer near the chip.

Abstract: The present disclosure is directed to a hybrid dielectric interconnect stack for a printed circuit board having a first dielectric layer with a first dielectric constant and a first dielectric loss tangent positioned over an intermediate layer, which includes a first dielectric sublayer with a first sublayer dielectric constant and a first sublayer dielectric loss tangent, an embedded conductive layer, and a second dielectric sublayer with a second sublayer dielectric constant and a second sublayer dielectric loss tangent, in which the embedded conductive layer is positioned between the first and second dielectric sublayers, and a second dielectric layer with a second dielectric constant and a second dielectric loss tangent, in which the intermediate layer is positioned between the first and second dielectric layers.

Abstract: To overcome the problem of devices in a multi-chip package (MCP) interfering with one another, such as through electromagnetic interference (EMI) and/or radio-frequency interference (RFI), the chip package can include an electrically conductive stiffener that at least partially electrically shields the devices from one another. At least some of the devices can be positioned in respective recesses in the stiffener. In some examples, when the devices are positioned in the recesses, at least one device does not extend beyond a plane defined by a first side of the stiffener. Such shielding can help reduce interference between the devices. Because device-to-device electrical interference can be reduced, devices on the package can be positioned closer to one another, thereby reducing a size of the package. The devices can electrically connect to a substrate via electrical connections that extend through the stiffener.

Abstract: A semiconductor package may include a semiconductor device coupled to a package substrate. The semiconductor package may also include an integrated heat spreader coupled to the package substrate. The semiconductor package may further include a package connector mounted on the integrated heat spreader. According to various examples, a semiconductor system is also described. The semiconductor system may include a first semiconductor package. The first semiconductor package may include a first package connector, and a first integrated heat spreader. The first package connector may be mounted on the first integrated heat spreader. The semiconductor system may also include a second semiconductor package. The second semiconductor package may include a second package connector, and a second integrated heat spreader. The second package connector may be mounted on the second integrated heat spreader. The first package connector may be electrically connected to the second package connector.

Abstract: According to various examples, a stacked semiconductor package is described. The stacked semiconductor package may include a package substrate. The stacked semiconductor package may also include a base die disposed on and electrically coupled to the package substrate. The stacked semiconductor package may further include a mold portion disposed on the package substrate at a periphery of the base die, the mold portion may include a through-mold interconnect electrically coupled to the package substrate. The stacked semiconductor package may further include a semiconductor device having a first section disposed on the base die and a second section disposed on the mold portion, wherein the second section of the semiconductor device may be electrically coupled to the package substrate through the through-mold interconnect.

Abstract: Semiconductor packages, and methods for making the semiconductor packages, having an interposer structure with one or more interposer and an extension platform, which has an opening for placing the interposer, and the space between the interposer and the extension platform is filled with a polymeric material to form a unitary interposer-extension platform composite structure. A stacked structure may be formed by at least a first semiconductor chip coupled to the interposer and at least a second semiconductor chip coupled to the extension platform, and at least one bridge extending over the space that electrically couples the extension platform and the interposer. The extension platform may include a recess step section that may accommodate a plurality of passive devices to reduced power delivery inductance loop for the high-density 2.5D and 3D stacked packaging applications.

Abstract: The present disclosure relates to a semiconductor package that may include a substrate. The substrate may have a top surface and a bottom surface. The semiconductor package may include an opening in the substrate. The semiconductor package may include a bridge disposed in the opening. The bridge may have an upper end at the top surface of the substrate and a lower end at the bottom surface of the substrate. The semiconductor package may include a first die on the top surface of the substrate at least partially extending over a first portion of the upper end of the bridge. The semiconductor package may include a second die on the bottom surface of the substrate at least partially extending over the lower end of the bridge. The bridge may couple the first die to the second die.

Abstract: The present disclosure relates to a printed circuit board assembly including a first circuit board including a first footprint, the first circuit board further includes a plurality of first vertical vias extending between a first side and an opposing second side; a second circuit board including a second footprint smaller than the first footprint, the second circuit board further includes a plurality of second vertical vias extending between a subsequent first side and an opposing subsequent second side; an adhesive layer coupling the first side to the subsequent first side; and a plurality of third vertical vias extending through the first side and the subsequent first side.

Abstract: Two conductive reference layers are embedded in a semiconductor package substrate. The embedded reference layers facilitate low electromagnetic noise coupling between adjacent signals for semiconductor device package.

Abstract: According to various examples, a semiconductor package is described including a substrate raiser with interconnect vias that may be positioned on the bottom side of a substrate and mini solder balls positioned on the interconnect vias and a plurality of large solder balls positioned on the bottom side of the substrate adjacent to the substrate raiser, wherein the mini solder balls and the large solder balls extend approximately a same height from the substrate for mounting on a printed circuit board.

Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a first device and a second device coupled to a surface of a substrate, and a continuous flexible shield woven over the first device and under the second device to separate the first device from the second device. In selected examples, the continuous flexible shield may be formed from a laminate and one or more of the devices may be coupled through an opening or via in the continuous flexible shield.