Abstract: Provided is a method of operating a terminal. The method includes determining a profile item applicable to the profile view for the account based on an input received by the terminal and a coordinate indicating a position where the profile item is provided on the profile view. The method includes displaying the profile item on a screen of the terminal based on the determined profile item and the determined coordinate. The method includes receiving an input related to the profile item, and displaying a visual effect corresponding to the input on the screen.

Abstract: There is provided an apparatus for diagnosing whether or not an error has occurred in battery cells, the apparatus including a voltage measurement circuit for measuring a voltage of a battery cell, a data processing circuit for calculating a target statistical value indicating a state of the battery cell based on a voltage measured by the voltage measurement circuit, and calculates a cumulative statistical value, and a diagnosis circuit that determines whether or not an error has occurred in the battery cell through a cumulative determination operation of comparing the cumulative statistical value with a cumulative reference value, and counts a number of times of cumulative error when it is determined that the error has occurred in the battery cell in the cumulative determination operation.

Abstract: The present application relates to a peptide having protective activity against cell damage caused by particulate matter, and to uses for the peptide.

Abstract: The present invention relates to a DNA polymerase variant that belongs to family A, and to a use thereof. The present invention relates to: a DNA polymerase variant which easily undergoes polymerization when the base at the 3?-end of a primer is complementary to a template, and yet has inhibited polymerization when the base at the 3?-end of the primer is non-complementary to the template, and thus facilitates discrimination between the two cases; a PCR process using the variant; and a PCR kit comprising the variant. The present invention is useful for single nucleotide polymorphism analysis (SNP genotyping), somatic mutation detection, and the like.

Abstract: A power supply system may include a target device and an adapter. The target device may include an adapter connection switch that receives adapter recognition information to form a connection with the adapter, a voltage detection unit that receives an output voltage from an adapter, and a voltage-change-requesting unit that outputs a voltage to request a voltage change based on information on the output voltage from the adapter. The adapter may include a device information recognition unit that receives the voltage to request a voltage change, and an output-voltage-changing unit that changes the output voltage based on the voltage to request a voltage change.

Abstract: A power supply system may include a target device and an adapter. The target device may include an adapter connection switch that receives adapter recognition information to form a connection with the adapter, a voltage detection unit that receives an output voltage from an adapter, and a voltage-change-requesting unit that outputs a voltage to request a voltage change based on information on the output voltage from the adapter. The adapter may include a device information recognition unit that receives the voltage to request a voltage change, and an output-voltage-changing unit that changes the output voltage based on the voltage to request a voltage change.

Abstract: A power supply system may include a target device and an adapter. The target device may include an adapter connection switch that receives adapter recognition information to form a connection with the adapter, a voltage detection unit that receives an output voltage from an adapter, and a voltage-change-requesting unit that outputs a voltage to request a voltage change based on information on the output voltage from the adapter. The adapter may include a device information recognition unit that receives the voltage to request a voltage change, and an output-voltage-changing unit that changes the output voltage based on the voltage to request a voltage change.

Abstract: The present invention relates to a method and a kit for detecting alleles of which the specificity and sensitivity in a DNA polymerase chain reaction (PCR), which is widely used for the detection of minor alleles such as single nucleotide polymorphisms or somatic mutations, are increased. More specifically, the present invention relates to a PCR-based method and kit for single nucleotide polymorphism (SNP) genotyping and somatic mutation detection, the method and kit adding a partially or fully double-stranded oligonucleotide for increasing discrimination to a PCR solution for selective amplification of alleles, so that PCR amplification is not affected when a primer 3? terminal base is complementary (3?-matched) to a template but PCR amplification is strongly inhibited when a 3? terminal base is not complementary (3?-mismatched).

Abstract: A power supply system may include a target device and an adapter. The target device may include an adapter connection switch that receives adapter recognition information to form a connection with the adapter, a voltage detection unit that receives an output voltage from an adapter, and a voltage-change-requesting unit that outputs a voltage to request a voltage change based on information on the output voltage from the adapter. The adapter may include a device information recognition unit that receives the voltage to request a voltage change, and an output-voltage-changing unit that changes the output voltage based on the voltage to request a voltage change.

Abstract: Methods, systems, and devices are disclosed for implementing semiconductor memory using variable resistance elements for storing data. In one aspect, an electronic device is provided to comprise a semiconductor memory unit including: a substrate; an interlayer dielectric layer disposed over the substrate; and a variable resistance element including a seed layer formed over the interlayer dielectric layer, a first magnetic layer formed over the seed layer, a tunnel barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the tunnel barrier layer, wherein the seed layer includes a conductive material having a metallic property and an oxygen content of 1% to approximately 10%.

Abstract: Methods, systems, and devices are disclosed for implementing semiconductor memory using variable resistance elements for storing data. In one aspect, an electronic device is provided to comprise a semiconductor memory unit including: a substrate; an interlayer dielectric layer disposed over the substrate; and a variable resistance element including a seed layer formed over the interlayer dielectric layer, a first magnetic layer formed over the seed layer, a tunnel barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the tunnel barrier layer, wherein the seed layer includes a conductive material having a metallic property and an oxygen content of 1% to approximately 10%.

Abstract: An electronic device and a method for fabricating the same are provided. An electronic device according to an implementation of the disclosed technology is an electronic device including a semiconductor memory, wherein the semiconductor memory includes a magnetic tunnel junction (MTJ) structure including: a free layer having a changeable magnetization direction; a pinned layer having a pinned magnetization direction; and a tunnel barrier layer sandwiched between the free layer and the pinned layer, wherein the free layer includes a CoFeAlB alloy.

Abstract: Methods, systems, and devices are disclosed for implementing semiconductor memory using variable resistance elements for storing data. In one aspect, an electronic device is provided to comprise a semiconductor memory unit including: a substrate; an interlayer dielectric layer disposed over the substrate; and a variable resistance element including a seed layer formed over the interlayer dielectric layer, a first magnetic layer formed over the seed layer, a tunnel barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the tunnel barrier layer, wherein the seed layer includes a conductive material having a metallic property and an oxygen content of 1% to approximately 10%.

Abstract: Disclosed are an electronic device comprising a semiconductor memory. The semiconductor memory includes a variable resistance element including a free layer having a variable magnetization direction; a pinned layer having a fixed magnetization direction; and a tunnel barrier layer interposed between the free layer and the pinned layer, wherein the free layer includes: a first free layer adjacent to the tunnel barrier layer and having a perpendicular magnetic anisotropy at an interface with the tunnel barrier layer; and a second free layer spaced apart from the tunnel barrier layer by the first free layer and having a saturation magnetization lower than a saturation magnetization of the first free layer.

Abstract: Electronic devices and systems having semiconductor memory are provided. In one implementation, for example, an electronic device may include a substrate; an under layer disposed over the substrate and including conductive hafnium silicate; a free layer disposed over the under layer and having a variable magnetization direction; a tunnel barrier layer disposed over the free layer; and a pinned layer disposed over the tunnel barrier layer and having a pinned magnetization direction, and wherein the free layer includes: a first ferromagnetic material; a second ferromagnetic material having a coercive force smaller than that of the first ferromagnetic material; and an amorphous spacer interposed between the first ferromagnetic material and the second ferromagnetic material.

Abstract: An electronic device includes semiconductor memory, the semiconductor memory including an under layer; a first magnetic layer located over the under layer and having a variable magnetization direction; a tunnel barrier layer located over the first magnetic layer; and a second magnetic layer located over the tunnel barrier layer and having a pinned magnetization direction, wherein the under layer includes a first metal nitride layer having a NaCl crystal structure and a second metal nitride layer containing a light metal.

Abstract: Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: an under layer including first and second metal layers and a barrier layer having a dual phase structure of different crystal structures and interposed between the first and second metal layers; a first magnetic layer positioned over the under layer and having a variable magnetization direction; a tunnel barrier layer positioned over the first magnetic layer; and a second magnetic layer positioned over the tunnel barrier layer and having a pinned magnetization direction, and the under layer may further include a barrier layer having a dual phase structure between the first and second metal layers.

Abstract: An electronic device is provided to include a semiconductor memory that includes: a substrate including a first region and a second region different from the first region; an interlayer dielectric layer formed over the substrate; a first conductive pattern located over the first region and formed in the interlayer dielectric layer, the first conductive pattern including a planarized top surface with a top surface of the interlayer dielectric layer; a second conductive pattern located over the second region and formed in the interlayer dielectric layer, the second conductive pattern including at least a portion recessed below a top surface of the interlayer dielectric layer; a variable resistance pattern formed over the interlayer dielectric layer the variable resistance pattern having a bottom surface coupled to the first conductive pattern and exhibiting different resistance values; and a capping layer pattern formed over the variable resistance pattern.

Abstract: According to one embodiment, there is provided a magnetoresistive element, including a first magnetic layer, a nonmagnetic layer on the first magnetic layer, and a second magnetic layer on the nonmagnetic layer, wherein one of the first and second magnetic layers include one of Co and Fe, and a material having a higher standard electrode potential than Co and Fe.

Abstract: According to one embodiment, a magnetic memory includes a first magnetic layer, a second magnetic layer, a non-magnetic intermediate layer provided between the first magnetic layer and the second magnetic layer and an underlying layer provided on an opposite side of the first magnetic layer with respect to the intermediate layer, and the underlying layer contains AlN of a hcp structure.