Patents by Inventor Boon Bing NG
Boon Bing NG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210206164Abstract: A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component. A memory component stores memory values associated with the print component, and a control circuit, in response to a sequence of operating signals on the I/O pads representing a memory read, provides an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.Type: ApplicationFiled: July 31, 2019Publication date: July 8, 2021Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: James Michael GARDNER, Boon Bing NG
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Publication number: 20210162740Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes a fire line, a plurality of memory elements, a first switch, and a plurality of second switches. The first switch is electrically coupled between the fire line and a first side of each memory element of the plurality of memory elements. Each second switch is electrically coupled to a second side of a respective memory element of the plurality of memory elements.Type: ApplicationFiled: April 19, 2019Publication date: June 3, 2021Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventor: Boon Bing NG
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Publication number: 20210162739Abstract: An integrated circuit to drive a plurality of fluid actuation devices includes a plurality of first data lines, a second data line, a first memory element, and a second memory element. The first memory element is enabled in response to first data on the plurality of first data lines. The second memory element is enabled in response to second data on the second data line.Type: ApplicationFiled: April 19, 2019Publication date: June 3, 2021Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventor: Boon Bing NG
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Patent number: 10974515Abstract: The present subject matter relates to disposing memory banks and select register. In an example implementation, a plurality of memory banks is arranged to form a group of memory banks. Each memory bank includes a plurality of memory units. At least one select register generates a select signal to access the memory units in the plurality of memory banks. The at least one select register is disposed at an end of the group of memory banks.Type: GrantFiled: January 31, 2017Date of Patent: April 13, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: Boon Bing Ng, Noorashekin Binte Jamil
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Publication number: 20210094281Abstract: In some examples, a circuit for use with a fluid ejection device includes a plurality of decoders responsive to a common address to activate respective control signals at different times for selecting respective memories of the fluid ejection device. Each respective decoder of the plurality of decoders comprising a discharge switch to deactivate a control signal of the respective decoder while another decoder of the plurality of decoders is activating a control signal in response to the common address.Type: ApplicationFiled: July 6, 2017Publication date: April 1, 2021Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Boon Bing NG, Rui Pan, Mohan Kumar Sudhakar, Hang Ru Goy
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Publication number: 20210070057Abstract: The present subject matter relates to accessing memory units in a memory bank. In an example implementation, a bank select transistor is common to a plurality of memory units in a memory bank. The bank select transistor facilitates accessing a memory unit of the plurality of memory units based on a bank select signal.Type: ApplicationFiled: November 18, 2020Publication date: March 11, 2021Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Boon Bing Ng, Noorashekin Binte Jamil
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Patent number: 10913265Abstract: In some examples, a system includes a plurality of fluid ejection devices, a fluid ejection controller, and a plurality of data lines shared by the plurality of fluid ejection devices and connected between the fluid ejection controller and the plurality of fluid ejection devices. A first data line of the plurality of data lines communicates data of a first memory of a first fluid ejection device of the plurality of fluid ejection devices, and a second data line of the plurality of data lines communicates data of a second memory of the first fluid ejection device.Type: GrantFiled: July 6, 2017Date of Patent: February 9, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: Boon Bing Ng, Rui Pan, Mohan Kumar Sudhakar, Brendan Hall
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Patent number: 10889122Abstract: The present subject matter relates to accessing memory units in a memory bank. In an example implementation, a bank select transistor is common to a plurality of memory units in a memory bank. The bank select transistor facilitates accessing a memory unit of the plurality of memory units based on a bank select signal.Type: GrantFiled: January 31, 2017Date of Patent: January 12, 2021Assignee: Hewlett-Packard Development Company, L.P.Inventors: Boon Bing Ng, Noorashekin Binte Jamil
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Publication number: 20200406613Abstract: In some examples, a control apparatus for a fluid ejection device includes a plurality of selectors controllable by an input control signal to produce signals for selecting respective nozzles of the fluid ejection device, where a first selector is responsive to the input control signal propagated over a first signal path to turn on a device in the first selector, and a second selector is responsive to the input control signal to perform a different task. A memory encoder is to select a memory location in the memory, the memory encoder responsive to the input control signal propagated over a second signal path to turn on a device in the memory encoder, where signal loading of the second signal path is isolated from signal loading of the first signal path.Type: ApplicationFiled: September 10, 2020Publication date: December 31, 2020Inventors: Boon Bing Ng, Hang Ru Goy
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Patent number: 10800168Abstract: In some examples, a control apparatus for a fluid ejection device includes a plurality of selectors controllable by an input control signal to produce signals for selecting respective nozzles of the fluid ejection device, where a first selector is responsive to the input control signal propagated over a first signal path to turn on a device in the first selector, and a second selector is responsive to the input control signal to perform a different task. A memory encoder is to select a memory location in the memory, the memory encoder responsive to the input control signal propagated over a second signal path to turn on a device in the memory encoder, where signal loading of the second signal path is isolated from signal loading of the first signal path.Type: GrantFiled: October 6, 2016Date of Patent: October 13, 2020Assignee: Hewlett-Packard Development Company, L.P.Inventors: Boon Bing Ng, Hang Ru Goy
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Publication number: 20200130351Abstract: In some examples, a system includes a plurality of fluid ejection devices, a fluid ejection controller, and a plurality of data lines shared by the plurality of fluid ejection devices and connected between the fluid ejection controller and the plurality of fluid ejection devices. A first data line of the plurality of data lines communicates data of a first memory of a first fluid ejection device of the plurality of fluid ejection devices, and a second data line of the plurality of data lines communicates data of a second memory of the first fluid ejection device.Type: ApplicationFiled: July 6, 2017Publication date: April 30, 2020Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Boon Bing NG, Rui Pan, Mohan Kumar Sudhakar, Brendan Hall
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Patent number: 10636800Abstract: The present subject matter relates to an electrical programmable read only memory (EPROM) cell. The EPROM cell comprises a semiconductor substrate and a floating gate separated from the semiconductor substrate by a first dielectric layer. A control gate is capacitively coupled to the floating gate through a second dielectric layer disposed between the floating gate and the control gate. In an example, the EPROM cell further comprises a conductive gate connected to the floating gate, wherein the conductive gate is to leak charges from the floating gate in a predetermined leak time period.Type: GrantFiled: January 29, 2015Date of Patent: April 28, 2020Assignee: Hewlett-Packard Development Company, L.P.Inventors: Boon Bing Ng, Lui Cheat Thin, Reynaldo V Villavelez
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Patent number: 10556445Abstract: Examples of a printhead assembly comprising an Erasable Programmable Read-only Memory (EPROM) having a predefined number of banks, with EPROM cells arranged in rows and columns in each of the banks are described. In one example, the printhead assembly comprises a shift register to generate, in consecutive shift register cycles, a row select signal, column select signal, and bank select signal to select a row, column, and bank, respectively, corresponding to an EPROM cell. A row select signal bus, column select signal bus and bank select signal bus is included in the printhead assembly to provide the row select signal, column select signal, and bank select signal, respectively, to the EPROM cell during the respective shift register cycles.Type: GrantFiled: July 15, 2016Date of Patent: February 11, 2020Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Jerrin Pathrose Vareed, Boon Bing Ng
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Publication number: 20200031116Abstract: In some examples, a control apparatus for a fluid ejection device includes a plurality of selectors controllable by an input control signal to produce signals for selecting respective nozzles of the fluid ejection device, where a first selector is responsive to the input control signal propagated over a first signal path to turn on a device in the first selector, and a second selector is responsive to the input control signal to perform a different task. A memory encoder is to select a memory location in the memory, the memory encoder responsive to the input control signal propagated over a second signal path to turn on a device in the memory encoder, where signal loading of the second signal path is isolated from signal loading of the first signal path.Type: ApplicationFiled: October 6, 2016Publication date: January 30, 2020Inventors: Boon Bing Ng, Hang Ru Goy
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Patent number: 10532579Abstract: The present subject matter relates to printhead-integrated ink level sensor (PILS) system. In an example implementation, the PILS system includes a sense capacitor plate in a fluid sensing chamber to sense a level of fluid in the fluid sensing chamber. The fluid sensing chamber is in fluid communication with a fluid reservoir of the printhead to receive fluid from the fluid reservoir. The sense capacitor plate includes at least one slot. The PILS system further includes at least one central clearing resistor and at least one peripheral clearing resistor to clear the fluid sensing chamber of the fluid. The central clearing resistor is provided in the at least one slot of the sense capacitor plate. The at least one peripheral resistor is provided in the fluid sensing chamber surrounding the sense capacitor plate.Type: GrantFiled: November 10, 2015Date of Patent: January 14, 2020Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Boon Bing Ng, Patrick Leonard, Raymond Connolly
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Publication number: 20190381802Abstract: The present subject matter relates to disposing memory banks and select register. In an example implementation, a plurality of memory banks is arranged to form a group of memory banks. Each memory bank includes a plurality of memory units. At least one select register generates a select signal to access the memory units in the plurality of memory banks. The at least one select register is disposed at an end of the group of memory banks.Type: ApplicationFiled: January 31, 2017Publication date: December 19, 2019Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Boon Bing Ng, Noorashekin Binte Jamil
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Publication number: 20190366727Abstract: The present subject matter relates to accessing memory units in a memory bank. In an example implementation, a bank select transistor is common to a plurality of memory units in a memory bank. The bank select transistor facilitates accessing a memory unit of the plurality of memory units based on a bank select signal.Type: ApplicationFiled: January 31, 2017Publication date: December 5, 2019Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Boon Bing Ng, Noorashekin Binte Jamil
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Patent number: 10449776Abstract: A print head has a fluid slot and a sensing chamber having a first port connected to the fluid slot and a second port. The sensing chamber contains an ink level sensor. A circulation passage extends from the fluid slot and is fluidly coupled to the second port. A fluid pump circulates fluid through the circulation passage.Type: GrantFiled: September 8, 2018Date of Patent: October 22, 2019Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Alexander Govyadinov, Adam L. Ghozeil, Boon Bing Ng, Patrick Leonard, Raymond Connolly
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Patent number: 10403362Abstract: A split memory bank may comprise a number of memory matrices forming a memory bank and a shift register in which the shift register physically separates the matrices. An integrated circuit may comprise a number of shift registers and a plurality of memory matrices forming a memory bank in which the matrices are spatially separated by the shift register. An integrated printhead may comprise a number of memory banks each comprising a plurality of memory matrices and a number of shift registers in which each shift register spatially separates a number of the matrices.Type: GrantFiled: January 23, 2019Date of Patent: September 3, 2019Assignee: Hewlett-Packard Development Company, L.P.Inventors: Boon Bing Ng, Thida Ma Win, Ning Ge, Jose Jehrome Rando
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Patent number: 10384449Abstract: In an example implementation, a grounding structure includes a perimeter ground line around the perimeter of a printhead die, and having north, south, east, and west segments. The structure includes an inter-slot ground line extending from the north segment to the south segment between two fluid slots, and an alternative ground line extending from the east segment to the west segment and intersecting the inter-slot ground line in a connection area near ends of the fluid slots.Type: GrantFiled: March 2, 2018Date of Patent: August 20, 2019Assignee: Hewlett-Packard Development Company, L.P.Inventors: Boon Bing Ng, Thida Ma Win, Jose Jehrome Rando