Abstract: A Flash memory device, system, and data handling routine is detailed with a distributed erase block sector user/overhead data scheme that splits the user data and overhead data and stores them in differing associated erase blocks. The erase blocks of the Flash memory are arranged into associated erase block pairs in “super blocks” such that when user data is written to/read from the user data area of a sector of an erase block of the super block pair, the overhead data is written to/read from the overhead data area of a sector of the other associated erase block. This data splitting enhances fault tolerance and reliability of the Flash memory device.

Abstract: Methods and apparatus are provided. A method of operating a memory device includes detecting a programming failure at a first location of a memory array, preserving data within the memory device when the program failure is detected, programming a second location of the memory array with a first portion of the preserved data, programming a third location of the memory array with a second portion of the preserved data, and combining, at the second location of the memory array, the first portion of the preserved data programmed in the second location of the memory array with a third portion of the preserved data from the first location of the memory array.

Abstract: Improved memory devices, circuitry, and data methods are described that facilitate the detection and correction of data in memory systems or devices by encoding the data bits of a memory row or block in a non-systematic ECC code. This allows memory embodiments of the present invention to utilize reduced complexity error detection and correction hardware and/or routines to efficiently detect and correct corrupted user data in a segment of memory, such as a sector, word line row, or erase block. Additionally, in embodiments of the present invention user data is not stored in a plaintext format in the memory array, allowing for an increased level of data security. Further, in embodiments of the present invention, the ECC code is distributed throughout the stored data in the memory segment, increasing the robustness of the ECC code and its resistance to damage or data corruption.

Abstract: An improved Flash memory device with a distributed erase block management (EBM) scheme is detailed that enhances operation and helps minimize write fatigue of the floating gate memory cells of the Flash memory device. The Flash memory device of the invention combines the EBM data in a user data erase block by placing it in an EBM data field of the control data section of the erase block sectors. Therefore distributing the EBM data within the Flash memory erase block structure. This allows the Flash memory to update and/or erase the user data and the EBM data in a single operation, to reduce overhead and speed operation. The Flash memory also reduces the process of EBM data structure write fatigue by allowing the EBM data fields to be load leveled by rotating them with the erase blocks they describe.

Abstract: Improved memory devices, circuitry, and data methods are described that facilitate the detection and correction of data in memory systems or devices in combination with a stored record of known flaws, errors, or questionable data bits of a read memory row or block to allow for more efficient processing and correction of these errors. An embodiment of the present invention utilizes an erasure pointer that can store the location of N bad or questionable bits in the memory segment that is currently being read, where for each bit stored by the erasure pointer the embodiment also contains 2N ECC generators to allow the read data to be quickly checked with the know bad bits in each possible state. This allows the read data to then be easily corrected on the fly before it is transferred by selecting the bad bit state indicated by the ECC generator detecting an uncorrupted read.

Abstract: A Flash memory device, system, and data handling routine is detailed with a distributed erase block sector user/overhead data scheme that splits the user data and overhead data and stores them in differing associated erase blocks. The erase blocks of the Flash memory are arranged into associated erase block pairs in “super blocks” such that when user data is written to/read from the user data area of a sector of an erase block of the super block pair, the overhead data is written to/read from the overhead data area of a sector of the other associated erase block. This data splitting enhances fault tolerance and reliability of the Flash memory device.

Abstract: Data is read from a memory array. Before being stored in a data buffer, a Hamming code detection operation and a Reed-Solomon code detection operation are operated in parallel to determine if the data word has any errors. The results of the parallel detection operations are communicated to a controller circuit. If an error is present that can be corrected by the Hamming code correction operation, this is performed and the Reed-Solomon code detection operation is performed on the corrected word. If the error is uncorrectable by the Hamming code, the Reed-Solomon code correction operation is performed on the word.

Abstract: An improved Flash memory device, control circuit, or data handling methods is described that facilitate the moving and consolidating data in split and non-split user/overhead data sector architectures, moving and storing user and overhead data from and to separate non-volatile memory devices, differing erase blocks, or differing sectors of an erase block. This enables ECC checking and masking while moving data. In addition, the use of a split data storage approach is enabled that avoids the issue of potential corruption of both the user data and overhead data due to each being held within close proximity to each other on the same physical row by allowing user/overhead data split across two erase blocks to be easily moved, consolidated, and managed.

Abstract: A Flash memory device, system, and data handling routine is detailed with a distributed erase block sector user/overhead data scheme that splits the user data and overhead data and stores them in differing associated erase blocks. The erase blocks of the Flash memory are arranged into associated erase block pairs in “super blocks” such that when user data is written to/read from the user data area of a sector of an erase block of the super block pair, the overhead data is written to/read from the overhead data area of a sector of the other associated erase block. This data splitting enhances fault tolerance and reliability of the Flash memory device.

Abstract: A Flash memory device, system, and data handling routine is detailed with a distributed erase block sector user/overhead data scheme that splits the user data and overhead data and stores them in differing associated erase blocks. The erase blocks of the Flash memory are arranged into associated erase block pairs in “super blocks” such that when user data is written to/read from the user data area of a sector of an erase block of the super block pair, the overhead data is written to/read from the overhead data area of a sector of the other associated erase block. This data splitting enhances fault tolerance and reliability of the Flash memory device.

Abstract: A Flash memory device, system, and data handling routine is detailed with a distributed erase block sector user/overhead data scheme that splits the user data and overhead data and stores them in differing associated erase blocks. The erase blocks of the Flash memory are arranged into associated erase block pairs in “super blocks” such that when user data is written to/read from the user data area of a sector of an erase block of the super block pair, the overhead data is written to/read from the overhead data area of a sector of the other associated erase block. This data splitting enhances fault tolerance and reliability of the Flash memory device.

Abstract: A method of operating a memory device when a program failure occurs is provided.

Abstract: A data storage system includes a disc drive accessing system for accessing an entire storage capacity of a disk. The disk drive to be accessed is identified and address parameters for the disk are read from the disk by a host computer under instructions from a program in a Basic Input/Output System (BIOS) extension memory located on an adapter connected between the host computer and the disk drive. The address parameters read from the disk are used by the host computer to access each and every address location on the disk drive. The BIOS extension memory is activated by the BIOS memory upon power-up of the host computer.

Abstract: A method and apparatus are used to adapt a disk drive accessing system to access a maximum storage capacity of at least one disk drive. A Basic Input/Output System (BIOS) memory extension is carried by an adapter. The disk drive to be accessed is identified and address parameters for the disk drive are determined based on instructions in the BIOS extension. The address parameters correspond to the maximum storage capacity of the disk drive. The address parameters are determined by the disk drive accessing system and are suitable for being used by the accessing system in accessing the maximum storage capacity of the disk drive. The disk drive is then configured for being accessed using the address parameters.