Patents by Inventor Brian R. Lee

Brian R. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140332342
    Abstract: A cleanable shoe-type diverter belt having narrow translatable pushers forming article-diverting shoes. Cam followers on the shoes below the pushers follow guides under the belt along an upper carryway run to translate the shoes along one or more transverse tracks across the width of the belt. Monolithic diverters support the belt on the carryway run and direct the shoes along different paths. Pusher returns in a lower returnway run guide diverted pushers back to a home position.
    Type: Application
    Filed: July 23, 2014
    Publication date: November 13, 2014
    Inventors: Kevin W. Guernsey, Jonathan J. Bishop, Timothy J. DeRoche, Kevin L. Gremillion, Matthew Vulpetti, Brian R. Lee
  • Publication number: 20140299067
    Abstract: A colony basket and method of using the same for handling poultry from DOC through the growing process and on to a production facility comprising a harvesting system, a loading system, a transport system, an unloading and storing system, hanging system and cleaning system. The system and method performs the steps of harvesting and colonizing live poultry into a singly stackable and transportable colony basket, stacking and loading the trays on a transport, unloading and temporarily storing the poultry for subsequent processing. The system and method further includes the use of a modular colony basket for interchangeable use with the described system.
    Type: Application
    Filed: April 2, 2014
    Publication date: October 9, 2014
    Applicant: Tyson Foods, Inc.
    Inventors: Doug Foreman, Stephen Brannan, James Ruff, David Lee Mantooth, Kevin W. Guernsey, Timothy J. DeRoche, Brian R. Lee
  • Publication number: 20140008178
    Abstract: A cleanable shoe-type diverter belt having narrow translatable pushers forming article-diverting shoes covering little or none of the belt's conveying surface. Cam followers on the shoes below the pushers follow selectively actuated or fixed guides under the belt to translate the shoes along a transverse track across the width of the belt. Cam followers of different lengths are programmed to follow different paths by multi-level guides.
    Type: Application
    Filed: March 15, 2013
    Publication date: January 9, 2014
    Applicant: LAITRAM, L.L.C.
    Inventors: Kevin W. Guernsey, Brian R. Lee, Jorge E. Nagel
  • Publication number: 20010042874
    Abstract: A method of forming a semiconductor device on a substrate comprising the steps of: forming a first recess in the substrate; depositing an insulator in the first recess so that an isolation region is formed when the first recess is filled with the insulator; forming a second recess in a predetermined area of the substrate; forming a recess insulation layer on the surface of the second recess; depositing a conductive material on the recess insulation layer and in the second recess so that a gate region is formed when the second recess is filled with the conductive material; removing a sufficient amount of the insulator and the conductive material so that the top surfaces of the insulator, the conductive material and the substrate are substantially at the same level.
    Type: Application
    Filed: June 18, 2001
    Publication date: November 22, 2001
    Inventors: Brian R. Lee, Gayle W. Miller, Kunal N. Taravade
  • Patent number: 6288454
    Abstract: A method of creating a layer-to-layer alignment mark in a semiconductor wafer includes the step of depositing a first conductor layer on a substrate associated with the semiconductor wafer. The method also includes the step of fabricating a number of alignment trenches in the first conductor layer. Moreover, the method includes the step of depositing a first insulator layer on the first conductor layer so as to fill the number of alignment trenches. Yet further, the method includes the step of removing material associated with the first insulator layer from the number of alignment trenches such that an upper surface of the first conductor layer and an upper surface of the first insulator layer define a first alignment step feature which possesses a predetermined height. The method also includes the step of depositing a second conductor layer on the semiconductor wafer subsequent to the removing step. A semiconductor wafer is also disclosed.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: September 11, 2001
    Assignee: LSI Logic Corporation
    Inventors: Derryl D. J. Allman, Curtis C. Hainds, Charles W. Jurgensen, Brian R. Lee
  • Patent number: 6277707
    Abstract: A method of forming a semiconductor device on a substrate including the steps of: forming a first recess in the substrate; depositing an insulator in the first recess so that an isolation region is formed when the first recess is filled with the insulator; forming a second recess in a predetermined area of the substrate; forming a recess insulation layer on the surface of the second recess; depositing a conductive material on the recess insulation layer and in the second recess so that a gate region is formed when the second recess is filled with the conductive material; removing a sufficient amount of the insulator and the conductive material so that the top surfaces of the insulator, the conductive material and the substrate are substantially at the same level.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: August 21, 2001
    Assignee: LSI Logic Corporation
    Inventors: Brian R. Lee, Gayle W. Miller, Kunal N. Taravade
  • Patent number: 6136662
    Abstract: A method of creating a layer-to-layer alignment mark in a semiconductor wafer includes the step of depositing a first conductor layer on a substrate associated with the semiconductor wafer. The method also includes the step of fabricating a number of alignment trenches in the first conductor layer. Moreover, the method includes the step of depositing a first insulator layer on the first conductor layer so as to fill the number of alignment trenches. Yet further, the method includes the step of removing material associated with the first insulator layer from the number of alignment trenches such that an upper surface of the first conductor layer and an upper surface of the first insulator layer define a first alignment step feature which possesses a predetermined height. The method also includes the step of depositing a second conductor layer on the semiconductor wafer subsequent to the removing step. A semiconductor wafer is also disclosed.
    Type: Grant
    Filed: May 13, 1999
    Date of Patent: October 24, 2000
    Assignee: LSI Logic Corporation
    Inventors: Derryl D. J. Allman, Curtis C. Hainds, Charles W. Jurgensen, Brian R. Lee
  • Patent number: 5821013
    Abstract: A method and apparatus for forming layers of photo-sensitive materials in different thicknesses. A mask including a first area that substantially blocks light transmission and a second area having optical characteristics, which partially blocks light transmission is employed. Light is projected through the mask onto a layer of photo-sensitive material. The first area substantially blocks the light from passing through and leaves portions of the photo-sensitive material unexposed. The secondary area reduces the intensity of light passing through the mask and projected onto other portions of the photo-sensitive material. After developing the photo-sensitive material, at least two thicknesses of photo-sensitive material results. The second area may include a number of sections that vary from each other in optical characteristics such that the intensity of the light projected onto the layer of photo-sensitive material through the second area varies in steps or continuously.
    Type: Grant
    Filed: December 13, 1996
    Date of Patent: October 13, 1998
    Assignee: Symbios, Inc.
    Inventors: Gayle W. Miller, Brian R. Lee
  • Patent number: 5558205
    Abstract: A conveyor with a straight pathway has laterally spaced side walls with opposing banks of driven roller assemblies mounted thereon. Each roller assembly has a shaft, a roller, and a driven pulley. The pulleys of assemblies on a side wall are driven by an endless positive drive belt that has teeth for meshing with the grooves on a driven pulley. The belt is maintained in its meshed relationship with the driven pulleys by an anti-camming surface that obstructs the belt from being cammed out of its meshed relationship. The belt is laterally guided by an annular ridge on the pulleys and the outside surface of the side wall. A docking station for product carriers is also described. A transitional conveyor embodiment with a curved pathway has spaced curved alignments of bearing mounts for mounting roller assemblies thereon. The roller assemblies have dual pulleys which are each paired with the dual pulley of an adjacent assembly by an endless belt, such as an O-ring.
    Type: Grant
    Filed: September 26, 1994
    Date of Patent: September 24, 1996
    Assignee: Quickdraw Design and Drafting, Inc.
    Inventors: David E. Helgerson, Brian R. Lee
  • Patent number: 5558206
    Abstract: A slip roller conveyor has parallel side walls and a plurality of driven slip roller assemblies mounted therein. Each driven assembly comprises a stub shaft that is threadedly mounted in the side wall and has a wrench-engageable head. A pulley with a sleeve extension is rotatably mounted on the shaft and a slip roller is mounted on the sleeve. The entire driven slip roller assembly is easily removed from its wall mounting by simply engaging the head with a wrench and unscrewing the shaft from its wall mounting. The conveyor drive system includes a positive drive belt having its grooves and teeth intermeshed with mating grooves and teeth on the driven pulleys. A side edge of the belt is guided by the inner surface of the conveyor side wall. A guide strip having an anti-camming surface keeps the drive belt intermeshed with the pulleys along the drive run of the drive belt.
    Type: Grant
    Filed: September 26, 1994
    Date of Patent: September 24, 1996
    Assignee: Quickdraw Design and Drafting, Inc.
    Inventors: David E. Helgerson, Brian R. Lee
  • Patent number: 5100503
    Abstract: There is disclosed a dyed, spin-on glass composition with a high carbon content for use in providing antireflective planarizing layers on substrates such as semiconductor silicon wafers. These layers can be used as hard masks by etching patterns therein. These hard masks can be used in multilayer resists and in making lithography masks. Methods for producing these hard-masks are also provided.
    Type: Grant
    Filed: January 7, 1991
    Date of Patent: March 31, 1992
    Assignee: NCR Corporation
    Inventors: Derryl D. J. Allman, Brian R. Lee
  • Patent number: D340588
    Type: Grant
    Filed: September 11, 1991
    Date of Patent: October 26, 1993
    Assignee: O. W. Lee Company, Inc.
    Inventor: Brian R. Lee