Abstract: A system, method, and computer program product for a flashless optical network unit (ONU) in a Passive Optical Network (PON) are provided herein. The method includes the steps of synchronizing on a downstream signal of an optical line terminal (OLT), receiving a first software from the OLT for its operation on a reserved downstream channel of the OLT, and storing the received first software in a volatile memory. The ONU does not pre-store the first software in a non-volatile memory.

Abstract: The present disclosure provides for a clock distribution network for distributing clocking signals within a synchronous sequential logic circuit. The clock distribution network distributes the one or more clock signals by inductively and/or capacitively coupling a clocking signal from a primary distribution node to various secondary distribution nodes within the synchronous sequential logic circuit. The various secondary distribution nodes resonate at respective resonant frequencies to generate other clocking signals for use within the synchronous sequential logic circuit in response to receiving the clocking signal.

Abstract: A method for diagnosing performance of a network switch device includes a processor monitoring data generated by a sensor associated with a network switch device, the data related to states or attributes of the network switch device. The processor detects a determined condition in the operation of the network switch device related to the state or attribute. The processor generates an event trigger in response to detecting the determined condition and executes a forensic command in response to the event trigger. Executing the command includes sending information relevant to the determined condition for aggregation in computer storage and for analysis.

Abstract: Disclosed herein are various embodiments of a graphics accelerator, which may include an integrated circuit. The integrated circuit may include a local memory; a direct memory access (DMA) engine; a processor; and one or more processing pipelines. The local memory stores graphics data that includes a plurality of pixels. The DMA engine transfers the graphics data between the local memory and an external memory. The processor performs at least one operation, in parallel, on components of at least a portion of the pixels. The one or more processing pipelines process the graphics data. The graphics accelerator works on operands and produces outputs for one set of pixels while the DMA engine is bringing in operands for a future set of pixel operations, and transfers data from the external memory to the one or more processing pipelines by directing data to the one or more pipelines.

Abstract: A global navigation satellite system (GNSS) receiver comprising one or more regular channel circuits and one or more sniff channel circuits may be operable, utilizing the sniff channel circuits, to monitor power levels of currently visible GNSS satellites which are not being utilized by the regular channel circuits. An alternative GNSS satellite from the currently monitored GNSS satellites may be selected by the GNSS receiver based on the monitored power levels. GNSS signals received from the selected alternative GNSS satellite may be processed by a regular channel circuit. The GNSS receiver may be operable to detect, for example, signal-to-noise ratios (SNRs) or carrier-to-noise density ratios (C/N0s) of the currently visible GNSS satellites utilizing the sniff channel circuits. The sniff channel circuits may not be utilized to generate GNSS measurements so that functionality of each of the sniff channel circuits may be reduced.

Abstract: A combined GPS and GLONASS receiver receives GPS signals and GLONASS signals. A calibration signal is generated utilizing the received GPS signals and/or the received GLONASS signals to offset group delay errors in the received GLONASS signals. The generated calibration signal is filtered through Kalman filters to estimate group delay variations in the received GLONASS signals. The estimated group error delay variations are combined with the received GLONASS signals to calibrate the received GLONASS signals by offsetting the estimated group error delay variations. When GPS signals are not available for use, the combined GPS and GLONASS receiver obtains group delay errors stored or in the received GLONASS signals to estimate calibration coefficients. The estimate calibration coefficients are updated utilizing received GPS and/or GLONASS signals.

Abstract: In an RF communication system, aspects for processing multipath clusters may comprise tracking a plurality of received clusters of signals and estimating a phase and amplitude of at least a portion of each of the plurality of received clusters of signals. Each of the plurality of received clusters of signals may be specified in time and an aggregate of received signal paths in a single cluster for a single base station may be processed. At least one cluster path processor may be assigned to process the plurality of received clusters of signals from each transmitting antenna at a single base station. At least one cluster path processor may be assigned to each of a plurality of base stations that are utilized for soft handoff.

Abstract: Presented herein is a system and method for reducing the total size of the frame buffer portion of a decoding circuit. The reduction in size is possible because first portions of B-pictures are displayed while second portions occurring later in the raster order are decoded. The foregoing allows the second portions occurring later in the raster order to overwrite third portions of the picture that have already been displayed. As a result, the frame buffer for providing the frame from a decoder to the display engine need only store the portion that is being displayed and the portion that is being decoded.

Abstract: A multi-mode wireless communication device and multi-mode communication method are disclosed. The multi-mode device includes a first baseband co-processor configured to execute low-level stack operations of a first wireless communications protocol employed within a first wireless communications network. The device also includes a host baseband processor configured to execute a set of protocol stack operations of a second wireless communications protocol employed within a first wireless communications network and higher-level stack operations of the first wireless communications protocol. A data communication channel capable of carrying data received by the multi-mode wireless communication device from the first wireless communications network or sent by the multi-mode wireless communication device through the first wireless communications network is provided between at least the host baseband processor and the first baseband co-processor.

Abstract: Certain embodiments of the invention provide a method and apparatus for DRAM 2D video word formatting. In one aspect of the invention, words of data in a DRAM may be arranged for optimal DRAM operating efficiency. The data organization may utilize a 2-dimensional array of samples, for example. In one embodiment of the invention, a 128-bit or 16-byte word or GWord of DRAM may include an 8×2 array of luma samples, comprising 8 horizontal samples and 2 vertical samples from one field, for example. In this regard, either both may be even lines or both may be odd lines. Various other 2-dimensional arrangements may be chosen according to the demands of the video format being processed in accordance with various embodiments of the invention.

Abstract: An apparatus is disclosed to compensate for non-linear effects resulting from the transmitter, the receiver, and/or the communication channel in a communication system. A receiver of the communication system contains an image cancellation module that compensates for images generated during the modulation and/or demodulation process. The image cancellation module includes a fine carrier correction loop to correct for frequency offsets between the transmitter and receiver. The image cancellation module includes a coarse acquisition mode and a decision directed mode. The decision directed mode allows for a larger signal-to-noise ratio for the receiver when compared against the coarse acquisition mode.

Abstract: Aspects of a method and system for traffic engineering in an IPSec secured network are provided. In this regard, a node in a network may be authenticated as a trusted third party and that trusted third party may be enabled to acquire security information shared between or among a plurality of network entities. In this manner, the trusted third party may parse, access and operate on IPSec encrypted traffic communicated between or among the plurality of network entities. Shared security information may comprise one or more session keys utilized for encrypting and/or decrypting the IPSec secured traffic. The node may parse IPSec traffic and identify a flow associated with the IPsec traffic. In this manner, the node may generate and/or communicate statistics pertaining to said IPSec secured traffic based on the flow with which the traffic is associated.

Abstract: Iterative demapper. Demodulation and/or demapping of a signal (e.g., based on a constellation whose points have a corresponding mapping with associated labels) is performed such that each dimension is processed separately without accounting for influences from the other dimension. For example, the demapping process operates on each respective dimension separately and independently. In some instances, the processing operates iteratively, in that, information identified from processing one of the dimensions is employed in directing the processing in another of the dimensions. Such operation may be performed iteratively by updating/modified information associated with one or more of the dimensions as well. Moreover, decoding may operate in accordance with iterative demapping (e.g., error correction code (ECC) and/or forward error correction (FEC) code by which information bits are encoded) to make estimates of bits within a signal sequence, and those estimates may be used in a subsequent iteration of demapping.

Abstract: A system and method support the exchange of media between friends, family members, and 3rd party media providers over a closed and secure media exchange network. The media may include, for example, digital video, digital audio, digital images, digital data, or any form of digital information.

Abstract: A high frequency mixer with a tunable dynamic range is disclosed. One embodiment provides a mixer apparatus including multiple first transistors at an input branch that receive a differential radio frequency (RF) signal, and multiple second transistors at a second branch that receive a differential local oscillator (LO) signal. The second transistors generate an intermediate frequency (IF) differential output signal. The bias current that flows at the input branch and the output branch can be independently adjusted to allow the conversion gain, linearity, or the output noise of the mixer to be controlled.

Abstract: Methods and systems for wireless communication are disclosed and may include controlling one or more scans of a received signal detection frequency across a frequency range and storing a magnitude of the received signal at each frequency where the magnitude exceeds a threshold level. A type of one or more signals in the received signal may be determined based on a bandwidth of the signals. A Bluetooth page/inquiry scan may be initiated if the determined type is a page/inquiry signal, and scans may be continued if the determined type may not be a page/inquiry signal. The scans may be repeated on a periodic basis and may be controlled utilizing a voltage controlled oscillator. Each of the scans may include a plurality of discrete frequency steps or a continuous frequency ramp. The controlling may include a start frequency, an end frequency and a frequency step size for the scans.

Abstract: Distortion and aliasing reduction for digital to analog conversion. Synthesis of one or more distortion terms made based on a digital signal (e.g., one or more digital codewords) is performed in accordance with digital to analog conversion. The one or more distortion terms may correspond to aliased higher-order harmonics, distortion, nonlinearities, clipping, etc. Such distortion terms may be known a priori, such as based upon particular characteristics of a given device, operational history, etc. Alternatively, such distortion terms may be determined based upon operation of a device and/or based upon an analog signal generated from the analog to conversion process. For example, frequency selective measurements made based on an analog signal generated from the digital to analog conversion may be used for determination of and/or adaptation of the one or more distortion terms. One or more DACs may be employed within various architectures operative to perform digital to analog conversion.

Abstract: Systems and methods that provide a unified infrastructure over layer-2 networks are provided. A first frame is generated by an end point. The first frame comprises a proxy payload, a proxy association header and a frame header relating to a control proxy element. The first frame is sent over a first network to the control proxy element. A second frame is generated by the control proxy element. The second frame comprises the proxy payload and a proxy header. The first and second frames correspond to different layer-2 protocols. The control proxy element sends the second frame over a second network employing the layer-2 protocol of the second frame.

Abstract: An integrated circuit (IC) includes a multi-input multi-output transceiver system that includes a plurality of RF transceivers. Each RF transceiver includes an RF transmitter that transmits a transmit signal at a selected transmit power, based on a transmit power control signal and a corresponding RF receiver for receiving a corresponding one of a plurality of received signals from an external device and for generating a signal strength indication corresponding to each of the plurality of received signals. A processing module generates the transmit power control signal for each RF transmitter based on the signal strength indication of the corresponding RF receiver, and that generates a power mode signal for adjusting a power consumption parameter of each RF transmitter in accordance with the selected transmit power for each RF transmitter.

Abstract: A video decoder block provides a common pathway for processing video signals encoded using different video formats. The video decoder block passes the video signals through the same processing components in order convert the signals to a common format for display or storage. Each processing component cat be disabled or by-passed to enable or disable the function performed by the component. This reduces the number of components and signal processors required in devices that need to accommodate signals of different formats.