Patents by Inventor Bum-Ki Moon

Bum-Ki Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11276853
    Abstract: Electrodes, energy storage devices using such electrodes, and associated methods are disclosed. In an example, an electrode for use in an energy storage device can comprise porous disks comprising a porous material, the porous disks having a plurality of channels and a surface, the plurality of channels opening to the surface; and a structural material encapsulating the porous disks; where the structural material provides structural stability to the electrode during use.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 15, 2022
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Charles W. Holzwarth, Bum Ki Moon, Yang Liu, Priyanka Pande, Shanthi Murali, Nicolas Cirigliano, Zhaohui Chen
  • Patent number: 11101348
    Abstract: Methods form devices by creating openings in sacrificial gates between nanosheet stacks (alternating layers of a first material and channel structures), forming spacers in the openings, and removing the sacrificial gates to leave the spacers. The first material is then removed from between the channel structures. A first work function metal is formed around and between the channel structures. Next, first stacks (of the stacks) are protected with a mask to leave second stacks (of the stacks) exposed. Then, the first work function metal is removed from the second stacks while the first stacks are protected by the mask and the spacers. Subsequently, a second work function metal is formed around and between the channel structures of the second stacks. A gate material is then formed over the first work function metal and the second work function metal.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: August 24, 2021
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Ruilong Xie, Julien Frougier, Nigel G. Cave, Steven R. Soss, Daniel Chanemougame, Steven Bentley, Rohit Galatage, Bum Ki Moon
  • Publication number: 20200035786
    Abstract: Methods form devices by creating openings in sacrificial gates between nanosheet stacks (alternating layers of a first material and channel structures), forming spacers in the openings, and removing the sacrificial gates to leave the spacers. The first material is then removed from between the channel structures. A first work function metal is formed around and between the channel structures. Next, first stacks (of the stacks) are protected with a mask to leave second stacks (of the stacks) exposed. Then, the first work function metal is removed from the second stacks while the first stacks are protected by the mask and the spacers. Subsequently, a second work function metal is formed around and between the channel structures of the second stacks. A gate material is then formed over the first work function metal and the second work function metal.
    Type: Application
    Filed: July 25, 2018
    Publication date: January 30, 2020
    Inventors: Ruilong Xie, Julien Frougier, Nigel G. Cave, Steven R. Soss, Daniel Chanemougame, Steven Bentley, Rohit Galatage, Bum Ki Moon
  • Publication number: 20190198866
    Abstract: Electrodes, energy storage devices using such electrodes, and associated methods are disclosed. In an example, an electrode for use in an energy storage device can comprise porous disks comprising a porous material, the porous disks having a plurality of channels and a surface, the plurality of channels opening to the surface; and a structural material encapsulating the porous disks; where the structural material provides structural stability to the electrode during use.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 27, 2019
    Applicant: Intel Corporation
    Inventors: Donald S. Gardner, Charles W. Holzwarth, Bum Ki Moon, Yang Liu, Priyanka Pande, Shanthi Murali, Nicolas Cirigliano, Zhaohui Chen
  • Patent number: 10217996
    Abstract: Electrodes, energy storage devices using such electrodes, and associated methods are disclosed. In an example, an electrode for use in an energy storage device can comprise porous disks comprising a porous material, the porous disks having a plurality of channels and a surface, the plurality of channels opening to the surface; and a structural material encapsulating the porous disks; where the structural material provides structural stability to the electrode during use.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: February 26, 2019
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Charles W. Holzwarth, Bum Ki Moon, Yang Liu, Priyanka Pande, Shanthi Murali, Nicolas Cirigliano, Zhaohui Chen
  • Publication number: 20180337402
    Abstract: Amorphous silicon anode electrodes and devices for a rechargeable batteries having enhanced structural stabilities are provided. An amorphous silicon anode can include an electrically conductive substrate and an electrode layer deposited onto the substrate, where the electrode layer is comprised of one or more amorphous silicon structures, and the amorphous silicon structures have at least one dimension that is less than or equal to about 500 nm.
    Type: Application
    Filed: November 27, 2017
    Publication date: November 22, 2018
    Applicant: Intel Corporation
    Inventors: Zhaohui Chen, Donald S. Gardner, Bum Ki Moon, Yang Liu
  • Patent number: 10008560
    Abstract: A capacitor includes a first via level having first metal bars and first vias, such that the first metal bars are coupled to a first potential node. The first metal bars are longer than the first vias. Second metal bars and second vias are disposed in a second via level, the second metal bars are coupled to the first potential node. The second metal bars are longer than the second vias. The second via level is above the first via level and the first metal bars are parallel to the second metal bars. Each of the first metal bars has a first end, an opposite second end, and a middle portion between the first and the second ends. Each of the middle portions of the first metal bars and the second ends of the first metal bars do not contact any metal line.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: June 26, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Sun-Oo Kim, Moosung Chae, Bum Ki Moon
  • Patent number: 9947485
    Abstract: An energy storage device includes an electrode made from an active material in which a plurality of channels have been etched. The channels are coated with an electrically functional substance selected from a conductor and an electrolyte.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: April 17, 2018
    Assignee: INTEL CORPORATION
    Inventors: Yang Liu, Priyanka Pande, Bum Ki Moon, Michael C. Graf, Donald S. Gardner, Nicolas Cirigliano, Shanthi Murali, Zhaohui Chen
  • Patent number: 9928966
    Abstract: In one embodiment, a structure for an energy storage device may include a first nanostructured substrate having a conductive layer and a dielectric layer formed on the conductive layer. A second nanostructured substrate includes another conductive layer. A separator separates the first and second nanostructured substrates and allows ions of an electrolyte to pass through the separator. The structure may be a nanostructured electrolytic capacitor with the first nanostructured substrate forming a positive electrode and the second nanostructured substrate forming a negative electrode of the capacitor.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: March 27, 2018
    Assignee: INTEL CORPORATION
    Inventors: Zhaohui Chen, Donald S. Gardner, Bum Ki Moon, Charles W. Holzwarth, Cary L. Pint, Scott B. Clendenning
  • Patent number: 9859565
    Abstract: Ultrafast battery devices having enhanced reliability and power density are provided. Such batteries can include a cathode including a first silicon substrate having a cathode structured surface, an anode including a second silicon substrate having an anode structured surface positioned adjacent to the cathode such that the cathode structured surface faces the anode structured surface, and an electrolyte disposed between the cathode and the anode. The anode structured surface can be coated with an anodic active material and the cathode structured surface can be coated with a cathodic active material.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: January 2, 2018
    Assignee: INTEL CORPORATION
    Inventors: Zhaohui Chen, Yang Liu, Charles W. Holzwarth, Nicolas Cirigliano, Bum Ki Moon
  • Publication number: 20170236654
    Abstract: Hybrid electrochemical capacitors, electronic devices using such capacitors, and associated methods are disclosed. In an example, a hybrid electrochemical capacitor can include a first electrode made from Mg, Na, Zn, Al, Sn, or Li, a second electrode made from a porous material such as porous carbon or passivated porous silicon, and an electrolyte. The hybrid electrochemical capacitors can have enhanced voltage and energy density compared to other electrochemical capacitors, and enhanced power density compared to batteries.
    Type: Application
    Filed: April 27, 2017
    Publication date: August 17, 2017
    Applicant: Intel Corporation
    Inventors: DONALD S. GARDNER, CHUNLEI WANG, YANG LIU, ZHAOHUI CHEN, CHARLES W. HOLZWARTH, BUM KI MOON
  • Patent number: 9685278
    Abstract: Ultracapacitor electrodes having an enhanced electrolyte-accessible surface area are provided. Such electrodes can include a porous substrate having a solution side and a collector side, the collector side operable to couple to a current collector and the solution side positioned to interact with an electrolytic solution when in use. The electrode can also include a conductive coating formed on the solution side of the porous substrate. The coating can have a first side positioned to interact with an electrolytic solution when in use and a second side opposite the first side. The coating can have discontinuous regions that allow access of an electrolyte solution to the second side during use to enhance electrolyte-accessible surface area of the conductive coating.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: June 20, 2017
    Assignee: Intel Corporation
    Inventors: Charles W. Holzwarth, Cary L. Pint, Michael C. Graf, Bum Ki Moon
  • Publication number: 20170155131
    Abstract: Electrodes, energy storage devices using such electrodes, and associated methods are disclosed. In an example, an electrode for use in an energy storage device can comprise porous disks comprising a porous material, the porous disks having a plurality of channels and a surface, the plurality of channels opening to the surface; and a structural material encapsulating the porous disks; where the structural material provides structural stability to the electrode during use.
    Type: Application
    Filed: November 1, 2016
    Publication date: June 1, 2017
    Applicant: Intel Corporation
    Inventors: Donald S. Gardner, Charles W. Holzwarth, Bum Ki Moon, Yang Liu, Priyanka Pande, Shanthi Murali, Nicolas Cirigliano, Zhaohui Chen
  • Patent number: 9640332
    Abstract: Hybrid electrochemical capacitors, electronic devices using such capacitors, and associated methods are disclosed. In an example, a hybrid electrochemical capacitor can include a first electrode made from Mg, Na, Zn, Al, Sn, or Li, a second electrode made from a porous material such as porous carbon or passivated porous silicon, and an electrolyte. The hybrid electrochemical capacitors can have enhanced voltage and energy density compared to other electrochemical capacitors, and enhanced power density compared to batteries.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: May 2, 2017
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Chunlei Wang, Yang Liu, Zhaohui Chen, Charles W. Holzwarth, Bum Ki Moon
  • Publication number: 20160358999
    Abstract: A capacitor includes a first via level having first metal bars and first vias, such that the first metal bars are coupled to a first potential node. The first metal bars are longer than the first vias. Second metal bars and second vias are disposed in a second via level, the second metal bars are coupled to the first potential node. The second metal bars are longer than the second vias. The second via level is above the first via level and the first metal bars are parallel to the second metal bars. Each of the first metal bars has a first end, an opposite second end, and a middle portion between the first and the second ends. Each of the middle portions of the first metal bars and the second ends of the first metal bars do not contact any metal line.
    Type: Application
    Filed: August 19, 2016
    Publication date: December 8, 2016
    Inventors: Sun-Oo Kim, Moosung Chae, Bum Ki Moon
  • Patent number: 9484576
    Abstract: Electrodes, energy storage devices using such electrodes, and associated methods are disclosed. In an example, an electrode for use in an energy storage device can comprise porous disks comprising a porous material, the porous disks having a plurality of channels and a surface, the plurality of channels opening to the surface; and a structural material encapsulating the porous disks; where the structural material provides structural stability to the electrode during use.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: November 1, 2016
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Charles W. Holzwarth, Bum Ki Moon, Yang Liu, Priyanka Pande, Shanthi Murali, Nicolas Cirigliano, Zhaohui Chen
  • Publication number: 20160254105
    Abstract: Ultracapacitor electrodes having an enhanced electrolyte-accessible surface area are provided. Such electrodes can include a porous substrate having a solution side and a collector side, the collector side operable to couple to a current collector and the solution side positioned to interact with an electrolytic solution when in use. The electrode can also include a conductive coating formed on the solution side of the porous substrate. The coating can have a first side positioned to interact with an electrolytic solution when in use and a second side opposite the first side. The coating can have discontinuous regions that allow access of an electrolyte solution to the second side during use to enhance electrolyte-accessible surface area of the conductive coating.
    Type: Application
    Filed: May 9, 2016
    Publication date: September 1, 2016
    Applicant: Intel Corporation
    Inventors: Charles W. Holzwarth, Cary L. Pint, Michael C. Graf, Bum Ki Moon
  • Patent number: 9425140
    Abstract: In one embodiment, a capacitor includes a first via level having first metal bars and first vias, such that the first metal bars are coupled to a first potential node. The first metal bars are longer than the first vias. Second metal bars and second vias are disposed in a second via level, the second metal bars are coupled to the first potential node. The second metal bars are longer than the second vias. The second via level is above the first via level and the first metal bars are parallel to the second metal bars. Each of the first metal bars has a first end, an opposite second end, and a middle portion between the first and the second ends. Each of the middle portions of the first metal bars and the second ends of the first metal bars do not contact any metal line.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: August 23, 2016
    Assignee: Infineon Technologies AG
    Inventors: Sun-Oo Kim, Moosung Chae, Bum Ki Moon
  • Patent number: 9355790
    Abstract: Ultracapacitor electrodes having an enhanced electrolyte-accessible surface area are provided. Such electrodes can include a porous substrate having a solution side and a collector side, the collector side operable to couple to a current collector and the solution side positioned to interact with an electrolytic solution when in use. The electrode can also include a conductive coating formed on the solution side of the porous substrate. The coating can have a first side positioned to interact with an electrolytic solution when in use and a second side opposite the first side. The coating can have discontinuous regions that allow access of an electrolyte solution to the second side during use to enhance electrolyte-accessible surface area of the conductive coating.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: May 31, 2016
    Assignee: Intel Corporation
    Inventors: Charles W. Holzwarth, Cary L. Pint, Michael C. Graf, Bum Ki Moon
  • Patent number: 9194036
    Abstract: A plasma vapor deposition system is described for forming a feature on a semiconductor wafer. The plasma vapor deposition comprises a primary target electrode and a plurality of secondary target electrodes. The deposition is performed by sputtering atoms off the primary and secondary target electrodes.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: November 24, 2015
    Assignee: Infineon Technologies AG
    Inventors: Sun-Oo Kim, Moosung Chae, Bum Ki Moon