Abstract: Methods of manufacturing an integrated circuit device including a through via structure are provided. The methods may include forming an isolation trench through a substrate to form an inner substrate, which is enclosed by the isolation trench and forming an insulating layer in the isolation trench and on a surface of the substrate. The methods may also include forming a hole, which is spaced apart from the isolation trench and passes through a portion of the insulating layer formed on the surface of the substrate and the inner substrate and forming a conductive layer in the hole and on the insulating layer formed on the surface of the substrate. The methods may be used to manufacture image sensors.

Abstract: An integrated circuit (IC) device includes a first substrate and a first structure on a front surface of the first substrate. The first structure includes a first interlayer insulating layer structure including a plurality of first conductive pad layers spaced apart from one another at different levels of the first interlayer insulating layer structure. The IC device includes a second substrate on the first substrate and a second structure on a front surface of the second substrate, which faces the front surface of the first substrate. The second structure includes a second interlayer insulating layer structure bonded to the first interlayer insulating layer structure. A through-silicon via (TSV) structure penetrates the second substrate and the second interlayer insulating layer structure. The TSV structure is in contact with at least two first conductive pad layers of the plurality of first conductive pad layers located at different levels.

Abstract: A stack type image sensor may include: a first chip including a via isolation trench penetrating a first substrate, a via isolation layer including an insulation material in the via isolation trench, a first conductive layer on the first substrate, and a first insulation layer; a second chip including a second conductive layer on a second substrate, and a second insulation layer contacting the first insulation layer; a first via trench penetrating the first substrate to expose the second conductive layer with respect to the trench; and a first through via formed in the first via trench, and including a third conductive layer insulated from the first substrate by the via isolation layer, the third conductive layer electrically connecting the first conductive layer to the second conductive layer. The third conductive layer may be formed in the via isolation trench.

Abstract: A stack type image sensor may include: a first chip including a via isolation trench penetrating a first substrate, a via isolation layer including an insulation material in the via isolation trench, a first conductive layer on the first substrate, and a first insulation layer; a second chip including a second conductive layer on a second substrate, and a second insulation layer contacting the first insulation layer; a first via trench penetrating the first substrate to expose the second conductive layer with respect to the trench; and a first through via formed in the first via trench, and including a third conductive layer insulated from the first substrate by the via isolation layer, the third conductive layer electrically connecting the first conductive layer to the second conductive layer. The third conductive layer may be formed in the via isolation trench.

Abstract: Disclosed are a superconducting current-limiting element for a current limiter and a method of manufacturing a superconducting current-limiting element for a current limiter, in which the current-limiting element is formed in series by stacking linear superconducting wires, or is formed in parallel by stacking superconducting wires so that one or more superconducting wires are disposed in the same layer, thus facilitating the formation of the current-limiting element in series or in parallel and obviating the use of a winding machine when manufacturing the current-limiting element.

Abstract: A stack type image sensor may include: a first chip including a via isolation trench penetrating a first substrate, a via isolation layer including an insulation material in the via isolation trench, a first conductive layer on the first substrate, and a first insulation layer; a second chip including a second conductive layer on a second substrate, and a second insulation layer contacting the first insulation layer; a first via trench penetrating the first substrate to expose the second conductive layer with respect to the trench; and a first through via formed in the first via trench, and including a third conductive layer insulated from the first substrate by the via isolation layer, the third conductive layer electrically connecting the first conductive layer to the second conductive layer. The third conductive layer may be formed in the via isolation trench.

Abstract: An electronic device may include a first semiconductor layer, a first electrode layer on the semiconductor layer, an adhesive insulating layer on the first electrode layer, a second electrode layer on the adhesive insulating layer, a second semiconductor layer. The first electrode layer may include a first plurality of electrodes, the first electrode layer may be between the adhesive insulating layer and the first semiconductor layer, and the adhesive insulating layer may include at least one of SiOCN, SiBN, and/or BN. The second electrode layer may include a second plurality of electrodes, the adhesive insulating layer may be between the first and second electrode layers, and the second electrode layer may be between the adhesive insulating layer and the second semiconductor layer.

Abstract: Methods of manufacturing an integrated circuit device including a through via structure are provided. The methods may include forming an isolation trench through a substrate to form an inner substrate, which is enclosed by the isolation trench and forming an insulating layer in the isolation trench and on a surface of the substrate. The methods may also include forming a hole, which is spaced apart from the isolation trench and passes through a portion of the insulating layer formed on the surface of the substrate and the inner substrate and forming a conductive layer in the hole and on the insulating layer formed on the surface of the substrate. The methods may be used to manufacture image sensors.

Abstract: A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.

Abstract: Methods of manufacturing an integrated circuit device including a through via structure are provided. The methods may include forming an isolation trench through a substrate to form an inner substrate, which is enclosed by the isolation trench and forming an insulating layer in the isolation trench and on a surface of the substrate. The methods may also include forming a hole, which is spaced apart from the isolation trench and passes through a portion of the insulating layer formed on the surface of the substrate and the inner substrate and forming a conductive layer in the hole and on the insulating layer formed on the surface of the substrate. The methods may be used to manufacture image sensors.

Abstract: An electronic device may include a first semiconductor layer, a first electrode layer on the semiconductor layer, an adhesive insulating layer on the first electrode layer, a second electrode layer on the adhesive insulating layer, a second semiconductor layer. The first electrode layer may include a first plurality of electrodes, the first electrode layer may be between the adhesive insulating layer and the first semiconductor layer, and the adhesive insulating layer may include at least one of SiOCN, SiBN, and/or BN. The second electrode layer may include a second plurality of electrodes, the adhesive insulating layer may be between the first and second electrode layers, and the second electrode layer may be between the adhesive insulating layer and the second semiconductor layer.

Abstract: A diffuser structure and a manufacturing method thereof are disclosed. The diffuser structure includes a substrate, a plurality of throughholes, and a glue layer. The throughholes are perpendicularly formed in the substrate. Each throughhole includes a gas-in part, a gas-out part, and a connecting part for connecting the gas-in part to the gas-out part. The glue layer is formed on a side wall of each gas-out part, and a thickness of the glue layer is between 1 ?m and 11 ?m. The present invention can solve a problem that particles are periodically generated after a periodic self-cleaning function is implemented in a plasma-enhanced chemical vapor deposition system.

Abstract: An image sensor includes a plurality of photo detectors and a plurality of trench isolations configured to isolate the photo detectors from each other. Each of the trench isolations includes a plurality of films in a multi-layer structure. A method of manufacturing an image sensor includes forming a plurality of trench isolations to isolate a plurality of photo detectors from each other, forming a first film in each of the trench isolations, and forming a second film that constructs a multi-layer structure together with the first film.

Abstract: A semiconductor substrate includes a photodiode on a support substrate. An insulating layer is provided between the support substrate and the semiconductor substrate. A first conductive pattern is provided in the insulating layer. A first through electrode penetrates the support substrate to be in contact with the first conductive pattern.

Abstract: A self-piercing rivet is disclosed. The self-piercing rivet integrally joins an upper plate member and a lower plate member overlapping each other. The self-piercing rivet includes a head portion, a shank portion integrally connected with the head portion, a plurality of ribs formed to an external circumferential surface of the shank portion along a length direction of the shank portion in a spiral form, and at least one stopper protrusion protruded from a lower portion of the head portion.

Abstract: A self-piercing rivet is disclosed. The self-piercing rivet integrally joins an upper plate member and a lower plate member overlapping each other. The self-piercing rivet includes a head portion, a shank portion integrally connected with the head portion, and a plurality of ribs formed to an external circumferential surface of the shank portion along a length direction of the shank portion in a spiral form.

Abstract: A self-piercing rivet is disclosed. The self-piercing rivet integrally joins an upper plate member and a lower plate member overlapping each other. The self-piercing rivet includes a head portion, a shank portion integrally connected with the head portion and a plurality of ribs formed to an external circumferential surface of the shank portion along a length direction of the shank portion in a spiral form, wherein a drive slot is formed to upper portion of the head portion.

Abstract: A self-piercing rivet is disclosed. The self-piercing rivet integrally joins an upper plate member and a lower plate member overlapped with each other. The self-piercing rivet includes: a head portion; and a shank portion integrally connected to the head portion and provided with more than two slits.

Abstract: An image sensor device includes a substrate including a light sensing region therein and a reflective structure on a first surface of the substrate over the light sensing region. An interconnection structure having a lower reflectivity than the reflective structure is provided on the first surface of the substrate adjacent to the reflective structure. A microlens is provided on a second surface of the substrate opposite the first surface. The microlens is configured to direct incident light to the light sensing region, and the reflective structure is configured to reflect portions of the incident light that pass through the light sensing region back toward the light sensing region. Related devices and fabrication methods are also discussed.

Abstract: The image sensor includes a substrate, an insulating structure formed on a first surface of the substrate and including a first metal wiring layer exposed by a contact hole penetrating the substrate, a conductive spacer formed on sidewalls of the contact hole and electrically connected to the first metal wiring layer, and a pad formed on a second surface of the substrate and electrically connected to the first metal wiring layer.