Abstract: Disclosed are a pixel circuit, a driving method of the pixel circuit and a display device, the pixel circuit including a reset unit, a voltage writing unit and a light-emitting control unit, the reset unit is connected to a reset control signal terminal, and resets the pixel circuit under the control of the reset control signal; the voltage writing unit stores a data signal and a threshold voltage of a driving transistor under the control of the scan control signal; the light-emitting control unit is connected to a light-emitting control signal terminal and includes the driving transistor, and use the data signal and the threshold voltage to generate a current under control of the light-emitting control signal; the light-emitting control unit includes a first type transistor, the reset unit and the voltage writing unit include a second type transistor different from the first type transistor.

Abstract: A display panel and a display device are provided. The display panel has a display area. The display panel includes: a base substrate; a driving circuit and at least one signal line on the base substrate; and at least one insulating layer between the driving circuit and the at least one signal line. The driving circuit is disposed in a periphery of the display area; and an orthogonal projection of at least one of the signal lines on the base substrate has an overlapping area with an orthogonal projection of the driving circuit on the base substrate.

Abstract: A shift register and driving method thereof, a gate driving circuit and a display device are provided. The shift register includes a first input unit, a second input unit, a pull-up control unit, a pull-down control unit, an output control unit and an output reset unit, wherein the first input unit, the second input unit, the pull-up control unit, the pull-down control unit and the output control unit are coupled to a first node, and the pull-up control unit, the pull-down control unit and the output reset unit are coupled to a second node.

Abstract: Disclosed are a pixel circuit, a driving method of the pixel circuit and a display device, the pixel circuit including a reset unit, a voltage writing unit and a light-emitting control unit, the reset unit is connected to a reset control signal terminal, and resets the pixel circuit under the control of the reset control signal; the voltage writing unit stores a data signal and a threshold voltage of a driving transistor under the control of the scan control signal; the light-emitting control unit is connected to a light-emitting control signal terminal and includes the driving transistor, and use the data signal and the threshold voltage to generate a current under control of the light-emitting control signal; the light-emitting control unit includes a first type transistor, the reset unit and the voltage writing unit include a second type transistor different from the first type transistor.

Abstract: In a pixel driving circuit, a compensation sub-circuit is respectively coupled to a first control terminal, a control terminal and a second terminal of the driving sub-circuit; a first terminal of the first coupling sub-circuit is coupled to the control terminal of the driving sub-circuit; a first terminal of the second coupling sub-circuit is coupled to a second terminal of the first coupling sub-circuit; a first reset sub-circuit is respectively coupled to a second control terminal, the control terminal of the driving sub-circuit and an initialization signal output terminal; a second reset sub-circuit is respectively coupled to a third control terminal, a second terminal of the first coupling sub-circuit and the first level signal output terminal; a first light emitting control sub-circuit is respectively coupled to a light emitting control terminal, a second terminal of the second coupling sub-circuit and a reference signal output terminal.

Abstract: Disclosed are a display substrate and a preparation method thereof, and a display apparatus. The display substrate includes a substrate and a plurality of sub-pixels, at least one sub-pixel includes a pixel drive circuit and a light emitting device connected to the pixel drive circuit, the pixel drive circuit includes a plurality of transistors, wherein at least one transistor includes an active layer and two gate electrodes. The substrate is provided with a semiconductor layer and a plurality of conductive layers disposed on one side of the semiconductor layer away from the substrate, at least one conductive layer is provided with at least one electrode plate, and there is an overlapping region between an orthographic projection of the electrode plate on the substrate and an orthographic projection of the active layer between the two gate electrodes on the substrate.

Abstract: Provided are a pixel circuit, a display panel and a display apparatus. The pixel circuit includes: a first resetting switching transistor, a first data writing switching transistor, a storage capacitor, a first compensation capacitor, a second compensation capacitor, and a driving transistor; the first resetting switching transistor includes a first switching sub-transistor and a second switching sub-transistor connected in series, and the first data writing switching transistor includes a third switching sub-transistor and a fourth switching sub-transistor connected in series. The first compensation capacitor and the second compensation capacitor are used to enable a voltage Vn1? of the first node to be smaller than a voltage Vn3? of the third node and larger than a voltage Vn4? of the fourth node in a light-emitting stage.

Abstract: A driving method and device for a shift register. In a data refreshing phase, loading an input signal having a pulse level to an input signal end, loading a control clock pulse signal to a control clock signal end, loading a noise reduction clock pulse signal to a noise reduction clock signal end, controlling a cascade signal end of the shift register to output a cascade signal having a pulse level, and controlling a drive signal end of the shift register to output a drive signal having a pulse level; in a data holding phase, loading a fixed voltage signal to the input signal end, loading a first set signal to the control clock signal end, loading a second set signal to the noise reduction clock signal end, controlling the cascade signal end to output a fixed voltage signal having a second level.

Abstract: In a pixel driving circuit, a compensation sub-circuit is respectively coupled to a first control terminal, a control terminal and a second terminal of the driving sub-circuit; a first terminal of the first coupling sub-circuit is coupled to the control terminal of the driving sub-circuit; a first terminal of the second coupling sub-circuit is coupled to a second terminal of the first coupling sub-circuit; a first reset sub-circuit is respectively coupled to a second control terminal, the control terminal of the driving sub-circuit and an initialization signal output terminal; a second reset sub-circuit is respectively coupled to a third control terminal, a second terminal of the first coupling sub-circuit and the first level signal output terminal; a first light emitting control sub-circuit is respectively coupled to a light emitting control terminal, a second terminal of the second coupling sub-circuit and a reference signal output terminal.

Abstract: A display panel and a display device are provided. The display panel includes: a pixel unit including a pixel circuit and a light-emitting element, the pixel circuit including a first transistor, the pixel unit including a first pixel unit and a second pixel unit located in a same row and adjacent columns; a first gate line and a second gate line, connected to gate electrodes of the first transistors of the first pixel unit and the second pixel unit; a first gate signal line, connected to the first pixel unit; a second gate signal line, connected to the second pixel unit; a first connection line connected with the first gate signal line through the first connection line; and a second connection line connected with the second gate signal line through the second connection line.

Abstract: A shift register unit, a driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first input circuit, a second input circuit, an output circuit, a first control circuit, and a second control circuit. The first input circuit is electrically connected to a first node, and is configured to transmit an input signal to the first node; the second input circuit is electrically connected to the first node and a second node, and is configured to control a level of the second node; the first control circuit is electrically connected to the second node and a third node, and is configured to control a level of the third node ; and the output circuit is electrically connected to the third node and an output terminal, and is configured to output an output signal to the output terminal.

Abstract: A display substrate includes a display region, a non-display region at a periphery of the display region, pixel units in the display region and arranged in an array, gate lines extending in a row direction of the array, and data lines extending in a column direction of the array. Each row of pixel units is provided with at least one gate line, and each gate line is coupled to at least a part of the pixel units in a corresponding row. Each column of pixel units is provided with at least two data lines, and each data line is coupled to a part of the pixel units in a corresponding column. Each pixel unit is coupled to one gate line and one data line, and two pixel units in a same column and in two adjacent rows are coupled to different data lines, respectively.

Abstract: The present disclosure provides a pixel circuit, a pixel driving method, a display panel and a display device. The pixel circuit includes a light-emitting element, a driving circuitry, a first energy storage circuitry, a second energy storage circuitry, a data writing circuitry and a compensation circuitry. The data writing circuitry is configured to write a data voltage into a first end of the first energy storage circuitry under the control of a gate driving signal provided by a gate line. The compensation circuitry is configured to control a control end of the driving circuitry to be electrically coupled to a second end of the driving circuitry under the control of a compensation control signal. The driving circuitry is configured to generate a driving current for driving the light-emitting element under the control of a potential at its control end.

Abstract: A shift register and a driving method thereof, a gate drive circuit, and a display device are provided. The shift register includes: an input circuit, configured to input an input voltage provided by the input voltage terminal to an intermediate circuit under control of a first clock signal provided by the first clock signal terminal; the intermediate circuit, configured to write a second clock signal output by the second clock signal terminal or a first power signal output by the first power terminal to the intermediate output terminal as an intermediate output signal under control of the input voltage and the control circuit; and an output circuit, configured to output an output signal, a phase of which is opposite to a phase of the intermediate output signal.

Abstract: A pixel driving circuit includes: an energy storage sub-circuit, a reset sub-circuit, a compensation sub-circuit, a driving sub-circuit, and a current leakage suppression sub-circuit. The energy storage sub-circuit is coupled to a first node and a second node. The reset sub-circuit is coupled to the second node, a first scan timing signal terminal, and an initialization signal terminal. The compensation sub-circuit is coupled to the second node, a third node, and a second scan timing signal terminal. The driving sub-circuit is coupled to the second node, the third node, and a first voltage signal terminal. The current leakage suppression sub-circuit is coupled to the energy storage sub-circuit, the reset sub-circuit, and the compensation sub-circuit. The current leakage suppression sub-circuit is configured to suppress current leakage of the energy storage sub-circuit in a process of generating and transmitting the driving signal by the driving sub-circuit.

Abstract: A pixel driving circuit includes a reset sub-circuit, a compensation sub-circuit, a light-emitting control sub-circuit and a driving sub-circuit. The reset sub-circuit is configured to transmit an initialization signal received from an initialization signal terminal to the light-emitting control sub-circuit. The fight-emitting control sub-circuit is configured to transmit the initialization signal to the first node. The compensation sub-circuit is configured to transmit the initialization signal from the first node to a second node so as to reset a voltage of the second node. The driving sub-circuit is configured to open a conductive path from a first voltage signal terminal to the initialization signal terminal during a process of resetting the voltage of the second node.

Abstract: A gate driving unit, a gate driving circuit, a gate driving method, and a display device are provided. The gate driving unit includes a first output circuit and a second output circuit; the second output circuit comprises a first output sub-circuit; the first output circuit is respectively electrically connected to the first node, the second node and the first gate driving signal output end and is configured to control the first gate driving signal output end to output a first gate driving signal under the control of the potential of the first node and the potential of the second node; the first output sub-circuit is respectively electrically connected to the first node, the second gate driving signal output end and the first clock signal end, and is configured to control the second gate driving signal output end to be connected to the first clock signal end.

Abstract: A shift register unit, a driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first input circuit, a second input circuit, an output circuit, a first control circuit, and a second control circuit. The first input circuit is electrically connected to a first node, and is configured to transmit an input signal to the first node; the second input circuit is electrically connected to the first node and a second node, and is configured to control a level of the second node; the first control circuit is electrically connected to the second node and a third node, and is configured to control a level of the third node; and the output circuit is electrically connected to the third node and an output terminal, and is configured to output an output signal to the output terminal.

Abstract: Provided is a display substrate, the display substrate is provided with a display area and a peripheral area around the display area, and includes: a source/drain layer, a planarization layer and an anode layer which are laminated in sequence, wherein in the peripheral area, the source/drain layer includes at least one pair of first signal lines including a signal line of a gate circuit and the anode layer includes a common power line provided with vent holes; and overlapping areas between two first signal lines in any pair of the first signal lines and a projection pattern of the vent hole are equal, the projection pattern of the vent hole being a pattern of an orthographic projection of the vent hole in the common power line onto the source/drain layer. A display panel and a display device are also provided.

Abstract: A shift register unit includes an input circuit, a first control circuit, a second control circuit and an output circuit. The input circuit is configured to provide signals of the signal input terminal to the first control node, and provide signals of the first power supply terminal or the first clock signal terminal to the second control node. The first control circuit is configured to provide signals of the second power supply terminal or the second clock signal terminal to the first output terminal. The second control circuit is configured to provide signals of the first power supply terminal to the second output terminal. The output circuit is configured to provide signals of the second power supply terminal to the second output terminal.