Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes: a starting circuit configured to control, under control of a first clock signal input terminal, turning on or off coupling between a first node and a starting voltage input terminal; a first capacitor circuit, having a first terminal being coupled to a second clock signal input terminal, and a second terminal being coupled to the first node; a first node control circuit configured to control, under control of a third node, turning on or off coupling between the first node and a first level input terminal; a potential control circuit configured to control, under control of the first node, turning on or off coupling between the second node and a second level input terminal; a second capacitor circuit; a second node control circuit; an output circuit; and a third node control circuit.

Abstract: The present disclosure relates to a shift register, a gate driving circuit and a display device. The shift register includes an input circuit, a pull-up circuit, a pull-down circuit, and a pulse width control circuit. The input circuit is electrically coupled to a first control terminal, and is configured to receive a trigger signal, and control the pull-down circuit to output a second level signal to an output terminal based on the trigger signal under control of a first control signal at the first control terminal.

Abstract: A display panel and a display device are provided. The display panel has a display area. The display panel includes: a base substrate; a driving circuit and at least one signal line on the base substrate; and at least one insulating layer between the driving circuit and the at least one signal line. The driving circuit is disposed in a periphery of the display area; and an orthogonal projection of at least one of the signal lines on the base substrate has an overlapping area with an orthogonal projection of the driving circuit on the base substrate.

Abstract: The present disclosure provides a pixel circuit, a driving method thereof, an array substrate and a display device. The pixel circuit comprises: a driving transistor; a precharge sub-circuit configured to write a supply voltage into a first node under the control of a scan signal and a light emission control signal in a precharge phase; a reset sub-circuit; a data writing sub-circuit configured to write a data voltage into the first node under the control of the scan signal in a data writing phase, so that the potential of the first node is equal to a sum of the data voltage and a threshold voltage of the driving transistor; a light emission control sub-circuit configured to connect a power supply with a light-emitting unit through the driving transistor under the control of the light emission control signal in a light-emitting phase.

Abstract: A method, a circuit and a display device for driving an organic light emitting diode, wherein a driving transistor (DTFT) for driving a display element is turned off by jumping one or more of a reference voltage input (Vref), a reset voltage input (Vinit) and a data signal input (Vdata) before beginning to output an EL high level (ELVDD) of a pixel compensation circuit and after beginning to output an EL low level (ELVSS), to overcome the splash screen phenomenon during power-up and direct current-direct current driving failure.

Abstract: A pixel driving circuit and a driving method, and a display device are provided. The driving circuit includes: a first switching element, a second switching element, a third switching element, a fourth switching element, a fifth switching element, a driving transistor, a sixth switching element, a first storage capacitor and a second storage capacitor.

Abstract: Interface circuitry of an apparatus receives a first service data packet that includes at least first information for a first multimedia presentation frame and second information for a second multimedia presentation frame. Processing circuitry of the apparatus stores the first information and the second information in different rows having different row number in a service data table. Then the processing circuitry determines, from a preset database, first material data for the first multimedia presentation frame and second material data for the multimedia presentation frame based on material configuration information in the first service data packet. Further the processing circuitry associates the first material data and the second material data in a material data table with different row numbers in the service data table and generates first multimedia service data corresponding to the first service data packet based on the association between the service data table and the material data table.

Abstract: The present disclosure provides a driving chip, a display substrate, a display device and a method for manufacturing a display device. The driving chip according to the present disclosure includes a substrate; and a plurality of connecting bumps and a plurality of supporting bumps disposed on the substrate. The plurality of connecting bumps include at least one set of connecting bumps arranged along a first direction, and the plurality of supporting bumps include the supporting bump that is located between the adjacent connecting bumps arranged along the first direction.

Abstract: The present disclosure provides a shift register unit, its driving method, a gate driver circuit and a display device. The shift register unit includes a first output module, a second output module, an input module and a control module. The first output module is connected to a first signal end, a first node and an output end. The second output module is connected to the output end, a second node and a second signal end. The control module is connected to the first node, the second node, the first signal end, the second signal end, a first clock signal end and a second clock signal end. The input module is connected to an input end, the second node and the second clock signal end.

Abstract: Embodiments of the present disclosure disclose a method and an apparatus. The apparatus includes interface circuitry and processing circuitry. The processing circuitry obtains attribute information of multimedia information associated with a multimedia provider. The attribute information includes website information of a website used to display the multimedia information and identifier (ID) information associated with the multimedia information. The processing circuitry generates a machine-readable identification code to be scanned by a user device of a user based on at least the website information. Based on the ID information, the processing circuitry obtains a first image corresponding to the multimedia information. The processing circuitry determines an image area in the first image in which the machine-readable identification code is to be inserted. The processing circuitry inserts the machine-readable identification code into the image area to generate a second image.

Abstract: A shift register includes: an input unit, configured to provide an input signal to a first node; a pull-up unit, configured to provide a voltage of a first supply voltage terminal to an output terminal; a pull-up control unit, configured to provide the voltage of the first supply voltage terminal or a voltage of a second supply voltage terminal to a second node; a pull-down unit, configured to provide a third clock signal from a third clock signal terminal to the output terminal; a pull-down control unit, configured to provide the voltage of the first supply voltage terminal to the first node; a first noise reduction unit, configured to reduce electrical leakage of the input unit to the first node; and a second noise reduction unit, configured to reduce electrical leakage of the pull-down control unit to the first node.

Abstract: A shift register includes: an input unit, configured to provide an input signal to a first node; a pull-up unit, configured to provide a voltage of a first supply voltage terminal to an output terminal; a pull-up control unit, configured to provide the voltage of the first supply voltage terminal or a voltage of a second supply voltage terminal to a second node; a pull-down unit, configured to provide a third clock signal from a third clock signal terminal to the output terminal; a pull-down control unit, configured to provide the voltage of the first supply voltage terminal to the first node; a first noise reduction unit, configured to reduce electrical leakage of the input unit to the first node; and a second noise reduction unit, configured to reduce electrical leakage of the pull-down control unit to the first node.

Abstract: Provided is a shift register, comprising an input circuit, an output circuit, and a control circuit, which are electrically connected to a control node. The input circuit is electrically connected with a signal input terminal of the shift register, and is configured to input an input signal provided by the signal input terminal to the control node. The control circuit is electrically connected with a working power supply terminal, and is configured to input an operation voltage provided by the working power supply terminal to the control node. The output circuit is electrically connected with a signal output terminal of the shift register and a clock signal line, and is configured to input one of a voltage of the control node and the first clock signal provided by the clock signal line to the signal output terminal.

Abstract: An information processing method, a server, and a computer storage medium are provided. The method includes: generating a first information identification code according to first information, the first information representing an information source; providing the first information identification code to a terminal; receiving a first request from the terminal and allowing a terminal user of the terminal to follow an information service, the first request carrying the first information; and recording the first information and tracking and obtaining conversion information of the information source according to the first information.

Abstract: The present disclosure provides a pixel circuit, a driving method thereof, an array substrate and a display device. The pixel circuit comprises: a driving transistor; a precharge sub-circuit configured to write a supply voltage into a first node under the control of a scan signal and a light emission control signal in a precharge phase; a reset sub-circuit; a data writing sub-circuit configured to write a data voltage into the first node under the control of the scan signal in a data writing phase, so that the potential of the first node is equal to a sum of the data voltage and a threshold voltage of the driving transistor; a light emission control sub-circuit configured to connect a power supply with a light-emitting unit through the driving transistor under the control of the light emission control signal in a light-emitting phase.

Abstract: A server provides an exchange platform linking requesters for creatives and creative manufacturing systems. A specification for required creatives is distributed to multiple creative manufacturing systems, and triggers parallel manufacturing of the required creatives on at least a first and a second creative manufacturing system, each proceeds with a respective portion of the required quantity of the required creatives. Before each manufacturing system completes their respective portions of the manufacturing, the server independently requests and receives, in multiple discrete batches, respective quantities of the required creatives that have been completed by the first and second creative manufacturing systems. The server performs independent and parallel verification on the respective quantities of the required creatives that have been completed by the first and second creative manufacturing systems.

Abstract: The present disclosure provides a shift register unit, its driving method, a gate driver circuit and a display device. The shift register unit includes a first output module, a second output module, an input module and a control module. The first output module is connected to a first signal end, a first node and an output end. The second output module is connected to the output end, a second node and a second signal end. The control module is connected to the first node, the second node, the first signal end, the second signal end, a first clock signal end and a second clock signal end. The input module is connected to an input end, the second node and the second clock signal end.

Abstract: Embodiments of the present disclosure provide a shift register and a driving method thereof, a gate driving circuit and a display device. The shift register includes a control signal generation module, a first low level pulse generation module, a second low level pulse generation module, and a high level pulse generation module. The control signal generation module generates a first control signal and a second control signal. The first low level pulse generation module receives the first control signal and the second control signal and generate a first low level pulse signal. The second low level pulse generation module receives the first control signal and the second control signal and generate a second low level pulse signal. The high level pulse generation module receives the first control signal and generates a high level pulse signal. This shift register reduces the number of circuit elements.

Abstract: A method, a circuit and a display device for driving an organic light emitting diode, wherein a driving transistor (DTFT) for driving a display element is turned off by jumping one or more of a reference voltage input (Vref), a reset voltage input (Vinit) and a data signal input (Vdata) before beginning to output an EL high level (ELVDD) of a pixel compensation circuit and after beginning to output an EL low level (ELVSS), to overcome the splash screen phenomenon during power-up and direct current-direct current driving failure.

Abstract: Embodiments of the present disclosure provide a shift register and a driving method thereof, a gate driving circuit and a display device. The shift register includes a control signal generation module, a first low level pulse generation module, a second low level pulse generation module, and a high level pulse generation module. The control signal generation module generates a first control signal and a second control signal. The first low level pulse generation module receives the first control signal and the second control signal and generate a first low level pulse signal. The second low level pulse generation module receives the first control signal and the second control signal and generate a second low level pulse signal. The high level pulse generation module receives the first control signal and generates a high level pulse signal. This shift register reduces the number of circuit elements.