Abstract: A method of forming a Bi-layered superlattice material on a substrate using chemical vapor deposition of a precursor solution of trimethylbismuth and a metal compound dissolved in an organic solvent. The precursor solution is heated and vaporized prior to deposition of the precursor solution on an integrated circuit substrate by chemical vapor deposition. No heating steps including a temperature of 650° C. or higher are used.

Abstract: A ferroelectric device includes a ferroelectric layer and an electrode. The ferroelectric material is made of a perovskite or a layered superlattice material. A superlattice generator metal oxide is deposited as a capping layer between said ferroelectric layer and said electrode to improve the residual polarization capacity of the ferroelectric layer.

Abstract: A high dielectric constant insulator including a thin film of a metal oxide selected from the group consisting of tungsten-bronze-type oxides, pyrochlore-type oxides, and combinations of Bi2O3 with an oxide selected from the group consisting of perovskites and pyrochlore-type oxides. An embodiment contains metal oxides represented by the general stoichiometric formulas AB2O6, A2B2O7 and A2Bi2B2O10, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La; and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb. Preferably, the metal oxides are (BaxSr1−x)(TayNb1−y)2O6, where 0≦x≦1.0 and 0≦y≦1.0; (BaxSr1−x)2(TayNb1−y)2O7, where 0≦x≦1.0 and 0≦y≦1.0; and (BaxSr1−x)2Bi2(TayNby−1)2O10, where 0≦x≦1.0 and 0≦y≦1.0. Thin films according to the invention have a relative dielectric constant ≧40, and preferably about 100.

Abstract: A nondestructive read-out, nonvolatile ferroelectric field effect transistor (“FET”) memory in an integrated circuit, containing a thin film of polycrystalline crystallographically oriented ferroelectric material. Preferably, the material is polycrystalline c-axis oriented layered superlattice material. More preferably, it is c-axis oriented strontium bismuth tantalate or strontium bismuth tantalum niobate.

Abstract: A high dielectric constant insulator including a thin film of a metal oxide selected from the group consisting of tungsten-bronze-type oxides, pyrochlore-type oxides, and combinations of Bi2O3 with an oxide selected from the group consisting of perovskites and pyrochlore-type oxides. An embodiment contains metal oxides represented by the general stoichiometric formulas AB2O6, A2B2O7 and A2Bi2B2O10, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La; and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb. Preferably, the metal oxides are (BaxSr1−x)(TayNb1−y)2O6, where 0≦y≦1.0 and 0≦y≦1.0; (BaxSr1−x)2(TayNB1−y)2O7, where 0≦x≦1.0 and 0≦y≦1.0; and (BaxSr1−x)2(TayNb1−y)2O10, where 0≦x≦1.0 and 0≦y≦1.0. Thin films according to the invention have a relative dielectric constant ≳40, and preferably about 100.

Abstract: A ferroelectric device includes a ferroelectric layer and an electrode. The ferroelectric material is made of a perovskite or a layered superlattice material. A superlattice generator metal oxide is deposited as a capping layer between said ferroelectric layer and said electrode to improve the residual polarization capacity of the ferroelectric layer.

Abstract: A venturi mist generator creates a mist comprising droplets having a mean diameter less than one micron from liquid precursors containing multi-metal polyalkoxide compounds. The mist is mixed and then passed into a gasifier where the mist droplets are gasified at a temperature of between 100° C. and 250° C., which is lower than the temperature at which the precursor compounds decompose. The gasified precursor compounds are transported by carrier gas through insulated tubing at ambient temperature to prevent both condensation and premature decomposition. The gasified precursors are mixed with oxidant gas, and the gaseous reactant mixture is injected through a showerhead inlet into a deposition reactor in which a substrate is heated at a temperature of from 300° C. to 600 ° C. The gasified precursors decompose at the substrate and form a thin film of solid material on the substrate. The thin film is treated at elevated temperatures of from 500° C. to 900° C.

Abstract: In an integrated circuit, a stack of thin film layers comprising respectively a bottom electrode, a thin film of metal oxide, a top electrode, a lower barrier-adhesion layer, a hydrogen barrier layer, and an upper barrier-adhesion layer are patterned to form a memory capacitor capped with a self-aligned hydrogen barrier layer. Preferably, the top and bottom electrodes comprise platinum, the metal oxide material comprises ferroelectric layered superlattice material, the upper and lower barrier-adhesion layers comprise titanium, and the hydrogen barrier layer comprises titanium nitride. The hydrogen barrier layer inhibits diffusion of hydrogen, thereby preventing hydrogen degradation of the metal oxides. Part of the upper barrier-adhesion layer is removed in order to increase the electrical conductivity in the layer. Preferably, the memory capacitor is a ferroelectric nonvolatile memory. Preferably, the layered superlattice material includes strontium bismuth tantalate or strontium bismuth tantalum niobate.

Abstract: A precursor for forming an aluminum oxide film comprises a liquid solution of an aluminum organic precursor compound in an organic solvent. In a second embodiment, the precursor comprises a suspension of aluminum oxide powder in a solution of an aluminum organic precursor compound. A precursor according to the invention is deposited on a substrate by dipping, rolling, spraying, misted deposition, spin on deposition, or chemical vapor deposition then heated to fabricate transparent aluminum oxide films. The electronic properties of the aluminum oxide films may be improved by depositing a plurality of layers of the precursor and annealing the precursor between layers.

Abstract: A high dielectric constant insulator including a thin film of a metal oxide selected from the group consisting of tungsten-bronze-type oxides, pyrochlore-type oxides, and combinations of Bi2O3 with an oxide selected from the group consisting of perovskites and pyrochlore-type oxides. An embodiment contains metal oxides represented by the general stoichiometric formulas AB2O6, A2B2O7 and A2Bi2B2O10, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La; and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb. Preferably, the metal oxides are (BaxSr1−x)(TayNb1−y)2O6, where 0≦x≦1.0 and 0≦y≦1.0; (BaxSr1−x)2(TayNb1−Y)2O7, where 0≦x≦1.0 and 0≦y≦1.0; and (BaxSr1−x)2Bi2(TayNb1−y)2O10, where 0≦x≦1.0 and 0≦y≦1.0. Thin films according to the invention have a relative dielectric constant ≧40, and preferably about 100.

Abstract: A ferroelectric memory includes a plurality of memory cells each containing a ferroelectric thin film including a microscopically composite material having a ferroelectric material component and a fluxor material component, the fluxor material being a different chemical compound than the ferroelectric material. The fluxor is a material having a higher crystallization velocity than the ferroelectric material. The addition of the fluxor permits a ferroelectric thin film to be crystalized at a temperature of between 400° C. and 550° C.

Abstract: A ferroelectric FET having an interface insulator layer containing ZrO2. The ferroelectric FET includes a gate oxide layer, the interface insulator layer is located on the gate oxide layer, and ferroelectric layered superlattice material is located on the interface insulator layer, The interface insulator layer has a thickness of from 15 to 25 nanometers.

Abstract: A liquid precursor solution for use according to a method of manufacturing metal oxide electronic components includes a polyoxyalkylated metal complex dispersed in an alkane solvent. The alkane solvent is preferably n-octane.

Abstract: A hydrogen diffusion barrier in an integrated circuit is located to inhibit diffusion of hydrogen to a thin film of metal oxide material in an integrated circuit. The hydrogen diffusion barrier comprises at least one of the following nitrides: aluminum titanium nitride (Al2Ti3N6), aluminum silicon nitride (Al2Si3N6), aluminum niobium nitride (AlNb3N6), aluminum tantalum nitride (AlTa3N6), aluminum copper nitride (Al2Cu3N4), tungsten nitride (WN), and copper nitride (Cu3N2). The thin film of metal oxide is ferroelectric or high-dielectric, nonferroelectric material. Preferably, the metal oxide comprises ferroelectric layered superlattice material. Preferably, the hydrogen barrier layer is located directly over the thin film of metal oxide.

Abstract: A thin film of solid material is selectively formed during fabrication of an integrated circuit by applying a liquid precursor to a substrate having a first surface and a second surface and treating the liquid precursor. The first surface has different physical properties than the second surface such that a solid thin film forms on the first surface but does not form on the second surface. The substrate is washed after formation of said solid thin film to remove any residues of said liquid from the second substrate surface.

Abstract: A Ti/TiN adhesion/barrier layer is formed on a substrate and annealed. The anneal step is performed at a temperature within a good morphology range of 100° C. above a base barrier anneal temperature that depends on the thickness of said barrier layer. The base barrier anneal temperature is about 700° C. for a barrier thickness of about 1000 Å and about 800° C. for a barrier thickness of about 3000 Å. The barrier layer is 800 Å thick or thicker. A first electrode is formed, followed by a BST dielectric layer and a second electrode. A bottom electrode structure in which a barrier layer of TiN is sandwiched between two layers of platinum is also disclosed. The process and structures also produce good results with other capacitor dielectrics, including ferroelectrics such as strontium bismuth tantalate.

Abstract: A ferroelectric non-volatile memory in which each memory cell consists of a single electronic element, a ferroelectric FET. The FET includes a source, drain, gate and substrate. The fact that the drain to source current, lds, is always negative if a substrate to drain bias, Vss, of 0.8 volts or more is applied, permits the creation of a read and write truth table. A gate voltage equal to one truth table logic value is applied via a column decoder and a substrate bias equal to another truth table logic value is applied via a row decoder to write to the memory a resultant lds logic state, which can be read whenever a voltage is placed across the source and drain.

Abstract: An integrated circuit device includes a thin film of bismuth-containing layered superlattice material having a thickness not exceeding 100 nm, a capping layer thin film of bismuth tantalate, and an electrode. The capping layer has a thickness in a range of from 3 nm to 30 nm and is deposited between the thin film of layered superlattice material and the electrode to increase dielectric breakdown voltage. Preferably the capping layer contains an excess amount of bismuth relative to the stoichiometrically balanced amount represented by the balanced stoichiometric formula BiTaO4. Preferably, the layered superlattice material is ferroelectric SBT or SBTN. Preferably, the integrated circuit device is a nonvolatile ferroelectric memory. Heating treatments for fabrication of the integrated circuit device containing the bismuth tantalate capping layerare conducted at temperatures not exceeding 700° C., preferably in a range of from 650° C. to 700° C.

Abstract: A liquid precursor for forming a layered superlattice material is applied to an integrated circuit substrate. The precursor coating is annealed in oxygen using a rapid temperature pulsing anneal (“RPA”) technique with a ramp rate of 30° C./second at a hold temperature of 650° C. for a holding time of 30 minutes. The RPA technique includes applying a plurality of rapid-temperature heat pulses in sequence.

Abstract: An integrated circuit capacitor containing a thin film of dielectric metal oxide is formed above a silicon germanium substrate. A silicon nitride diffusion barrier layer is deposited on a silicon germanium substrate to prevent evaporation of the substrate in subsequent heating steps. A silicon dioxide stress reduction layer is deposited on the diffusion barrier layer. A bottom electrode is formed on the stress reduction layer, then a liquid precursor is spun on the bottom electrode, dried at about 400° C., and annealed at between 600° C. and 850° C. to form a BST capacitor dielectric. A top electrode is deposited on the dielectric and annealed. The integrated circuit may also include a BiCMOS device, a HBT device or a MOSFET.