Patents by Inventor Carsten Ahrens

Carsten Ahrens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9363609
    Abstract: Embodiments show a method for fabricating a cavity structure, a semiconductor structure, a cavity structure for a semiconductor device and a semiconductor microphone fabricated by the same. In some embodiments the method for fabricating a cavity structure comprises providing a first layer, depositing a carbon layer on the first layer, covering at least partially the carbon layer with a second layer to define the cavity structure, removing by means of dry etching the carbon layer between the first and second layer so that the cavity structure is formed.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: June 7, 2016
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Friza, Thomas Grille, Klaus Muemmler, Guenter Ziegler, Carsten Ahrens
  • Publication number: 20160141256
    Abstract: According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.
    Type: Application
    Filed: January 22, 2016
    Publication date: May 19, 2016
    Inventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn
  • Publication number: 20160118353
    Abstract: A device is disclosed that includes a wafer/chip, a first layer, a first device, an isolation mold and a second device. The first layer is formed over the chip and has non-isolating characteristics. The first device is formed over the first layer. In one example, it is formed only over the first layer. The isolation mold is formed over the chip. The isolation mold has isolating characteristics. The second device is formed substantially over the isolation mold.
    Type: Application
    Filed: October 22, 2014
    Publication date: April 28, 2016
    Inventors: Carsten Ahrens, Anton Steltenpohl, Edward Fuergut, Anneliese Mueller
  • Publication number: 20160086842
    Abstract: A method for producing a semiconductor device having a sidewall insulation includes providing a semiconductor body having a first side and a second side lying opposite the first side. At least one first trench is at least partly filled with insulation material proceeding from the first side in the direction toward the second side into the semiconductor body. The at least one first trench is produced between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device. An isolating trench extends from the first side of the semiconductor body in the direction toward the second side of the semiconductor body between the first and second semiconductor body regions in such a way that at least part of the insulation material of the first trench adjoins at least a sidewall of the isolating trench. The second side of the semiconductor body is partly removed as far as the isolating trench.
    Type: Application
    Filed: December 1, 2015
    Publication date: March 24, 2016
    Inventors: CARSTEN AHRENS, RUDOLF BERGER, MANFRED FRANK, UWE HOECKELE, BERNHARD KNOTT, ULRICH KRUMBEIN, WOLFGANG LEHNERT, BERTHOLD SCHUDERER, JUERGEN WAGNER, STEFAN WILLKOFER
  • Patent number: 9293409
    Abstract: According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: March 22, 2016
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn
  • Patent number: 9236290
    Abstract: A method for producing a semiconductor device having a sidewall insulation includes providing a semiconductor body having a first side and a second side lying opposite the first side. At least one first trench is at least partly filled with insulation material proceeding from the first side in the direction toward the second side into the semiconductor body. The at least one first trench is produced between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device. An isolating trench extends from the first side of the semiconductor body in the direction toward the second side of the semiconductor body between the first and second semiconductor body regions in such a way that at least part of the insulation material of the first trench adjoins at least a sidewall of the isolating trench. The second side of the semiconductor body is partly removed as far as the isolating trench.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: January 12, 2016
    Assignee: Infineon Technologies AG
    Inventors: Carsten Ahrens, Rudolf Berger, Manfred Frank, Uwe Hoeckele, Bernhard Knott, Ulrich Krumbein, Wolfgang Lehnert, Berthold Schuderer, Juergen Wagner, Stefan Willkofer
  • Patent number: 9196568
    Abstract: An arrangement is provided. The arrangement may include: a die including at least one electronic component and a first terminal on a first side of the die and a second terminal on a second side of the die opposite the first side, wherein the first side being the main processing side of the die, and the die further including at least a third terminal on the second side; a first electrically conductive structure providing current flow from the third terminal on second side of the die to the first side through the die; a second electrically conductive structure on the first side of the die laterally coupling the second terminal with the first electrically conductive structure; and an encapsulation material disposed at least over the first side of the die covering the first terminal and the second electrically conductive structure.
    Type: Grant
    Filed: October 1, 2013
    Date of Patent: November 24, 2015
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn, Edward Fuergut
  • Publication number: 20150321901
    Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a sacrificial layer over a first surface of a workpiece having the first surface and an opposite second surface. A membrane is formed over the sacrificial layer. A through hole is etched through the workpiece from the second surface to expose a surface of the sacrificial layer. At least a portion of the sacrificial layer is removed from the second surface to form a cavity under the membrane. The cavity is aligned with the membrane.
    Type: Application
    Filed: July 13, 2015
    Publication date: November 12, 2015
    Inventors: Alfons Dehe, Carsten Ahrens, Stefan Barzen, Wolfgang Friza
  • Patent number: 9177950
    Abstract: Described herein is a protective structure. The protective structure includes a semiconductor substrate, a first diode disposed at least one of in or on the semiconductor substrate and a diode arrangement disposed at least one of in or on the semiconductor substrate. The diode arrangement includes a stack of a second diode and a transient voltage suppressor (TVS) diode connected in series with the second diode. The diode arrangement is in parallel with the first diode.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: November 3, 2015
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
  • Patent number: 9171918
    Abstract: A semiconductor device includes an active device region formed in an epitaxial layer disposed on a semiconductor substrate and a buried electrode disposed below the active device region in a cavity formed within the semiconductor substrate. The buried electrode includes an electrically conductive material different than the material of the semiconductor substrate.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: October 27, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Carsten Ahrens, Johannes Baumgartl, Francisco Javier Santos Rodriguez, Hans-Joachim Schulze
  • Patent number: 9102519
    Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a sacrificial layer over a first surface of a workpiece having the first surface and an opposite second surface. A membrane is formed over the sacrificial layer. A through hole is etched through the workpiece from the second surface to expose a surface of the sacrificial layer. At least a portion of the sacrificial layer is removed from the second surface to form a cavity under the membrane. The cavity is aligned with the membrane.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: August 11, 2015
    Assignee: Infineon Technologies AG
    Inventors: Alfons Dehe, Carsten Ahrens, Stefan Barzen, Wolfgang Friza
  • Publication number: 20150221523
    Abstract: An arrangement is provided. The arrangement may include: a substrate having a front side and a back side, a die region within the substrate, a multi-purpose layer defining a back side of the die region, and an etch stop layer disposed over the multi-purpose layer between the multi-purpose layer and the back side of the substrate. The multi-purpose layer may be formed of an ohmic material, and the etch stop layer may be of a first conductivity type of a first doping concentration.
    Type: Application
    Filed: January 16, 2015
    Publication date: August 6, 2015
    Inventors: Markus Zundel, Andre Schmenn, Damian Sojka, Isabella Goetz, Gudrun Stranzl, Sebastian Werner, Thomas Fischer, Carsten Ahrens, Edward Fuergut
  • Publication number: 20150137305
    Abstract: Described herein is a protective structure. The protective structure includes a semiconductor substrate, a first diode disposed at least one of in or on the semiconductor substrate and a diode arrangement disposed at least one of in or on the semiconductor substrate. The diode arrangement includes a stack of a second diode and a transient voltage suppressor (TVS) diode connected in series with the second diode. The diode arrangement is in parallel with the first diode.
    Type: Application
    Filed: December 11, 2014
    Publication date: May 21, 2015
    Inventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
  • Publication number: 20150091183
    Abstract: An arrangement is provided. The arrangement may include: a die including at least one electronic component and a first terminal on a first side of the die and a second terminal on a second side of the die opposite the first side, wherein the first side being the main processing side of the die, and the die further including at least a third terminal on the second side; a first electrically conductive structure providing current flow from the third terminal on second side of the die to the first side through the die; a second electrically conductive structure on the first side of the die laterally coupling the second terminal with the first electrically conductive structure; and an encapsulation material disposed at least over the first side of the die covering the first terminal and the second electrically conductive structure.
    Type: Application
    Filed: October 1, 2013
    Publication date: April 2, 2015
    Applicant: Infineon Technologies AG
    Inventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn, Edward Fuergut
  • Patent number: 8993372
    Abstract: Exemplary embodiments of a method for producing a semiconductor component having a polycrystalline semiconductor body region are disclosed, wherein the polycrystalline semiconductor body region is produced between the first and second surfaces of the semiconductor body in a semiconductor component section, wherein an electromagnetic radiation having a wavelength of at least 1064 nm is introduced into the semiconductor body in a manner focused onto a position in the semiconductor component section of the semiconductor body and wherein the power density of the radiation at the position is less than 1×108 W/cm2.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: March 31, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Manfred Schneegans, Carsten Ahrens, Adolf Koller, Gerald Lackner, Anton Mauder, Hans-Joachim Schulze
  • Publication number: 20150069591
    Abstract: According to various embodiments, a method for manufacturing a semiconductor device may include providing a semiconductor workpiece including a device region at a first side of the semiconductor workpiece, wherein a mechanical stability of the semiconductor workpiece is insufficient to resist at least one back end process without damage, and depositing at least one conductive layer over a second side of the semiconductor workpiece opposite the first side of the semiconductor workpiece, wherein the at least one conductive layer increases the mechanical stability of the semiconductor workpiece to be sufficient to resist the at least one back end process without damage.
    Type: Application
    Filed: September 11, 2013
    Publication date: March 12, 2015
    Applicant: Infineon Technologies AG
    Inventors: Thomas Fischer, Carsten Ahrens, Damian Sojka, Andre Schmenn
  • Patent number: 8975612
    Abstract: In one embodiment, a method of forming a semiconductor device includes forming a first inductor coil within and/or over a substrate. The first inductor coil is formed adjacent a top side of the substrate. First trenches are formed within the substrate adjacent the first inductor coil. The first trenches are filled at least partially with a magnetic fill material. At least a first portion of the substrate underlying the first inductor coil is thinned. A backside magnetic layer is formed under the first portion of the substrate. The backside magnetic layer and the magnetic fill material form at least a part of a magnetic core region of the first inductor coil.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: March 10, 2015
    Assignee: Infineon Technologies AG
    Inventors: Renate Hofmann, Carsten Ahrens, Wolfgang Klein, Alexander Glas
  • Publication number: 20150056784
    Abstract: A semiconductor device is manufactured by forming semiconductor elements extending between a front surface and a rear side of a semiconductor layer. This includes forming a porous area at a surface of a semiconductor body that includes a porous structure in the porous area, forming the semiconductor layer on the porous area by epitaxial growth so as to have a thickness in a range of 5 ?m to 200 ?m, and forming semiconductor regions including source, drain, body, emitter, base and/or collector regions in a front surface of the semiconductor layer by ion implantation. After forming the semiconductor regions, hydrogen is introduced into the porous area by a thermal treatment, activating a reallocation of pores and causing cavities to be generated. The semiconductor layer is separated from the semiconductor body along the porous area. After the separation, rear side processing is applied to the semiconductor layer.
    Type: Application
    Filed: October 10, 2014
    Publication date: February 26, 2015
    Inventors: Hans-Joachim Schulze, Francisco Javier Santos Rodriguez, Anton Mauder, Johannes Baumgartl, Carsten Ahrens
  • Patent number: 8951879
    Abstract: A method for producing a protective structure may include: providing a semiconductor base substrate with a doping of a first conductivity type; producing a first epitaxial layer on the substrate; implanting a dopant of a second conductivity type in a delimited implantation region of the first epitaxial layer; applying a second epitaxial layer with a doping of the second conductivity type on the first epitaxial layer; forming an insulation zone in the second epitaxial layer, such that the second epitaxial layer is subdivided into first and second regions; producing a first dopant zone with a doping of the first conductivity type in the first region above the implantation region; producing a second dopant zone with a doping of the second conductivity type in the second region; outdiffusing the dopant from the implantation region to form a buried layer at the junction between the first epitaxial layer and the first region.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: February 10, 2015
    Assignee: Infineon Technologies AG
    Inventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
  • Patent number: 8952489
    Abstract: A semiconductor package includes a semiconductor chip, an inductor applied to the semiconductor chip. The inductor includes at least one winding. A space within the at least one winding is filled with a magnetic material.
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: February 10, 2015
    Assignee: Infineon Technologies AG
    Inventors: Klaus Elian, Jens Pohl, Horst Theuss, Renate Hofmann, Alexander Glas, Carsten Ahrens