Patents by Inventor Carsten Ahrens

Carsten Ahrens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130065379
    Abstract: A method of manufacturing a semiconductor device includes forming a porous area of a semiconductor body. The semiconductor body includes a porous structure in the porous area. A semiconductor layer is formed on the porous area. Semiconductor regions are formed in the semiconductor layer. Then, the semiconductor layer is separated from the semiconductor body along the porous area, including introducing hydrogen into the porous area by a thermal treatment.
    Type: Application
    Filed: September 12, 2011
    Publication date: March 14, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Hans-Joachim Schulze, Francisco Javier Santos Rodriguez, Anton Mauder, Johannes Baumgartl, Carsten Ahrens
  • Publication number: 20130049203
    Abstract: A semiconductor device with a buried electrode is manufactured by forming a cavity within a semiconductor substrate, forming an active device region in an epitaxial layer disposed on the semiconductor substrate and forming the buried electrode below the active device region in the cavity. The buried electrode is formed from an electrically conductive material different than the material of the semiconductor substrate.
    Type: Application
    Filed: August 29, 2011
    Publication date: February 28, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Carsten Ahrens, Johannes Baumgartl, Francisco Javier Santos Rodriguez, Hans-Joachim Schulze
  • Publication number: 20120306060
    Abstract: A protective structure is produced by providing a semiconductor substrate having doping of a first conductivity type. A semiconductor layer having doping of a second conductivity type is applied at a surface of the semiconductor substrate. A buried layer with doping of a second conductivity type is formed in a first region of the semiconductor layer, producing a layer at the junction between the semiconductor layer and semiconductor substrate. A first dopant zone having doping of a first conductivity type is formed in the first region of the semiconductor layer above the buried layer. A second dopant zone having doping of a second conductivity type is formed in a second region of the semiconductor layer. An electrical insulation is formed between the first and second regions of the semiconductor layer. A common connection device is formed for the first and second dopant zones.
    Type: Application
    Filed: August 3, 2012
    Publication date: December 6, 2012
    Inventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
  • Publication number: 20120289023
    Abstract: A method for producing a semiconductor device having a sidewall insulation includes providing a semiconductor body having a first side and a second side lying opposite the first side. At least one first trench is at least partly filled with insulation material proceeding from the first side in the direction toward the second side into the semiconductor body. The at least one first trench is produced between a first semiconductor body region for a first semiconductor device and a second semiconductor body region for a second semiconductor device. An isolating trench extends from the first side of the semiconductor body in the direction toward the second side of the semiconductor body between the first and second semiconductor body regions in such a way that at least part of the insulation material of the first trench adjoins at least a sidewall of the isolating trench. The second side of the semiconductor body is partly removed as far as the isolating trench.
    Type: Application
    Filed: February 3, 2012
    Publication date: November 15, 2012
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Carsten Ahrens, Rudolf Berger, Manfred Frank, Uwe Hoeckele, Bernhard Knott, Ulrich Krumbein, Wolfgang Lehnert, Berthold Schuderer, Juergen Wagner, Stefan Willkofer
  • Publication number: 20120289047
    Abstract: A method for producing a connection region on a side wall of a semiconductor body is disclosed. A first trench is produced on a first surface of a semiconductor body and extends into the semiconductor body. An insulation layer is formed on the side walls and on the bottom of the first trench, and the first trench is only partially filled. The unfilled part of the first trench is filled with an electrically conductive material. A separating trench is produced along the first trench in such a way that a side wall of the separating trench directly adjoins the first trench. The part of the insulation layer which adjoins the separating trench is at least partially removed, with the result that at least some of the electrically conductive material in the first trench is exposed.
    Type: Application
    Filed: May 10, 2012
    Publication date: November 15, 2012
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Carsten Ahrens, Berthold Schuderer, Stefan Willkofer
  • Patent number: 8263481
    Abstract: A protective structure is produced by providing a semiconductor substrate with a doping of a first conductivity type. A semiconductor layer with a doping of a second conductivity type is applied at a surface of the semiconductor substrate. A buried layer with doping of a second conductivity type is formed in a first region of the semiconductor layer, wherein the buried layer is produced at the junction between the semiconductor layer and semiconductor substrate. A first dopant zone with a doping of a first conductivity type is formed in the first region of the semiconductor layer above the buried layer. A second dopant zone with a doping of a second conductivity type is formed in a second region of the semiconductor layer. An electrical insulation is formed between the first region and the second region of the semiconductor layer. A common connection device is formed for the first dopant zone and the second dopant zone.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: September 11, 2012
    Assignee: Infineon Technologies AG
    Inventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
  • Publication number: 20120225544
    Abstract: Exemplary embodiments of a method for producing a semiconductor component having a polycrystalline semiconductor body region are disclosed, wherein the polycrystalline semiconductor body region is produced between the first and second surfaces of the semiconductor body in a semiconductor component section, wherein an electromagnetic radiation having a wavelength of at least 1064 nm is introduced into the semiconductor body in a manner focused onto a position in the semiconductor component section of the semiconductor body and wherein the power density of the radiation at the position is less than 1×108 W/cm2.
    Type: Application
    Filed: February 28, 2012
    Publication date: September 6, 2012
    Inventors: Manfred SCHNEEGANS, Carsten AHRENS, Adolf KOLLER, Gerald LACKNER, Anton MAUDER, Hans-Joachim SCHULZE
  • Publication number: 20120161257
    Abstract: Embodiments show a method for fabricating a cavity structure, a semiconductor structure, a cavity structure for a semiconductor device and a semiconductor microphone fabricated by the same. In some embodiments the method for fabricating a cavity structure comprises providing a first layer, depositing a carbon layer on the first layer, covering at least partially the carbon layer with a second layer to define the cavity structure, removing by means of dry etching the carbon layer between the first and second layer so that the cavity structure is formed.
    Type: Application
    Filed: December 27, 2010
    Publication date: June 28, 2012
    Applicant: Infineon Technologies AG
    Inventors: Wolfgang Friza, Thomas Grille, Klaus Muemmler, Guenter Zieger, Carsten Ahrens
  • Patent number: 8163629
    Abstract: In one embodiment, a method for forming the semiconductor device includes forming a first trench from a front side of a substrate. The substrate has a front side and an opposite back side, and the first trench having sidewalls and a bottom surface. A insulator layer is formed over the sidewalls and the bottom surface. A first conductive layer is formed over a top portion of the sidewalls of the first trench. The substrate is separated along the first trench.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: April 24, 2012
    Assignee: Infineon Technologies AG
    Inventors: Berthold Schuderer, Carsten Ahrens
  • Publication number: 20120086102
    Abstract: In one embodiment, a method of forming a semiconductor device includes forming a first inductor coil within and/or over a substrate. The first inductor coil is formed adjacent a top side of the substrate. First trenches are formed within the substrate adjacent the first inductor coil. The first trenches are filled at least partially with a magnetic fill material. At least a first portion of the substrate underlying the first inductor coil is thinned. A backside magnetic layer is formed under the first portion of the substrate. The backside magnetic layer and the magnetic fill material form at least a part of a magnetic core region of the first inductor coil.
    Type: Application
    Filed: October 7, 2010
    Publication date: April 12, 2012
    Inventors: Renate Hofmann, Carsten Ahrens, Wolfgang Klein, Alexander Glas
  • Publication number: 20120034760
    Abstract: In one embodiment, a method for forming the semiconductor device includes forming a first trench from a front side of a substrate. The substrate has a front side and an opposite back side, and the first trench having sidewalls and a bottom surface. A insulator layer is formed over the sidewalls and the bottom surface. A first conductive layer is formed over a top portion of the sidewalls of the first trench. The substrate is separated along the first trench.
    Type: Application
    Filed: August 5, 2010
    Publication date: February 9, 2012
    Inventors: Berthold Schuderer, Carsten Ahrens
  • Publication number: 20110186972
    Abstract: A protective structure is produced by providing a semiconductor substrate with a doping of a first conductivity type. A semiconductor layer with a doping of a second conductivity type is applied at a surface of the semiconductor substrate. A buried layer with doping of a second conductivity type is formed in a first region of the semiconductor layer, wherein the buried layer is produced at the junction between the semiconductor layer and semiconductor substrate. A first dopant zone with a doping of a first conductivity type is formed in the first region of the semiconductor layer above the buried layer. A second dopant zone with a doping of a second conductivity type is formed in a second region of the semiconductor layer. An electrical insulation is formed between the first region and the second region of the semiconductor layer. A common connection device is formed for the first dopant zone and the second dopant zone.
    Type: Application
    Filed: April 12, 2011
    Publication date: August 4, 2011
    Inventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
  • Publication number: 20110169596
    Abstract: In one embodiment, an inductor has a substrate, a conductor disposed above the substrate and a seemless ferromagnetic material surrounding at least a first portion of the conductor.
    Type: Application
    Filed: January 12, 2010
    Publication date: July 14, 2011
    Inventors: Carsten Ahrens, Gunther Mackh, Klemens Pruegl
  • Patent number: 7888232
    Abstract: A protective structure is produced by providing a semiconductor substrate with a doping of a first conductivity type. A semiconductor layer with a doping of a second conductivity type is applied at a surface of the semiconductor substrate. A buried layer with doping of a second conductivity type is formed in a first region of the semiconductor layer, wherein the buried layer is produced at the junction between the semiconductor layer and semiconductor substrate. A first dopant zone with a doping of a first conductivity type is formed in the first region of the semiconductor layer above the buried layer. A second dopant zone with a doping of a second conductivity type is formed in a second region of the semiconductor layer. An electrical insulation is formed between the first region and the second region of the semiconductor layer. A common connection device is formed for the first dopant zone and the second dopant zone.
    Type: Grant
    Filed: May 14, 2008
    Date of Patent: February 15, 2011
    Assignee: Infineon Technologies AG
    Inventors: Andre Schmenn, Damian Sojka, Carsten Ahrens
  • Patent number: 7816791
    Abstract: A bonding pad on a substrate has a first metal structure establishing an electrical connection between a device and a bonding area, and a second metal structure arranged at the bonding area. The first metal structure extends, within the bonding area, at least over part of the bonding area between the substrate and the second metal structure, so as to contact the second metal structure, the second metal structure being harder than the first metal structure.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: October 19, 2010
    Assignee: Infineon Technologies AG
    Inventors: Carsten Ahrens, Sven Albers, Klaus Gnannt, Ulrich Krumbein, Gunther Mackh, Patrick Schelauske, Berthold Schuderer, Georg Seidemann
  • Patent number: 7763520
    Abstract: A capacitor device includes a substrate, a first conductive structure, a second conductive structure, a dielectric layer structure, and a recess in the substrate. The first and second conductive structures are disposed on opposite sides of the dielectric layer structure, and the dielectric layer structure extends in a meander-shaped manner in a cross-section through the recess.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: July 27, 2010
    Assignee: Infineon Technologies AG
    Inventors: Carsten Ahrens, Raimund Foerg, Klaus Koller, Kai-Olaf Subke
  • Publication number: 20080290462
    Abstract: A protective structure is produced by providing a semiconductor substrate with a doping of a first conductivity type. A semiconductor layer with a doping of a second conductivity type is applied at a surface of the semiconductor substrate. A buried layer with doping of a second conductivity type is formed in a first region of the semiconductor layer, wherein the buried layer is produced at the junction between the semiconductor layer and semiconductor substrate. A first dopant zone with a doping of a first conductivity type is formed in the first region of the semiconductor layer above the buried layer. A second dopant zone with a doping of a second conductivity type is formed in a second region of the semiconductor layer. An electrical insulation is formed between the first region and the second region of the semiconductor layer. A common connection device is formed for the first dopant zone and the second dopant zone.
    Type: Application
    Filed: May 14, 2008
    Publication date: November 27, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: ANDRE SCHMENN, DAMIAN SOJKA, CARSTEN AHRENS
  • Patent number: 7456094
    Abstract: A semiconductor device comprises a semiconductor substrate, an insulating layer on top of the substrate, a lateral field effect transistor comprising a drain region and a source region arranged in the substrate and a gate arranged above the substrate within the insulating layer, a drain runner arranged on top of the insulator layer above the drain region, a source runner arranged on top of the insulator layer above the source region, a gate runner arranged on top of the insulator layer outside an area defined by the drain runner and the source runner, a first coupling structure comprising a via for coupling the drain runner with the drain region, and a second coupling structure comprising a via for coupling the source runner with the source region.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: November 25, 2008
    Assignee: Infineon Technologies AG
    Inventors: Gordon Ma, Carsten Ahrens
  • Publication number: 20080067682
    Abstract: A bonding pad on a substrate has a first metal structure establishing an electrical connection between a device and a bonding area, and a second metal structure arranged at the bonding area. The first metal structure extends, within the bonding area, at least over part of the bonding area between the substrate and the second metal structure, so as to contact the second metal structure, the second metal structure being harder than the first metal structure.
    Type: Application
    Filed: September 12, 2007
    Publication date: March 20, 2008
    Inventors: Carsten Ahrens, Sven Albers, Klaus Gnannt, Ulrich Krumbein, Gunther Mackh, Patrick Schelauske, Berthold Schuderer, Georg Seidemann
  • Publication number: 20080029799
    Abstract: A capacitor device includes a substrate, a first conductive structure, a second conductive structure, a dielectric layer structure, and a recess in the substrate. The first and second conductive structures are disposed on opposite sides of the dielectric layer structure, and the dielectric layer structure extends in a meander-shaped manner in a cross-section through the recess.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 7, 2008
    Applicant: Infineon Technologies AG
    Inventors: Carsten Ahrens, Raimund Foerg, Klaus Koller, Kai-Olaf Subke