Patents by Inventor Chandlee B. Harrell
Chandlee B. Harrell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190115935Abstract: A source device includes a forward error correction encoder circuit to generate error correction protected blocks from video data packets. Each error correction protected block includes data words and error correction words. An encoder circuit encode X-bit words of the error correction protected blocks into Y-bit encoded words for transmission to a sink device over one or more multimedia lanes of a multimedia communication link, where X is smaller than Y.Type: ApplicationFiled: April 3, 2017Publication date: April 18, 2019Applicant: Lattice Semiconductor CorporationInventors: Sergey Yarygin, Gyudong KIM, Laurence A. Thompson, Kihong Kim, Chandlee B. Harrell
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Patent number: 9769417Abstract: Aspects relate to transmission of metadata from a source to a sink device, and optionally through one or more intermediaries. A source device encodes metadata into what would have been a blanking area of a field to be transmitted, according to a current video format. The source device encodes a timing for an active video data signal that is modified from a timing that would be used only for transmission of video data at a current resolution. A separate indicator from the source, or a negotiation between source and sink allows the sink to determine what part of the data indicated as being active video data is metadata, and to use that metadata for controlling aspects of the video display, and to use other parts of the received video data as video data for display. A sink can signal supported capabilities to a source.Type: GrantFiled: October 30, 2015Date of Patent: September 19, 2017Assignee: Lattice Semiconductor CorporationInventors: Sergey Yarygin, Laurence A Thompson, Chandlee B Harrell, Gyudong Kim
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Patent number: 9703729Abstract: Embodiments of the present disclosure are related to identifying the orientation of a multimedia link connected between a source device and a sink device. A sink device includes a plurality of pins that are configured to interface with a plurality of pins of the multimedia link. The sink device identifies based on the values of one or more pins of the plurality of pins of the sink device whether the multimedia link is connected to the sink device. Further, the sink device determines an orientation of the multimedia link connected to the sink device. The multimedia link can be in one of two orientations, straight or flipped. The sink device may communicate the orientation of the multimedia link to the source device. The source device may perform lane mapping based on whether the multimedia link is in the straight or flipped orientation.Type: GrantFiled: April 2, 2015Date of Patent: July 11, 2017Assignee: Lattice Semiconductor CorporationInventors: Shrikant Ranade, Gyudong Kim, Chandlee B Harrell
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Patent number: 9553634Abstract: A device converts between electrical duplex and optical signals. In one embodiment, such a device includes an echo cancellation circuit that reduces the echo from an incoming optical signal.Type: GrantFiled: December 8, 2014Date of Patent: January 24, 2017Assignee: Lattice Semiconductor CorporationInventors: Joohong Choi, Kihong Kim, Gyudong Kim, Chandlee B. Harrell
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Patent number: 9490965Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.Type: GrantFiled: June 4, 2015Date of Patent: November 8, 2016Assignee: Lattice Semiconductor CorporationInventors: Inyeol Lee, Baegin Sung, Hanwoong Sohn, Shinje Tahk, Sun Woo Baek, Chandlee B. Harrell
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Patent number: 9479279Abstract: Embodiments of the invention are generally directed to multiple protocol tunneling using time division operations. An embodiment of an apparatus includes an interface for communication with a second apparatus, the interface including a shared communication link; and a multiplexer to multiplex data of each of multiple protocols into time slots for transmission, the protocols including a first protocol. The time slots are distributed among the protocols, where the distribution of the time slots among the protocols includes assigning one or more time slots to the first protocol to enable the data of the first protocol to meet one or more performance requirements for the first protocol.Type: GrantFiled: June 11, 2013Date of Patent: October 25, 2016Assignee: Lattice Semiconductor CorporationInventors: Jeffrey M. Gilbert, Hoon Choi, Chandlee B. Harrell, Gyudong Kim, Young Il Kim, Ju Hwan Yi
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Publication number: 20160164572Abstract: A device converts between electrical duplex and optical signals. In one embodiment, such a device includes an echo cancellation circuit that reduces the echo from an incoming optical signal.Type: ApplicationFiled: December 8, 2014Publication date: June 9, 2016Inventors: Joohong Choi, Kihong Kim, Gyudong Kim, Chandlee B. Harrell
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Patent number: 9356402Abstract: In one embodiment, a source device and sink device communicate with one another via a multimedia link. The multimedia link includes a cable and a plug. The cable includes one or more data lines, power lines, ground lines or control bus lines. The plug includes a plurality of pins each connected to the one or more lines included in the cable. The plug also includes a ground plane and a power plane, wherein a ground pin of the plug connects the ground plane to the ground line of the cable of the multimedia link and a power pin of the plug connects the ground plane to the power line of the cable. In one example, the ground plane and power plane are placed within a threshold distance of one another, such that the power line connected to the power plane via the power pin behaves as a signal return path.Type: GrantFiled: March 2, 2015Date of Patent: May 31, 2016Assignee: Lattice Semiconductor CorporationInventors: Baegin Sung, Chandlee B. Harrell, Gyudong Kim, Shrikant Ranade
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Publication number: 20150286587Abstract: Embodiments of the present disclosure are related to identifying the orientation of a multimedia link connected between a source device and a sink device. A sink device includes a plurality of pins that are configured to interface with a plurality of pins of the multimedia link. The sink device identifies based on the values of one or more pins of the plurality of pins of the sink device whether the multimedia link is connected to the sink device. Further, the sink device determines an orientation of the multimedia link connected to the sink device. The multimedia link can be in one of two orientations, straight or flipped. The sink device may communicate the orientation of the multimedia link to the source device. The source device may perform lane mapping based on whether the multimedia link is in the straight or flipped orientation.Type: ApplicationFiled: April 2, 2015Publication date: October 8, 2015Inventors: Shrikant Ranade, Gyudong Kim, Chandlee B. Harrell
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Publication number: 20150270946Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.Type: ApplicationFiled: June 4, 2015Publication date: September 24, 2015Inventors: Inyeol Lee, Baegin Sung, Hanwoong Sohn, Shinje Tahk, Sun Woo Baek, Chandlee B. Harrell
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Publication number: 20150255933Abstract: In one embodiment, a source device and sink device communicate with one another via a multimedia link. The multimedia link includes a cable and a plug. The cable includes one or more data lines, power lines, ground lines or control bus lines. The plug includes a plurality of pins each connected to the one or more lines included in the cable. The plug also includes a ground plane and a power plane, wherein a ground pin of the plug connects the ground plane to the ground line of the cable of the multimedia link and a power pin of the plug connects the ground plane to the power line of the cable. In one example, the ground plane and power plane are placed within a threshold distance of one another, such that the power line connected to the power plane via the power pin behaves as a signal return path.Type: ApplicationFiled: March 2, 2015Publication date: September 10, 2015Inventors: Baegin Sung, Chandlee B. Harrell, Gyudong Kim, Shrikant Ranade
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Patent number: 9071410Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.Type: GrantFiled: January 7, 2015Date of Patent: June 30, 2015Assignee: Silicon Image, Inc.Inventors: Inyeol Lee, Baegin Sung, Hanwoong Sohn, Shinje Tahk, Sun Woo Baek, Chandlee B. Harrell
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Publication number: 20150117580Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.Type: ApplicationFiled: January 7, 2015Publication date: April 30, 2015Inventors: Inyeol Lee, Baegin Sung, Hanwoong Sohn, Shinje Tahk, Sun Woo Baek, Chandlee B. Harrell
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Patent number: 8958497Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.Type: GrantFiled: March 15, 2013Date of Patent: February 17, 2015Assignee: Silicon Image, Inc.Inventors: Inyeol Lee, Baegin Sung, Hanwoong Sohn, Shinje Tahk, Sun Woo Baek, Chandlee B. Harrell
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Publication number: 20130336334Abstract: Embodiments of the invention are generally directed to multiple protocol tunneling using time division operations. An embodiment of an apparatus includes an interface for communication with a second apparatus, the interface including a shared communication link; and a multiplexer to multiplex data of each of multiple protocols into time slots for transmission, the protocols including a first protocol. The time slots are distributed among the protocols, where the distribution of the time slots among the protocols includes assigning one or more time slots to the first protocol to enable the data of the first protocol to meet one or more performance requirements for the first protocol.Type: ApplicationFiled: June 11, 2013Publication date: December 19, 2013Applicant: Silicon Image, Inc.Inventors: Jeffrey M. Gilbert, Hoon Choi, Chandlee B. Harrell, Gyudong Kim, Young Il Kim, Ju Hwan Yi
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Publication number: 20130329828Abstract: Embodiments of the invention are generally directed to simultaneous transmission of clock and bidirectional data over a communication channel. An embodiment of a transmitting device includes a modulator to generate a modulated signal including a clock signal and a data signal, the clock signal being modulated by a first signal edge of the modulated signal and the data signal being modulated by a position of a second signal edge of the modulated signal; a driver to drive the modulated signal on a communication channel; an echo canceller to subtract reflected signals on the communication channel; and a data recovery module to recover a signal received on the communication channel, the received signal being encoded by Return-to-Zero (RZ) encoding, the signal being received simultaneously with driving the modulated signal on the communication channel.Type: ApplicationFiled: March 15, 2013Publication date: December 12, 2013Applicant: Silicon Image, Inc.Inventors: Inyeol Lee, Baegin Sung, Hanwoong Sohn, Shinje Tahk, Sun Woo Baek, Chandlee B. Harrell
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Patent number: 7724261Abstract: A processor having a compare extension of an instruction set architecture which incorporates a set of high performance floating point operations. The instruction set architecture incorporates a variety of data formats including single precision and double precision data formats, as well as the paired-single data format that allows two simultaneous operations on a pair of operands. The extension includes instructions directed to a magnitude compare of floating point numbers and conversions between a pair of 32-bit fixed point integers and paired-single floating point format.Type: GrantFiled: June 4, 2007Date of Patent: May 25, 2010Assignee: MIPS Technologies, Inc.Inventors: Radhika Thekkath, G. Michael Uhler, Ying-wai Ho, Chandlee B. Harrell
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Patent number: 7242414Abstract: A processor having a compare extension of an instruction set architecture which incorporates a set of high performance floating point operations. The instruction set architecture incorporates a variety of data formats including single precision and double precision data formats, as well as the paired-single data format that allows two simultaneous operations on a pair of operands. The extension includes instructions directed to a magnitude compare of floating point numbers and conversions between a pair of 32-bit fixed point integers and paired-single floating point format.Type: GrantFiled: July 30, 1999Date of Patent: July 10, 2007Assignee: MIPS Technologies, Inc.Inventors: Radhika Thekkath, G. Michael Uhler, Ying-wai Ho, Chandlee B. Harrell
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Patent number: 6732259Abstract: A processor having a conditional branch extension of an instruction set architecture which incorporates a set of high performance floating point operations. The instruction set architecture incorporates a variety of data formats including single precision and double precision data formats, as well as the paired-single data format that allows two simultaneous operations on a pair of operands. The extension includes instructions directed to branching if, for example, either one of two condition codes is false or true, if any of three condition codes are false or true, or if any one of four condition codes are false or true.Type: GrantFiled: July 30, 1999Date of Patent: May 4, 2004Assignee: MIPS Technologies, Inc.Inventors: Radhika Thekkath, G. Michael Uhler, Ying-wai Ho, Chandlee B. Harrell
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Patent number: 6714197Abstract: A processor having an arithmetic extension of an instruction set architecture which incorporates a set of high performance floating point operations. The instruction set architecture incorporates a variety of data formats including single precision and double precision data formats, as well as the paired-single data format that allows two simultaneous operations on a pair of operands. The extension includes instructions directed to reduction add, reduction multiply, reciprocal, and reciprocal square root.Type: GrantFiled: July 30, 1999Date of Patent: March 30, 2004Assignee: MIPS Technologies, Inc.Inventors: Radhika Thekkath, G. Michael Uhler, Ying-wai Ho, Chandlee B. Harrell