Abstract: An apparatus in a computer system for handling data transfer between a first data processing system and a second data processing system is described. The apparatus includes a buffer for storing data received from the first system at a first data transfer rate and then transferred to the second system at a second data transfer rate. The buffer generates a first indication signal when substantially full and a second indication signal when substantially empty. A first counter counts a first predetermined time interval when receiving the first indication signal, and generates a third indication signal when reaching the first predetermined time interval. The first counter stops counting and returns to an initial state when not receiving the first indication signal. A second counter counts a second predetermined time interval when receiving the second indication signal, and generates a fourth indication signal when reaching the second predetermined time interval.

Abstract: An electronic logic and computer implemented apparatus and method for accessing graphic geometric data within a computer display system utilizing an SIMD environment. The present invention spreads the vertex data structure of geometric primitives across multiple memories allowing much higher bandwidth access into the data structure for greater performance. The present invention eliminates branches from the processing of triangle and quadrilateral primitives allowing full utilization of SIMD processors. The present invention utilizes an indirection circuit and software to control the order of coupling of these memory units to the inputs of specialized graphic processors. Therefore, the indirection mechanism allows a geometric data structure to be spread across multiple memories in a multi-memory/multi-bus environment with indirection across these multiple busses and memories.

Abstract: A circuit is described for providing switching between two asynchronous clocking signals in a graphics generation apparatus. In transitioning from one clocking signal to the other, the ending clocking signal ends at the end of a complete cycle, and the beginning clocking signal begins at the beginning of a new cycle. There is dead time between the clocking signals long enough to prevent transients which could disturb the operation of the system. The clocking signals are used to control data transfers of a graphics processor within the graphics generation apparatus.