Abstract: A method for forming a semiconductor structure is provided. The method includes forming a spacer layer along a first fin structure and a second fin structure, etching a first portion of the spacer layer and the first fin structure to form first fin spacers and a first recess between the first fin spacers, etching a second portion of the spacer layer and the second fin structure to form second fin spacers and a second recess between the second fin spacers, and forming a first source/drain feature in the first recess and a second source/drain feature in the second recess. The second fin structure is wider than the first fin structure. The first fin spacers have a first height, and the second fin spacers have a second height that is greater than the first height.

Abstract: The present disclosure describes a semiconductor structure with a dielectric liner. The semiconductor structure includes a substrate and a fin structure on the substrate. The fin structure includes a stacked fin structure, a fin bottom portion below the stacked fin structure, and an isolation layer between the stacked fin structure and the bottom fin portion. The semiconductor structure further includes a dielectric liner in contact with an end of the stacked fin structure and a spacer structure in contact with the dielectric liner.

Abstract: An electrostatic discharge protection circuit is provided. The electrostatic discharge protection circuit includes first, second, and third transistors and a discharge circuit. The first transistor has a first gate, a first drain coupled to the bonding pad, and a first source coupled to a first node. The second transistor has a second gate coupled to a power terminal, a second drain coupled to the first gate, and a second source coupled to a ground. The third transistor has a third gate coupled to the power terminal, a third drain coupled to the first node, and a third source coupled to the ground. The discharge circuit is controlled by a driving voltage at the first node. In response to an electrostatic discharge event occurring on the bonding pad, the discharge circuit provides a discharge path between the bonding pad and the ground according to the driving voltage.

Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.

Abstract: The present invention provides a control method of an electronic device, wherein the control method includes the steps of: establishing pre-linked buffers in a memory; wirelessly receiving a frame; generating a plurality of MPDUs according to the frame, wherein each of the MPDUs comprises at least one MSDU; writing the MSDUs of the plurality of MPDUs into the pre-linked buffers, wherein each buffer is configured to store one MSDU; generating a command to read in-order MPDUs from the memory if the memory has the in-order MPDUs.

Abstract: A smart wearable device has a signal calibration function executed by a signal calibration method and applied to a finger, a limb and/or a neck of a user. The smart wearable device includes at least one physiological signal detector, at least one pressure detector and an operation processor. The at least one physiological signal detector is adapted to abut against a detection area of the user for detecting a physiological signal. The at least one pressure detector is disposed around the at least one physiological signal detector and adapted to detect a pressure value of the detection area. The operation processor is electrically connected with the at least one physiological signal detector and the at least one pressure detector. The operation processor is adapted to optimize the physiological signal when the pressure value exceeds a predefined pressure threshold.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: A method of fabricating a photomask includes selectively exposing portions of a photomask blank to radiation to change an optical property of the portions of the photomask blank exposed to the radiation, thereby forming a pattern of exposed portions of the photomask blank and unexposed portions of the photomask blank. The pattern corresponds to a pattern of semiconductor device features.

Abstract: A magnetic tunnel junction (MTJ) memory cell and a metallic etch mask portion are formed over a substrate. At least one dielectric etch stop layer is deposited over the metallic etch mask portion, and a via-level dielectric layer is deposited over the at least one dielectric etch stop layer. A via cavity may be etched through the via-level dielectric layer, and a top surface of the at least one dielectric etch stop layer is physically exposed. The via cavity may be vertically extended by removing portions of the at least one dielectric etch stop layer and the metallic etch mask portion. A contact via structure is formed directly on a top surface of the top electrode in the via cavity to provide a low-resistance contact to the top electrode.

Abstract: A display device includes a display module and a camera module. The camera module includes a first housing, a second housing and a camera unit. The first housing is movably disposed on the display module. The second housing is separably connected to the first housing. The camera unit is disposed on the second housing. The second housing is able to move with the first housing in relative to the display module, such that the camera unit is exposed from the display module or hidden in the display module. When the second housing is separated from the first housing, the second housing is able to rotate in relative to the first housing, so as to adjust an orientation of the camera unit.

Abstract: A control method in use of a flyback power converter is disclosed to provide an operation power source supplying power to a power controller controlling a main power switch. The flyback power converter has a transformer with a primary winding and an auxiliary winding. The main power switch and the primary winding are connected in series. A chopper switch and a buffer inductor are connected in series between the auxiliary winding and the power controller. The power controller turns ON the main power switch for an ON time to energize the transformer, and turns ON the chopper switch for at least a time period during the ON time, so that during the time period the buffer inductor conducts an induced current flowing from the auxiliary winding and through the chopper switch, to build up the operation power source.

Abstract: A p-GaN high-electron-mobility transistor (HEMT) includes a buffer layer stacked on a substrate, a channel layer stacked on the buffer layer, a supply layer stacked on the channel layer, a doped layer stacked on the supply layer, and a hydrogen barrier layer covering the supply layer and the doped layer. A source and a drain are electrically connected to the channel layer and the supply layer, respectively. A gate is located on the doped layer. The hydrogen barrier layer is doped with fluorine.

Abstract: A directional coupler is configured to receive a continuous light waveform and split the waveform into two carrier signals. Ring modulators are configured to receive the carrier signals and binary data and modulate the carrier signals based on the binary data. A combiner is configured to combine the modulated carrier signals into a four-level pulse amplitude modulation (PAM4) signal.

Abstract: A manufacturing method of an electronic device is disclosed by the present disclosure. The manufacturing method includes providing a substrate, wherein the substrate includes a plurality of working areas, and each of the plurality of working areas includes a plurality of first recesses and a plurality of second recesses; disposing a plurality of first electronic units in the plurality of first recesses of the plurality of working areas through fluid transfer; identifying a defective working area from the plurality of working areas, wherein at least one of the plurality of first recesses of the defective working area has no electronic unit or a defective first electronic unit disposed therein; and disposing at least one repairing electronic unit in at least one of the plurality of second recesses of the defective working area through laser transfer.

Abstract: An integrated circuit (IC) device includes a master latch circuit having a first clock input and a data output, a slave latch circuit having a second clock input and a data input electrically coupled to the data output of the master latch circuit, and a clock circuit. The clock circuit is electrically coupled to the first clock input by a first electrical connection configured to have a first time delay between the clock circuit and the first clock input. The clock circuit is electrically coupled to the second clock input by a second electrical connection configured to have a second time delay between the clock circuit and the second clock input. The first time delay is longer than the second time delay.

Abstract: Provided are FinFET devices and methods of forming the same. A dummy gate having gate spacers on opposing sidewalls thereof is formed over a substrate. A dielectric layer is formed around the dummy gate. An upper portion of the dummy gate is removed and upper portions of the gate spacers are removed, so as to form a first opening in the dielectric layer. A lower portion of the dummy gate is removed to form a second opening below the first opening. A metal layer is formed in the first and second openings. The metal layer is partially removed to form a metal gate.

Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.

Abstract: The disclosure provides a method of active immunotherapy for a cancer patient, comprising administering vaccines against Globo series antigens (i.e., Globo H, SSEA-3 and SSEA-4). Specifically, the method comprises administering Globo H-CRM197 (OBI-833/821) in patients with cancer. The disclosure also provides a method of selecting a cancer patient who is suitable as treatment candidate for immunotherapy. Exemplary immune response can be characterized by reduction of the severity of disease, including but not limited to, prevention of disease, delay in onset of disease, decreased severity of symptoms, decreased morbidity and delayed mortality.

Abstract: The present disclosure provides an electronic assembly including a semiconductor device package. The semiconductor device package includes a first package and a conductive element. The first package includes an electronic component and a protection layer covering the electronic component. The conductive element is supported by the protection layer and electrically connected with the electronic component through an electrical contact. A method for manufacturing a semiconductor device package is also provided in the present disclosure.