Patents by Inventor Chang Lin

Chang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096895
    Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Jui-Chien Huang, Shih-Cheng Chen, Chih-Hao Wang, Kuo-Cheng Chiang, Zhi-Chang Lin, Jung-Hung Chang, Lo-Heng Chang, Shi Ning Ju, Guan-Lin Chen
  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Publication number: 20240091799
    Abstract: A connecting structure for a liquid container includes a receiving groove. The liquid container having a suction tube is disposed in the receiving groove. A top end of the receiving groove is engaged with a connecting base. A front side of the connecting base is pivotally connected to a locking assembly protruding frontwards. A liftable base being movable along a top-bottom direction and a front-rear direction is disposed in an inner side of the connecting base, and has a bottom frame engaging with a sleeve that is for being connected to and communicating with a liquid pipeline and fits around the suction tube. Two extending arms extending frontwards out of the bottom frame are pivotally connected to the locking assembly. A left side and a right side of the bottom frame are pivotally connected to two swinging arms that extend backwards and are pivotally connected to the connecting base.
    Type: Application
    Filed: September 17, 2022
    Publication date: March 21, 2024
    Applicant: National Taipei University of Technology
    Inventors: CHI-CHUAN PENG, CHEN-CHING TING, TZU-CHIAO LIN, HO CHANG
  • Publication number: 20240094626
    Abstract: A pellicle for an extreme ultraviolet (EUV) photomask includes a pellicle frame and a main membrane attached to the pellicle frame. The main membrane includes a plurality of nanotubes, and each of the plurality of nanotubes is covered by a coating layer containing Si and one or more metal elements.
    Type: Application
    Filed: April 12, 2023
    Publication date: March 21, 2024
    Inventors: Pei-Cheng HSU, Wei-Hao LEE, Huan-Ling LEE, Hsin-Chang LEE, Chin-Hsiang LIN
  • Publication number: 20240098909
    Abstract: An electronic device includes a first component and a second component. The first component includes a first housing and a protrusion element. The first housing has a first cover plate, and the protrusion element is disposed on the first cover plate. The second component is rotationally assembled with the first component along a first direction. The second component includes a second housing, an elastic structure, and a switching element. The elastic structure has an elastic post. The second housing has a second cover plate having a through hole. One part of the elastic post passes through the through hole and is exposed on the second cover plate. The protrusion element moves along a first direction relative to the elastic structure, such that the elastic post is squeezed by the protrusion element to move along a second direction and presses the switching element.
    Type: Application
    Filed: June 16, 2023
    Publication date: March 21, 2024
    Inventors: HSIN-CHANG LIN, BO-YEN CHEN
  • Publication number: 20240094625
    Abstract: A method of making a semiconductor device includes forming at least one fiducial mark on a photomask. The method further includes defining a pattern including a plurality of sub-patterns on the photomask in a pattern region. The defining the pattern includes defining a first sub-pattern of the plurality of sub-patterns having a first spacing from a second sub-pattern of the plurality of sub-patterns, wherein the first spacing is different from a second spacing between the second sub-pattern and a third sub-pattern of the plurality of sub-patterns.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Hsin-Chang LEE, Ping-Hsun LIN, Chih-Cheng LIN, Chia-Jen CHEN
  • Publication number: 20240096971
    Abstract: A method including providing a device including a gate structure and a source/drain feature adjacent to the gate structure. An insulating layer (e.g., CESL, ILD) is formed over the source/drain feature. A trench is etched in the insulating layer to expose a surface of the source/drain feature. A semiconductor material is then formed in the etched trench on the surface of the source/drain feature. The semiconductor material is converted to a silicide.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Xusheng WU, Chang-Miao LIU, Ying-Keung LEUNG, Huiling SHANG, Youbo LIN
  • Publication number: 20240097661
    Abstract: A scan flip-flop circuit includes a selection circuit including first and second input terminals coupled to first and second I/O nodes, a flip-flop circuit coupled to the selection circuit, a first driver coupled between the flip-flop circuit and the first I/O node, and a second driver coupled between the flip-flop circuit and the second I/O node. The selection circuit and drivers receive a scan direction signal. In response to a first logic level of the scan direction signal, the selection circuit responds to a first signal received at the first input terminal, and the second driver outputs a second signal responsive to a flip-flop circuit output signal. In response to a second logic level of the scan direction signal, the selection circuit responds to a third signal received at the second input terminal, and the first driver outputs a fourth signal responsive to the flip-flop circuit output signal.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 21, 2024
    Inventors: Huaixin XIAN, Tzu-Ying LIN, Liu HAN, Jerry Chang Jui KAO, Qingchao MENG, Xiangdong CHEN
  • Publication number: 20240097520
    Abstract: An axial flux motor includes a rotor assembly and a stator assembly. The rotor assembly has magnets. The stator assembly has a circuit substrate, segmented iron cores, and a coil. The circuit substrate extends radially. The segmented iron cores are supported on the circuit substrate to be opposite to the magnet in the axial direction. Segmented iron cores arranged in the circumferential direction. A coil is sleeved on a segmented iron core. Holding seats of an insulating material correspond respectively to the segmented iron cores. A holding seat abuts with and covers a segmented iron core from both axial sides and the circumferential direction, and is used for winding the coil. The circuit substrate has slot holes. A slot hole is used for embedding and positioning a portion of a holding seat that protrudes more towards one axial side than the coil.
    Type: Application
    Filed: August 28, 2023
    Publication date: March 21, 2024
    Inventors: Keng-Chang WU, Guo-Jhih YAN, Hsiu-Ying LIN, Kuo-Min WANG
  • Patent number: 11935969
    Abstract: A photodetector includes a first semiconductor layer, an absorption structure, a second semiconductor layer, and a barrier structure. The absorption structure is located on the first semiconductor layer, and having a first conduction band, a first valence band, and a first band gap. The second semiconductor layer is located on the absorption structure, and having a second conduction band, a second valence band, and a second band gap. The barrier structure is located between the absorption structure and the second semiconductor layer, and having a third conduction band, a third valence band, and a third band gap. The third conduction band is greater than the second conduction band or the third valence band is less than the second valence band.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: March 19, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Shih-Chang Lee, Shiuan-Leh Lin, I-Hung Chen, Chu-Jih Su, Chao-Shun Huang
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 11935793
    Abstract: A method includes forming a source/drain region in a semiconductor fin; after forming the source/drain region, implanting first impurities into the source/drain region; and after implanting the first impurities, implanting second impurities into the source/drain region. The first impurities have a lower formation enthalpy than the second impurities. The method further includes after implanting the second impurities, annealing the source/drain region.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Chang Lin, Tien-Shun Chang, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 11935981
    Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 19, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
  • Patent number: 11935794
    Abstract: A method of forming a semiconductor transistor device. The method comprises forming a channel structure over a substrate and forming a first source/drain structure and a second source/drain structure on opposite sides of the fin structure. The method further comprises forming a gate structure surrounding the fin structure. The method further comprises flipping and partially removing the substrate to form a back-side capping trench while leaving a lower portion of the substrate along upper sidewalls of the first source/drain structure and the second source/drain structure as a protective spacer. The method further comprises forming a back-side dielectric cap in the back-side capping trench.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Huan-Chieh Su, Cheng-Chi Chuang, Chih-Hao Wang, Zhi-Chang Lin, Li-Zhen Yu
  • Publication number: 20240088291
    Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chang Sun, Sheng-Chih Lai, Yu-Wei Jiang, Kuo-Chang Chiang, TsuChing Yang, Feng-Cheng Yang, Chung-Te Lin
  • Publication number: 20240089581
    Abstract: An electronic system including an image sensor, a face detection engine, an eye detection engine and an eye protection engine is provided. The image sensor captures an image. The face detection engine recognizes a user face in the image. The eye detection engine recognizes user eyes in the image. The eye protection engine turns off a display device when the user eyes are recognized in the image but the user face is not recognized in the image.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: HAN-CHANG LIN, GUO-ZHEN WANG, NIEN-TSE CHEN
  • Publication number: 20240090336
    Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chang-Lin YANG, Chung-Te LIN, Sheng-Yuan CHANG, Han-Ting LIN, Chien-Hua HUANG
  • Publication number: 20240081649
    Abstract: A wearable device and a method for performing a registration process in the wearable device are provided. The wearable device includes a light source, a light sensor and a microcontroller that performs the method. In the method, the light source is activated to emit a detection light and the light sensor senses a reflected light. A light intensity of the reflected light is calculated. Specifically, an upper limit and a lower limit are referred to for detecting whether the wearable device is properly worn by a person. For example, since the wearable device can be worn on the person's wrist, the registration value is used to detect whether the wearable device is away from the wrist.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Inventors: CHUN-CHIH CHEN, YUNG-CHANG LIN, MING-HSUAN KU
  • Publication number: 20240088145
    Abstract: Examples of an integrated circuit with gate cut features and a method for forming the integrated circuit are provided herein. In some examples, a workpiece is received that includes a substrate and a plurality of fins extending from the substrate. A first layer is formed on a side surface of each of the plurality of fins such that a trench bounded by the first layer extends between the plurality of fins. A cut feature is formed in the trench. A first gate structure is formed on a first fin of the plurality of fins, and a second gate structure is formed on a second fin of the plurality of fins such that the cut feature is disposed between the first gate structure and the second gate structure.
    Type: Application
    Filed: November 27, 2023
    Publication date: March 14, 2024
    Inventors: Zhi-Chang Lin, Wei-Hao Wu, Jia-Ni Yu, Chih-Hao Wang, Kuo-Cheng Ching
  • Patent number: D1018559
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: March 19, 2024
    Assignee: Shenzhen Intellirocks Tech Co., Ltd.
    Inventors: Ruixin Lin, Chang Chen, Wenlong Wu