Patents by Inventor Chang-Oh Jeong

Chang-Oh Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8946005
    Abstract: A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: February 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Je-Hun Lee, Do-Hyun Kim, Eun-Guk Lee, Chang-Oh Jeong
  • Patent number: 8932917
    Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: January 13, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Byoung-June Kim, Jae-Ho Choi, Chang-Oh Jeong, Sung-Hoon Yang, Je-Hun Lee, Do-Hyun Kim, Hwa-Yeul Oh, Yong-Mo Choi
  • Publication number: 20140354923
    Abstract: A polarizer and a liquid crystal display including the polarizer, the polarizer including a plurality of metal lines extending in one direction and being arranged at regular intervals; and a plurality of low reflection layers on the plurality of metal lines, the plurality of low reflection layers contacting respective upper parts of the plurality of metal lines and having an interval and a width about equal to an interval and a width of the plurality of metal lines, wherein the interval of the plurality of metal lines is smaller than a wavelength of a visible ray, and light incident from an upper side of the plurality of low reflection layers is reflected with reflectivity equal to or smaller than 10%.
    Type: Application
    Filed: November 26, 2013
    Publication date: December 4, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dae-Young LEE, Joon Yong PARK, Kyung Seop KIM, Jung Gun Nam, Chang Oh JEONG, Gug Rae JO
  • Patent number: 8847228
    Abstract: A thin film transistor array panel includes: a semiconductor layer disposed on an insulation substrate; a gate electrode overlapping the semiconductor layer; a source electrode and a drain electrode overlapping the semiconductor layer; a first barrier layer disposed between the source electrode and the semiconductor layer; and a second barrier layer disposed between the drain electrode and the semiconductor layer, wherein the first barrier layer and the second barrier layer include nickel-chromium (NiCr).
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: September 30, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyung Seop Kim, Byeong-Beom Kim, Joon Yong Park, Chang Oh Jeong, Hong Long Ning, Dong Min Lee
  • Patent number: 8822279
    Abstract: A thin film transistor display panel includes a substrate, a gate wire on the substrate and including a gate line and a gate electrode; a gate insulating layer on the gate wire; a semiconductor layer on the gate insulating layer; a data wire including a source electrode on the semiconductor layer, a drain electrode opposing the source electrode with respect to the gate electrode, and a data line; a passivation layer on the data wire having a contact hole exposing the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the contact hole. The gate wire has a first region and second region where the gate line and the gate electrode are positioned, respectively. The thickness of the gate wire in the first region is greater than the thickness of the gate wire in the second region.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: September 2, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyung-Jun Kim, Chang-Oh Jeong, Jae-Hong Kim
  • Publication number: 20140204300
    Abstract: The present invention relates to a display device and a manufacturing method thereof, wherein a spoilage layer generated in a manufacturing process is removed, and a manufacturing method of a display device according to an exemplary embodiment of the present invention includes: forming a thin film transistor on a substrate including a plurality of pixel areas; forming a pixel electrode connected to the thin film transistor in the pixel area; forming a sacrificial layer on the pixel electrode; forming a barrier layer on the sacrificial layer; forming a common electrode on the barrier layer; forming a roof layer on the common electrode; patterning the barrier layer, the common electrode, and the roof layer to exposed a portion of the sacrificial layer thereby forming an injection hole; removing the sacrificial layer to form a microcavity for a plurality of pixel areas; removing the barrier layer.
    Type: Application
    Filed: August 7, 2013
    Publication date: July 24, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Hong Sick PARK, Seon-Il KIM, Min Ho MOON, Hyang-Shik KONG, Yeun Tae KIM, Chang Oh JEONG
  • Publication number: 20140175423
    Abstract: A thin film transistor array panel is provided. The thin film transistor array panel includes a substrate, a seed layer positioned on the substrate, and a semiconductor layer positioned on the seed layer, wherein a lattice mismatch between the seed layer and the semiconductor layer is equal to or less than 1.4%.
    Type: Application
    Filed: May 16, 2013
    Publication date: June 26, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Chang-Oh JEONG, Kyung Seop KIM, Hong Long NING, Byeong-Beom KIM, Joon Yong PARK, Jin Ho HWANG, Dong Min LEE
  • Patent number: 8759834
    Abstract: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: June 24, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Joo-Ae Youn, Yang-Ho Bae, Chang-Oh Jeong, Chong-Chul Chai, Pil-Sang Yun, Hong Long Ning, Byeong-Beom Kim
  • Publication number: 20140167054
    Abstract: The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).
    Type: Application
    Filed: January 27, 2014
    Publication date: June 19, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Je Hun LEE, Yang Ho BAE, Beom-Seok CHO, Chang Oh JEONG
  • Publication number: 20140076714
    Abstract: A sputtering device includes: a sputtering target; a substrate supporter facing the sputtering target and upon which a substrate is disposed; an anode mask between the sputtering target and the substrate which is on the substrate supporter; and a gas distribution member between the anode mask and the sputtering target, and including a plurality of gas distribution tubes separated from each other. Each gas distribution tube includes a plurality of discharge holes defined therein and through which gas is discharged to a vacuum chamber configured to receive the sputtering device.
    Type: Application
    Filed: February 6, 2013
    Publication date: March 20, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin Ho HWANG, Do-Hyun KIM, Sang Won SHIN, Woo Song KIM, Chang-Oh JEONG
  • Patent number: 8637869
    Abstract: The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu).
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: January 28, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Je Hun Lee, Yang Ho Bae, Beom-Seok Cho, Chang Oh Jeong
  • Publication number: 20140024157
    Abstract: A thin film transistor display panel includes a substrate, a gate wire on the substrate and including a gate line and a gate electrode; a gate insulating layer on the gate wire; a semiconductor layer on the gate insulating layer; a data wire including a source electrode on the semiconductor layer, a drain electrode opposing the source electrode with respect to the gate electrode, and a data line; a passivation layer on the data wire having a contact hole exposing the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the contact hole. The gate wire has a first region and second region where the gate line and the gate electrode are positioned, respectively. The thickness of the gate wire in the first region is greater than the thickness of the gate wire in the second region.
    Type: Application
    Filed: September 25, 2013
    Publication date: January 23, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventors: Hyung-Jun Kim, Chang-Oh Jeong, Jae-Hong Kim
  • Publication number: 20130320344
    Abstract: A thin film transistor array panel includes: a semiconductor layer disposed on an insulation substrate; a gate electrode overlapping the semiconductor layer; a source electrode and a drain electrode overlapping the semiconductor layer; a first barrier layer disposed between the source electrode and the semiconductor layer; and a second barrier layer disposed between the drain electrode and the semiconductor layer, wherein the first barrier layer and the second barrier layer include nickel-chromium (NiCr).
    Type: Application
    Filed: November 30, 2012
    Publication date: December 5, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyung Seop KIM, Byeong-Beom KIM, Joon Yong PARK, Chang Oh JEONG, Hong Long NING, Dong Min LEE
  • Publication number: 20130306973
    Abstract: A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT.
    Type: Application
    Filed: July 22, 2013
    Publication date: November 21, 2013
    Inventors: Joo-Ae YOUN, Yang-Ho BAE, Chang-Oh JEONG, Chong-Chul CHAI, Pil-Sang YUN, Honglong NING, Byeong-Beom KIM
  • Publication number: 20130306466
    Abstract: A sputtering target includes a plurality of targets and edges of the targets overlap each other.
    Type: Application
    Filed: September 14, 2012
    Publication date: November 21, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hong Long NING, Byeong-Beom KIM, Joon Yong PARK, Chang Oh JEONG, Sang Won SHIN, Dong Min LEE, Xun Zhu
  • Publication number: 20130295731
    Abstract: A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.
    Type: Application
    Filed: July 12, 2013
    Publication date: November 7, 2013
    Inventors: BYOUNG-JUNE KIM, Jae-Ho Choi, Chang-Oh Jeong, Sung-Hoon Yang, Je-Hun Lee, Do-Hyun Kim, Hwa-Yeul Oh, Yong-Mo Choi
  • Publication number: 20130293524
    Abstract: Exemplary embodiments of the present invention relate to a panel and a display device including the same, the panel including a substrate, a signal line arranged on the substrate, the signal line configured to transmit a driving signal, an insulating layer arranged on the signal line, and a pixel electrode and a contact assistant arranged on the insulating layer. The contact assistant is electrically connected to a portion of the signal line, the contact assistant includes indium zinc oxide doped with a metal oxide not including indium or zinc, and the metal oxide has a smaller Gibbs free energy than zinc oxide.
    Type: Application
    Filed: August 29, 2012
    Publication date: November 7, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Joon Yong PARK, Chang Oh JEONG, Byeong Beom KIM, Hong Long NING, Hyung Jun KIM, Sang Won SHIN
  • Publication number: 20130270565
    Abstract: A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer.
    Type: Application
    Filed: May 31, 2013
    Publication date: October 17, 2013
    Inventors: Chang-Oh JEONG, Woo-Sung SOHN, Dong-Gyu KIM, Shi-Yul KIM, Ki-Yeup LEE, Jean-Ho SONG
  • Patent number: 8558230
    Abstract: A thin film transistor (TFT) substrate and a method of fabricating the same are provided. The thin film transistor substrate may have low resistance characteristics and may have reduced mutual diffusion and contact resistance between an active layer pattern and data wiring. The thin film transistor substrate may include gate wiring formed on an insulating substrate. Oxide active layer patterns may be formed on the gate wiring and may include a first substance. Data wiring may be formed on the oxide active layer patterns to cross the gate wiring and may include a second substance. Barrier layer patterns may be disposed between the oxide active layer patterns and the data wiring and may include a third substance.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: October 15, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Dong-Hoon Lee, Je-Hun Lee, Do-Hyun Kim, Hee-Tae Kim, Chang-Oh Jeong, Pil-Sang Yun, Ki-Won Kim
  • Patent number: 8558240
    Abstract: A thin film transistor display panel includes a substrate, a gate wire on the substrate and including a gate line and a gate electrode; a gate insulating layer on the gate wire; a semiconductor layer on the gate insulating layer; a data wire including a source electrode on the semiconductor layer, a drain electrode opposing the source electrode with respect to the gate electrode, and a data line; a passivation layer on the data wire having a contact hole exposing the drain electrode; and a pixel electrode on the passivation layer and connected to the drain electrode through the contact hole. The gate wire has a first region and second region where the gate line and the gate electrode are positioned, respectively. The thickness of the gate wire in the first region is greater than the thickness of the gate wire in the second region.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: October 15, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyung-Jun Kim, Chang-Oh Jeong, Jae-Hong Kim