Patents by Inventor Charles R. Lefurgy
Charles R. Lefurgy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8276012Abstract: A mechanism is provided for priority-based power capping. A power management controller identifies a set of priorities for a set of partitions of the data processing system. The power management controller determines whether a measured power of the data processing system exceeds a power cap for the data processing system. Responsive to the measured power exceeding the power cap, the power management controller sends a set of commands to a set of component actuators to adjust one or more of a set of operation parameters for a set of components associated with the set of partitions using the set of priorities. The set of component actuators adjust the one or more of the set of operational parameters associated with the set of component in order to reduce a power consumption of the data processing system.Type: GrantFiled: June 30, 2009Date of Patent: September 25, 2012Assignee: International Business Machines CorporationInventors: Heather L. Hanson, Charles R. Lefurgy, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20120116599Abstract: A mechanism is provided for allocating energy budgets to a plurality of logical partitions. An overall energy budget for the data processing system and a total of a set of requested initial energy budgets for the plurality of partitions are determined. A determination is made as to whether the total of the set of requested initial energy budgets for the plurality of partitions is greater than the overall energy budget for the data processing system. Responsive to the total of the set of requested initial energy budgets exceeding the overall energy budget, an initial energy budget is allocated to each partition in the plurality of partitions based on at least one of priority or proportionality of each partition in the plurality of partitions such that a total of the initial energy budgets for the plurality of partitions does not exceed the overall energy budget of the data processing system.Type: ApplicationFiled: November 5, 2010Publication date: May 10, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Richard L. Arndt, Heather L. Hanson, Charles R. Lefurgy, Karthick Rajamani, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20120102468Abstract: A remote debugging technique provides anonymity of program variables and selective debugging capability by providing a registration facility by which program variables are registered locally with a debugging module. An external program then communicates with the debugging modules and observes and/or modifies the program variables by specifying either an index or a variable name. The need to publish symbols is thereby averted and only the variables that a developer is interested in observing need be registered.Type: ApplicationFiled: October 20, 2010Publication date: April 26, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Charles R. Lefurgy
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Patent number: 8103884Abstract: Methods and products for managing power consumption of a computer and computers for which power consumption is managed. The computer includes the computer including a computer processor and embodiments of the present invention include providing, by an in-band power manger to an out-of-band power manager, a proposed performance state (‘p-state’) for the computer processor; determining, by the out-of-band power manager, in dependence upon a power setpoint and currently-measured operating metrics of the computer processor, whether to approve the proposed p-state; and if the out-of-band power manager approves the proposed p-state, setting operating parameters of the computer processor according to the approved p-state.Type: GrantFiled: June 25, 2008Date of Patent: January 24, 2012Assignee: International Business Machines CorporationInventors: Thomas M. Brey, Wesley M. Felter, Sumeet Kochar, Charles R. Lefurgy, Ryuji Orita, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20120005513Abstract: A performance control technique for a processing system that includes one or more adaptively-clocked processor cores provides improved performance/power characteristics. An outer feedback loop adjusts the power supply voltage(s) provided to the power supply voltage domain(s) powering the core(s), which may be on a per-core basis or include multiple cores per voltage domain. The outer feedback loop operates to ensure that each core is meeting specified performance, while the cores also include an inner feedback loop that adjusts their processor clock or other performance control mechanism to maximize performance under present operating conditions and within a margin of safety. The performance of each core is measured and compared to a target performance. If the target performance is not met for each core in a voltage domain, the voltage is raised for the voltage domain until all cores meet the target performance.Type: ApplicationFiled: June 30, 2010Publication date: January 5, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bishop C. Brock, John B. Carter, Alan J. Drake, Michael S. Floyd, Charles R. Lefurgy, Malcolm S. Ware
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Patent number: 8041521Abstract: Methods, apparatus, and products as disclosed for estimating power consumption of computing components configured in a computing system that include: selecting, by a power estimation module, a plurality of calibration datasets from a calibration dataset repository, each calibration dataset specifying calibration power consumption by one or more computing components in the computing system for a calibration workload at a plurality of calibration operating points; measuring, by the power estimation module, a current power consumption by one or more measured computing components in the computing system for a current workload at a current operating point; determining, by the power estimation module, an estimated power consumption for the measured computing components at a proposed operating point in dependence upon the selected calibration datasets and the current power consumption for the current workload at the current operating point; and administering the computing system in dependence upon the estimated poweType: GrantFiled: November 28, 2007Date of Patent: October 18, 2011Assignee: International Business Machines CorporationInventors: Tyler K. Bletsch, Ajay Dholakia, Wesley M. Felter, Charles R. Lefurgy
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Patent number: 8015566Abstract: A data processing system attributes energy consumption to individual program segments or threads includes a processor that executes a first thread during a first portion of a measurement interval and a second thread during a second portion of the interval. An energy monitor measures the total energy during the interval. Energy attribution code attributes a first amount of the total energy to the first thread and a second amount to the second thread based in part on the execution times of the threads. The code may define a range of possible energy values by determining maximum and minimum energy constraints for the threads. The invention may also be extended to a multiprocessor environment and to a simultaneous multithreading (SMT) processor. In addition, the process may be expanded to determine energy consumed by various peripheral units such as hard disk controllers and the like.Type: GrantFiled: January 13, 2005Date of Patent: September 6, 2011Assignee: Lenovo (Singapore) Pte. Ltd.Inventors: Charles R. Lefurgy, Malcolm Scott Ware
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Patent number: 8010764Abstract: A method and system for decreasing power consumption in memory arrays having usage-driven power management provides decreased power consumption in the memory array of a processing system. Per-page usage information is gathered on memory by a memory controller and periodically evaluated by software. The software distinguishes between more frequently accessed pages and less frequently accessed pages by analyzing the gathered usage information and periodically migrates physical memory pages in order to group less frequently accessed pages and more frequently access pages in separately power-managed memory ranks. When used in conjunction with a usage-driven power management mechanism, the ranks containing the less frequently accessed pages can enter deeper power-saving states and/or any power-saving state for longer periods.Type: GrantFiled: July 7, 2005Date of Patent: August 30, 2011Assignee: International Business Machines CorporationInventors: Thomas Walter Keller, Jr., Charles R. Lefurgy, Hai Huang
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Patent number: 8001402Abstract: A co-operative mechanism in which a service processor and a host CPU (with an as running thereupon) work together to implement both power capping and utilization-based power savings, and with negligible side effects. Preferably, a 2-level modulation scheme is employed to undertake both power capping and energy savings simultaneously. Preferably, a frequency governor in the as running on a host processor saves power by modulating p-states based on a shared table, thus avoiding SMIs. The range of the p- I states in the shared table is adjusted to implement power capping in conjunction with power sensors in the system. This adjustment can be done either by a service processor, which can monitor total energy consumption, or an as or software running on the host processor, which can read energy consumption from the service processor and adjust the shared table.Type: GrantFiled: December 5, 2007Date of Patent: August 16, 2011Assignee: International Business Machines CorporationInventors: Vivek Kashyap, Charles R Lefurgy, Dipankar Sarma
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Patent number: 7979729Abstract: A performance measure (e.g., processor speed) for computing components such as servers is optimized by creating models of power consumption versus the performance measure for each server, adding the power models to derive an overall power model, and calculating an optimum set point for the performance measure which corresponds to a power limit on the servers using the overall power model. The set point is then used to set power budgets for the servers based on their power models, and the servers maintain power levels no greater than their respective power budgets. The server power models are preferably created in real time by monitoring power consumption and the performance measure to derive sets of data points for the servers, and performing regression on the sets of data points to yield power models for the servers. Multiple server power models may be created for different program applications.Type: GrantFiled: November 29, 2007Date of Patent: July 12, 2011Assignee: International Business Machines CorporationInventors: Tyler K. Bletsch, Wesley M. Felter, Neven A. Gazala, Tibor Horvath, Charles R. Lefurgy
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Patent number: 7925901Abstract: A method and system for estimating processor utilization from power measurements provides an estimate of processor utilization that can be computed outside of the processor and operating system. Measurements of the processor power consumption are gathered over short intervals in a histogram. The idle power consumption of the processor is determined, and a threshold value higher than the idle power consumption level is computed from the idle power consumption. The number of histogram counts for bins greater than the threshold is normalized to the total number of measurements, providing a fractional value that corresponds to the processor utilization over the measurement interval. The fractional value can then be used in a power management algorithm that adjusts the frequency and optionally the voltage of the processor or group of processors based on their utilization.Type: GrantFiled: March 15, 2007Date of Patent: April 12, 2011Assignee: International Business Machines CorporationInventors: Wesley M. Felter, Charles R. Lefurgy, Tyler Bletsch
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Patent number: 7904287Abstract: A method and system for real-time prediction of power usage for a change to another performance state provides input data for power management decision-making processes or for display to system operators. The unit(s) for which power usage is predicted may be a single processor in a uni-processor system or may extend up to the level of facilities within a complex of processing facilities. The method and system gather real-time data on the power consumption of the unit(s) and create a model, such as a regression model, of power versus performance. A resulting power usage change required by a prospective nominal performance state change is shown as display data, or is transmitted to a power budgeting controller to inform the controller as to potential changes that can enhance system operation, such as managing tradeoffs of power allocated to various sub-units of a processing system.Type: GrantFiled: November 13, 2007Date of Patent: March 8, 2011Assignee: International Business Machines CorporationInventors: Charles R. Lefurgy, Madhu Saravana Sibi Govindan
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Patent number: 7840825Abstract: A method for autonomous dynamic voltage (v) and frequency (f) scaling (DVFS) of a microprocessor, wherein autonomous detection of phases of high microprocessor workload and prediction of their duration is performed (PID). The microprocessor frequency (f) will be temporarily increased (LUT) to an appropriate safe value (even beyond its nominal frequency) consistent with technological and ambient constraints in order to improve performance when the computer system comprising the microprocessor benefits most, while during phases of low microprocessor workload its frequency (f) and voltage (v) will be decreased to save energy. This technique exploits hidden performance capabilities and improves the total performance of a computer system without compromising operational stability. No additional hardware such as service processors is needed for contemporary computer systems supporting performance counters and DFVS already.Type: GrantFiled: August 14, 2007Date of Patent: November 23, 2010Assignee: International Business Machines CorporationInventors: Peter Altevogt, Hans Boettiger, Wesley M. Felter, Charles R. Lefurgy, Lutz Stiege, Malcolm S. Ware
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Patent number: 7783910Abstract: A system for associating power consumption with a network address. Network traffic is inspected to determine network addresses. The network addresses are assigned to one or more servers. A power output of a plurality of power outlets is measured to determine a power consumption of the one or more servers connected to the plurality of power outlets. The network addresses assigned to the one or more servers is associated with the power consumption of the one or more servers. A total power consumption is calculated for the one or more servers having an association of network addresses with power consumption. Then, the total power consumption is recorded for the one or more servers in a table and a user is provided access to the table.Type: GrantFiled: March 30, 2007Date of Patent: August 24, 2010Assignee: International Business Machines CorporationInventors: Wesley M. Felter, Charles R. Lefurgy
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Publication number: 20090327765Abstract: Methods and products for managing power consumption of a computer and computers for which power consumption is managed. The computer includes the computer including a computer processor and embodiments of the present invention include providing, by an in-band power manger to an out-of-band power manager, a proposed performance state (‘p-state’) for the computer processor; determining, by the out-of-band power manager, in dependence upon a power setpoint and currently-measured operating metrics of the computer processor, whether to approve the proposed p-state; and if the out-of-band power manager approves the proposed p-state, setting operating parameters of the computer processor according to the approved p-state.Type: ApplicationFiled: June 25, 2008Publication date: December 31, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. Brey, Wesley M. Felter, Sumeet Kochar, Charles R. Lefurgy, Ryuji Orita, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20090327764Abstract: Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state (‘p-state’) of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor.Type: ApplicationFiled: June 25, 2008Publication date: December 31, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Thomas M. Brey, Wesley M. Felter, Sumeet Kochar, Charles R. Lefurgy, Ryuji Orita, Freeman L. Rawson, III, Malcolm S. Ware
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Publication number: 20090150693Abstract: A co-operative mechanism in which a service processor and a host CPU (with an OS running thereupon) work together to implement both power capping and utilization-based power savings, and with negligible side effects. Preferably, a 2-level modulation scheme is employed to undertake both power capping and energy savings simultaneously. Preferably, a frequency governor in the OS running on a host processor saves power by modulating p-states based on a shared table, thus avoiding SMIs. The range of the p-states in the shared table is adjusted to implement power capping in conjunction with power sensors in the system. This adjustment can be done either by a service processor, which can monitor total energy consumption, or an OS or software running on the host processor, which can read energy consumption from the service processor and adjust the shared table.Type: ApplicationFiled: December 5, 2007Publication date: June 11, 2009Inventors: Vivek Kashyap, Charles R. Lefurgy, Dipankar Sarma
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Publication number: 20090144566Abstract: A performance measure (e.g., processor speed) for computing components such as servers is optimized by creating models of power consumption versus the performance measure for each server, adding the power models to derive an overall power model, and calculating an optimum set point for the performance measure which corresponds to a power limit on the servers using the overall power model. The set point is then used to set power budgets for the servers based on their power models, and the servers maintain power levels no greater than their respective power budgets. The server power models are preferably created in real time by monitoring power consumption and the performance measure to derive sets of data points for the servers, and performing regression on the sets of data points to yield power models for the servers. Multiple server power models may be created for different program applications.Type: ApplicationFiled: November 29, 2007Publication date: June 4, 2009Inventors: Tyler K. Bletsch, Wesley M. Felter, Neven A. Gazala, Tibor Horvath, Charles R. Lefurgy
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Publication number: 20090138219Abstract: Methods, apparatus, and products as disclosed for estimating power consumption of computing components configured in a computing system that include: selecting, by a power estimation module, a plurality of calibration datasets from a calibration dataset repository, each calibration dataset specifying calibration power consumption by one or more computing components in the computing system for a calibration workload at a plurality of calibration operating points; measuring, by the power estimation module, a current power consumption by one or more measured computing components in the computing system for a current workload at a current operating point; determining, by the power estimation module, an estimated power consumption for the measured computing components at a proposed operating point in dependence upon the selected calibration datasets and the current power consumption for the current workload at the current operating point; and administering the computing system in dependence upon the estimated poweType: ApplicationFiled: November 28, 2007Publication date: May 28, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tyler K. Bletsch, Ajay Dholakia, Wesley M. Felter, Charles R. Lefurgy
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Publication number: 20090125293Abstract: A method and system for real-time prediction of power usage for a change to another performance state provides input data for power management decision-making processes or for display to system operators. The unit(s) for which power usage is predicted may be a single processor in a uni-processor system or may extend up to the level of facilities within a complex of processing facilities. The method and system gather real-time data on the power consumption of the unit(s) and create a model, such as a regression model, of power versus performance. A resulting power usage change required by a prospective nominal performance state change is shown as display data, or is transmitted to a power budgeting controller to inform the controller as to potential changes that can enhance system operation, such as managing tradeoffs of power allocated to various sub-units of a processing system.Type: ApplicationFiled: November 13, 2007Publication date: May 14, 2009Inventors: Charles R. Lefurgy, Madhu Saravana Govindan