Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: A boost converter control method includes: receiving an output voltage; receiving an output voltage target; triggering a snooze phase start of an inactive load mode based on a comparison of the output voltage relative to the output voltage target plus a first output voltage target offset; and triggering a snooze phase end of the inactive load mode based on a comparison of the output voltage relative to the output voltage target plus a second output voltage target offset, the second output voltage target offset greater than the first output voltage target offset.

Abstract: An embodiment is an integrated circuit structure including a static random access memory (SRAM) cell having a first number of semiconductor fins, the SRAM cell having a first boundary and a second boundary parallel to each other, and a third boundary and a fourth boundary parallel to each other, the SRAM cell having a first cell height as measured from the third boundary to the fourth boundary, and a logic cell having the first number of semiconductor fins and the first cell height.

Abstract: A computer device, a setting method for a memory module, and a mainboard are provided. The computer device includes a memory module, a processor, and the mainboard. A basic input output system (BIOS) of the mainboard stores a custom extreme memory profile (XMP). When the processor executes the BIOS, so that the computer device displays a user interface (UI), the BIOS displays multiple default XMPs stored in the memory module and the custom XMP through the UI. The BIOS stores one of the default XMPs and the custom XMP to the memory module according to a selecting result of the one of the default XMPs and the custom XMP displayed on the UI.

Abstract: A system for processing and presenting a conversation includes a sensor, a processor, and a presenter. The sensor is configured to capture an audio-form conversation. The processor is configured to automatically transform the audio-form conversation into a transformed conversation. The transformed conversation includes a synchronized text, wherein the synchronized text is synchronized with the audio-form conversation. The presenter is configured to present the transformed conversation including the synchronized text and the audio-form conversation. The presenter is further configured to present the transformed conversation to be navigable, searchable, assignable, editable, and shareable.

Abstract: In an embodiment, a package includes an encapsulant laterally surrounding a first integrated circuit device and a second integrated circuit device, wherein the first integrated circuit device includes a die and a heat dissipation structure over the die; a sealant disposed over the heat dissipation structure; an adhesive disposed over the second integrated circuit device; and a lid disposed over the sealant and the adhesive, wherein the lid includes a first cooling passage and a second cooling passage, the first cooling passage including an opening at a bottom of the lid and aligned to the heat dissipation structure, the second cooling passage including channels aligned to the second integrated circuit device and being distant from the bottom of the lid.

Abstract: A method includes: constructing an on-wafer calibration piece model set that includes one or more on-wafer calibration piece models, where each of the one or more on-wafer calibration piece models has a corresponding on-wafer calibration piece; selecting an on-wafer calibration piece model from the on-wafer calibration piece model set; measuring the on-wafer calibration piece utilizing an on-wafer S parameter measurement system that is calibrated using a multi-thread TRL calibration method in a Terahertz frequency band, to obtain an S parameter of the on-wafer calibration piece; and calculating a plurality of different parameters that represent crosstalk of calibration pieces in the on-wafer calibration piece model, according to an admittance calculated according to the S parameter and an admittance formula corresponding to the on-wafer calibration piece model.

Abstract: A semiconductor device includes a fin-shaped structure on a substrate, a gate structure on the fin-shaped structure and an interlayer dielectric (ILD) layer around the gate structure, and a single diffusion break (SDB) structure in the ILD layer and the fin-shaped structure. Preferably, the SDB structure includes a bottom portion and a top portion on the bottom portion, in which the top portion and the bottom portion include different widths.

Abstract: Aspects concern a method for gathering image training data for training a machine learning model to detect features for vehicle navigation or vehicle control, comprising mounting a camera onto a vehicle or the driver of a vehicle, determining a location of the vehicle, determining a relevancy of the determined location for map data generation or vehicle control and recording a video with the camera if the determined relevancy is above a predetermined threshold and recording single images if the determined relevancy is below the predetermined threshold.

Abstract: A back-end energy storage isolation fly-back conversion apparatus (10) includes a return switch (Q1), a driving switch (Q2), an energy storage capacitor (Cs), a transformer (Ti), a resonant inductor (Lr), a first rectifier (104), an output capacitor (Cout), and a controller (116). The transformer (T1) includes a primary-side winding (Lm) and a secondary-side first winding (102). The return switch (Q1) is turned on by the controller (116), so that the energy storage capacitor (Cs) is charged by a primary-side current (I1) flowing through the resonant inductor (Lr), the primary-side winding (Lm), and the return switch (Q1), and the secondary-side first winding (102) is powered by the primary-side current (I1). When the primary-side current (I1) becomes negative, the energy storage capacitor (Cs) discharges through the return switch (Q1) and the primary-side winding (Lm) and continuously supplies power to the secondary-side first winding (102).

Abstract: The devices, systems, and methods described herein enable automatically configuring an electronic device using artificial intelligence (AI). The devices, systems, and methods enable accessing telemetry data representing device usage data, inputting the accessed telemetry data into machine learning models that are matched to device metadata, and determining notifications to publish to components of the electronic device. The notifications represent events predicted to occur on the electronic device. The notifications are published to the components of the electronic device such that the electronic device is configured according to the published notifications. The determined notifications enable the identification of optimal settings for the electronic device based on the usage pattern of the device and enable components of the electronic device to preemptively take action on events which are predicted to occur in the future.

Abstract: The present invention relates to a method for preparing a modified stem cell, including the following steps: a cell culture step: culturing stem cells in a first culture medium of a culture dish at a predetermined cell density, and removing the first culture medium after a first culture time to obtain a first cell intermediate; an activity stimulation step: preserving the first cell intermediate in a freezing container having a cell cryopreservation solution, and performing a constant temperature stimulation treatment or a variable temperature stimulation treatment for at least more than 1 day; and a product collection step: after completing the activity stimulation step, placing the freezing container in an environment at a thawing temperature for thawing, and then removing the cell cryopreservation solution to obtain the modified stem cell. The modified stem cell can release at least one or more of IL-4, IL-5, IL-13, G-CSF, Fractalkine, and EGF.

Abstract: Positive reference spiked in collected sample for use in qualitatively and quantitatively detecting viral RNA.

Abstract: A circuit includes a control circuit having a first control circuit input, a second control circuit input, a first control circuit output, and a second control circuit output, and a first transistor having a first current terminal, a second current terminal, and a control terminal, the control terminal coupled to the first control circuit output, the first current terminal coupled to the first control circuit input and to a second transistor, and the second current terminal adapted to be coupled to the second transistor, a logic circuit having a first logic input, a second logic input, and a logic output, the first logic input coupled to the second control circuit output and a switch having a first switch terminal, a second switch terminal, and a switch control terminal, the switch control terminal coupled to the logic output and the first switch terminal coupled to the second current terminal.

Abstract: A bonding method of package components and a bonding apparatus are provided. The method includes: providing at least one first package component and a second package component, wherein the at least one first package component has first electrical connectors and a first dielectric layer at a bonding surface of the at least one first package component, and the second package component has second electrical connectors and a second dielectric layer at a bonding surface of the second package component; bringing the at least one first package component and the second package component in contact, such that the first electrical connectors approximate or contact the second electrical connectors; and selectively heating the first electrical connectors and the second electrical connectors by electromagnetic induction, in order to bond the first electrical connectors with the second electrical connectors.

Abstract: Interconnect structures that maximize integrated circuit (IC) density and corresponding formation techniques are disclosed. An exemplary IC device includes a gate layer extending along a first direction. An interconnect structure disposed over the gate layer includes odd-numbered interconnect routing layers oriented along a second direction that is substantially perpendicular to the first direction and even-numbered interconnect routing layers oriented along a third direction that is substantially parallel to the first direction. In some implementations, a ratio of a gate pitch of the gate layer to a pitch of a first of the even-numbered interconnect routing layers to a pitch of a third of the even-numbered interconnect routing layers is 3:2:4. In some implementations, a pitch of a first of the odd-numbered interconnect routing layers to a pitch of a third of the odd-numbered interconnect routing layers to a pitch of a seventh of the odd-numbered interconnect routing layers is 1:1:2.

Abstract: A semiconductor package includes a package substrate; semiconductor devices disposed on the package substrate; a package ring disposed on a perimeter of the package substrate surrounding the semiconductor devices; a cover including silicon bonded to the package ring and covering the semiconductor devices; and a thermal interface structure (TIS) thermally connecting the semiconductor devices to the cover.

Abstract: The present disclosure is directed to systems and methods for performing reading comprehension with machine learning. More specifically, the present disclosure is directed to a Neural Symbolic Reader (example implementations of which may be referred to as NeRd), which includes a reader to encode the passage and question, and a programmer to generate a program for multi-step reasoning. By using operators like span selection, the program can be executed over a natural language text passage to generate an answer to a natural language text question. NeRd is domain-agnostic such that the same neural architecture works for different domains. Further, NeRd is compositional such that complex programs can be generated by compositionally applying the symbolic operators.

Abstract: A boost converter that provides a wide average current limiting range includes a switch coupled to an inductor output and a power input, a diode coupled to the inductor output and an output terminal load and configured to conduct current in only one direction away from the inductor output and toward the output terminal, a clamp circuit coupled to the diode and the switch, and a minimum time off module coupled to the diode and the switch. The clamp circuit is configured to clamp an inductor output current to a reference current while the converter is operating in a continuous conduction mode (CCM) of operation. The minimum time off module is configured to cause the inductor output current to be zero for at least a time Toff while the converter is operating in a pulse frequency modulation (PFM) mode of operation.

Abstract: A device includes an integrated circuit die attached to a substrate; a lid attached to the integrated circuit die; a sealant on the lid; a spacer structure attached to the substrate adjacent the integrated circuit die; and a cooling cover attached to the spacer structure, wherein the cooling cover extends over the lid, wherein the cooling cover attached to the lid by the sealant. In an embodiment, the device includes a ring structure on the substrate, wherein the ring structure is between the spacer structure and the integrated circuit die.