Abstract: A semiconductor device includes a first active region, a second active region and a dielectric wall. The second active region disposed adjacent to the first active region, and there is a first space between the first active region and the second active region. The dielectric wall is formed within the first space and has a first sidewall and a second sidewall opposite to the first sidewall. The first sidewall and the second sidewall opposite to the first sidewall continuously extend along a plane.

Abstract: A method includes: obtaining impact values for characteristic conditions; selecting training data subsets respectively from training data sets according to the impact values; obtaining a candidate model and an evaluation value based on the training data subsets; supplementing the training data subsets according to the impact values; obtaining another candidate model and another evaluation value based on training data subsets thus supplemented; repeating the step of supplementing the training data subset, and the step of obtaining another candidate model and another evaluation value based on the training data subsets thus supplemented; and selecting one of the candidate models as a prediction model based on the evaluation values.

Abstract: Various embodiments of the present disclosure are directed towards a method for forming a semiconductor structure. The method includes forming a stack of semiconductor layers comprising a plurality of first semiconductor layers and a plurality of second semiconductor layers over a semiconductor substrate. A first stack of masking layers is formed over the stack of semiconductor layers with a first width and a second stack of masking layers is formed laterally offset from the stack of semiconductor layers with a second width less than the first width. A patterning process is performed on the semiconductor substrate and the stack of semiconductor layers, thereby defining a first fin structure laterally adjacent to a second fin structure. The first fin structure has the first width and the second fin structure has the second width. The stack of semiconductor layers directly overlies the first fin structure and has the first width.

Abstract: Provide are a positioning reference signal generation method and apparatus, a communication system and a storage medium. The method includes: generating a positioning frequency domain sequence according to time-frequency resource information and system configuration information, where the time-frequency resource information includes the number Nprsslot of allocated system symbols consecutive in time, and the system configuration information includes positioning subcarrier spacing ?fprs; and generating, based on the positioning frequency domain sequence, positioning time domain data consecutive in a time period of the Nprsslot consecutive system symbols.

Abstract: Methods for manufacturing a display device are provided. The methods include providing a plurality of light-emitting units and a substrate. The methods also include transferring the light-emitting units to a transfer head. The methods further include attaching at least one of the plurality of light-emitting units on the transfer head to the substrate by a bonding process, wherein the transfer head and the substrate satisfy the following equation during the bonding process: 0 ? ? ? T ? ? 1 T ? ? 2 ? A ? ( T ) ? dT - ? T ? ? 1 T ? ? 3 ? E ? ( T ) ? dT ? ? < 0.01 wherein A(T) is the coefficient of thermal expansion of the transfer head, E(T) is the coefficient of thermal expansion of the substrate, T1 is room temperature, T2 is the temperature of the transfer head, and T3 is the temperature of the substrate.

Abstract: An absorption type near-infrared filter comprising a first multilayer film, a second multilayer film, and an absorption film, wherein in the ultraviolet band, the difference of between the wavelength with the transmittance at 80% of the absorbing film and the wavelength with the reflectivity at 80% of the first multilayer film falls in the range between 25 nm and 37 nm, the difference of between the wavelength with the transmittance at 50% of the absorbing film and the wavelength with the reflectivity at 50% of the first multilayer film falls in the range between 6 nm and 14 nm, and the difference of between the wavelength with the transmittance at 20% of the absorbing film and the wavelength with the reflectivity at 20% of the first multilayer film falls in the range between ?6 nm and 2.5 nm.

Abstract: An adaptive vehicle headlight is provided for being installed on a vehicle body for use. The adaptive vehicle headlight includes a light body, an optical lens, a driver, and a control unit. The optical lens, the driver, and the control unit are integrated into the light body. In practice, the optical lens can optionally include a light distributing member. The control unit can cause an operation of the driver according to a tilt angle of the vehicle body, such that the optical lens and/or the light distributing member are rotated to a predetermined angle, so as to produce an illumination pattern in a horizontal state.

Abstract: A chamber adaptor and a manufacturing method thereof. The chamber adaptor includes: a housing provided with a gas inlet, a gas outlet, a chamber inlet, and a chamber outlet, where the gas inlet is configured to be removably connected to a main board device, the gas outlet is configured to be removably connected to a respiratory pathway, the chamber inlet is configured to be removably connected to an input end of a chamber for storing liquid and the chamber outlet is configured to be removably connected to an output end of the chamber, the chamber adaptor further includes a control circuit and at least one sensing apparatus, where the at least one sensing apparatus is arranged on one end of the control circuit closer to the gas outlet and extends into a gas output channel.

Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.

Abstract: A terminal, comprising one or a plurality of processors, wherein the one or plurality of processors execute a machine-readable instruction to perform: receiving an object in a live streaming; displaying the object on the terminal; detecting a keyword in the object corresponding to a function in the live streaming; and triggering the function in response to an operation on the object. The present disclosure may allow the streamers to generate or amend an object such as stickers on the live streaming room in a more flexible manner. At the same time, the viewer may perform an operation on the object to realize a corresponding function in a more convenient manner. Therefore, the interaction among streamers and viewers may be increased, and the user experience may also be enhanced.

Abstract: A device includes an active region, a gate structure, a source/drain epitaxial structure, an epitaxial layer, a metal alloy layer, a contact, and a contact etch stop layer. The gate structure is across the active region. The source/drain epitaxial structure is over the active region and adjacent the gate structure. The epitaxial layer is over the source/drain epitaxial structure. The metal alloy layer is over the epitaxial layer. The contact is over the metal alloy layer. The contact etch stop layer lines sidewalls of the source/drain epitaxial structure. The metal alloy layer is spaced apart from the contact etch stop layer.

Abstract: A resistive memory apparatus including a memory cell array, at least one dummy transistor and a control circuit is provided. The memory cell array includes a plurality of memory cells. Each of the memory cells includes a resistive switching element. The dummy transistor is electrically isolated from the resistive switching element. The control circuit is coupled to the memory cell array and the dummy transistor. The control circuit is configured to provide a first bit line voltage, a source line voltage and a word line voltage to the dummy transistor to drive the dummy transistor to output a saturation current. The control circuit is further configured to determine a value of a second bit line voltage for driving the memory cells according to the saturation current. In addition, an operating method and a memory cell array of the resistive memory apparatus are also provided.

Abstract: In accordance with embodiments, a memory array is formed with a multiple patterning process. In embodiments a first trench is formed within a multiple layer stack and a first conductive material is deposited into the first trench. After the depositing the first conductive material, a second trench is formed within the multiple layer stack, and a second conductive material is deposited into the second trench. The first conductive material and the second conductive material are etched.

Abstract: A calculation system for predicting a proppant embedding depth based on a shale softening effect is provided, including a sampling test terminal, a scheduling module, a monitoring module, and a calculation module, wherein the scheduling module, the monitoring module, and the calculation module are connected in communication, and the monitoring module is connected to an external operating system through a wireless network, wherein the external operating system is configured to perform a hydraulic fracturing operation and receive a first control signal and/or a second control signal from the monitoring module. The sampling test terminal is configured to test the samples and obtain test data. The scheduling module is configured to determine a target construction parameter.

Abstract: A method and a kit for detecting Mycobacterium tuberculosis are provided. The method includes a step of performing a nested qPCR assay to a specimen. The nested qPCR assay includes a first round of amplification using external primers and a second round of amplification using internal primers and a probe. The external primers have sequences of SEQ ID NOs. 1 and 2, and the internal primers and the probe have sequences of SEQ ID NOs. 3 to 5.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a stack of semiconductor layers spaced apart from and aligned with each other, a first source/drain epitaxial feature in contact with a first one or more semiconductor layers of the stack of semiconductor layers, and a second source/drain epitaxial feature disposed over the first source/drain epitaxial feature. The second source/drain epitaxial feature is in contact with a second one or more semiconductor layers of the stack of semiconductor layers. The structure further includes a first dielectric material disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature and a first liner disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature. The first liner is in contact with the first source/drain epitaxial feature and the first dielectric material.

Abstract: The present disclosure provides a method for preparing lithium iron phosphate from ferric hydroxyphosphate, including: purifying ferrous sulfate to form a ferrous sulfate solution, adding hydrogen peroxide, phosphoric acid, an ammonium dihydrogen phosphate solution and ammonia water into the ferrous sulfate solution and then reacting to form a mixed slurry, holding the mixed slurry at a temperature for a period of time, and then washing with water and subjecting to press filtration to form ferric hydroxyphosphate precursors with different iron-phosphorus ratios; then flash drying, sintering at a high temperature, and pulverizing to obtain ferric hydroxyphosphate precursors with different iron-phosphorus ratios and different specific surface areas.

Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.

Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.