Abstract: A method for forming a FinFET device structure is provided. The method for forming a FinFET device structure includes forming a fin structure over a substrate, and forming a source/drain (S/D) structure over the fin structure. The method for forming a FinFET device structure also includes forming an inter-layer dielectric (ILD) structure covering the S/D structure, and forming a gate structure over the fin structure and adjacent to the S/D structure. The method for forming a FinFET device structure further includes forming a first hard mask layer over the gate structure, and forming a second hard mask layer over the first hard mask layer. In addition, the method for forming a FinFET device structure includes etching the ILD structure to form an opening exposing the S/D structure. The opening and a recess in the second hard mask layer are formed simultaneously.

Abstract: A photolithography system includes a variable-volume buffer tank, a dispensing system connected to the buffer tank, and a valve configured to release gas from a head space of the buffer tank while blocking the release of liquid from the head space. A storage container has an opening at the bottom and drains to the buffer tank through that opening. The buffer tank has a storage capacity sufficient to receive the full contents of the storage container. The system supplies chemical solutions to the dispensing system while keeping the chemical solutions from contact with air and other gases.

Abstract: A FinFET device structure is provided. The FinFET device structure includes a fin structure formed over a substrate and a gate structure formed over the fin structure. The FinFET device structure also includes a contact formed over the fin structure and adjacent to the gate structure. The FinFET device structure further includes a first hard mask layer formed over the gate structure, and an upper portion of the first hard mask layer has an inverted-T shape. In addition, the FinFET device structure includes a second hard mask layer formed over the contact, and the second hard mask layer has a T shape.

Abstract: Semiconductor systems, apparatuses and methods are provided. In one embodiment, an extreme ultraviolet lithography system includes a substrate stage configured to secure a substrate at a first vertical level, wherein the substrate is deposited with a resist layer thereon; at least one electrode positioned at a second vertical level above the first vertical level; and a power source configured to apply an electric field across the at least one electrode and the substrate stage, including across a thickness of the resist layer when the substrate is secured on the substrate stage.

Abstract: A digital dental mesh segmentation method and a digital dental mesh segmentation device are provided. The digital dental mesh segmentation method includes: receiving a digital dental mesh, including a plurality of teeth; inserting a tooth interface separator at a tooth interface of the digital dental mesh, the tooth interface separator being at a first location; receiving a three-dimensional movement signal and a three-dimensional rotation signal to move and rotate the tooth interface separator from the first location to a second location; and segmenting the digital dental mesh according to the tooth interface separator at the second location to obtain an independent digital teeth model.

Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a resist layer over a substrate and performing an exposing process to the resist layer. The resist layer includes a polymer backbone, an acid labile group (ALG) bonded to the polymer backbone, a sensitizer bonded to the polymer backbone, a photo-acid generator (PAG), and a thermo-base generator (TBG). The method further includes baking the resist layer at a first temperature and subsequently at a second temperature. The second temperature is higher than the first temperature. The method further includes developing the resist layer in a developer, thereby forming a patterned resist layer.

Abstract: Semiconductor systems, apparatuses and methods are provided. In one embodiment, an extreme ultraviolet lithography system includes a substrate stage configured to secure a substrate at a first vertical level, wherein the substrate is deposited with a resist layer thereon; at least one electrode positioned at a second vertical level above the first vertical level; and a power source configured to apply an electric field across the at least one electrode and the substrate stage, including across a thickness of the resist layer when the substrate is secured on the substrate stage.

Abstract: The present disclosure provides lithography resist materials and corresponding lithography techniques for improving lithography resolution, in particular, by reducing swelling of resist layers during development. An exemplary lithography method includes performing a treatment process on a resist layer to cause cross-linking of acid labile group components of the resist layer via cross-linkable functional components, performing an exposure process on the resist layer, and performing a development process on the resist layer. In some implementations, the resist layer includes an exposed portion and an unexposed portion after the exposure process, and the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion. The treatment process is performed before or after the exposure process.

Abstract: Provided is a material composition and method that includes forming a patterned resist layer on a substrate. The patterned resist layer has a first pattern width, and the patterned resist layer has a first pattern profile having a first proportion of active sites. In some examples, the patterned resist layer is coated with a treatment material. In some embodiments, the treatment material bonds to surfaces of the patterned resist layer to provide a treated patterned resist layer having a second pattern profile with a second proportion of active sites greater than the first proportion of active sites. By way of example, and as part of the coating the patterned resist layer with the treatment material, a first pattern shrinkage process may be performed, where the treated patterned resist layer has a second pattern width less than a first pattern width.

Abstract: A method for forming openings in an underlayer includes: forming a photoresist layer on an underlayer formed on a substrate; exposing the photoresist layer; forming photoresist patterns by developing the exposed photoresist layer, the photoresist patterns covering regions of the underlayer in which the openings are to be formed; forming a liquid layer over the photoresist patterns; after forming the liquid layer, performing a baking process so as to convert the liquid layer to an organic layer in a solid form; performing an etching back process to remove a portion of the organic layer on a level above the photoresist patterns; removing the photoresist patterns, so as to expose portions of the underlayer by the remaining portion of the organic layer; forming the openings in the underlayer by using the remaining portion of the organic layer as an etching mask; and removing the remaining portion of the organic layer.

Abstract: An electronic device includes a display and a processor. The display displays a present application program in a first brightness. When the electronic device in normal-use status receives no user input for a predetermined idle time period, the processor determines whether the present application program is in a half-suspend list. If yes, the processor controls the electronic device to enter a half-suspend status and keep the present application program running, but controls the display to display the present application program in a second brightness, which is less bright than the first brightness. A half-suspend controlling method of the electronic device is also provided.

Abstract: A digital dental mesh segmentation method and a digital dental mesh segmentation device are provided. The digital dental mesh segmentation method includes: receiving a digital dental mesh, including a plurality of teeth; inserting a tooth interface separator at a tooth interface of the digital dental mesh, the tooth interface separator being at a first location; receiving a three-dimensional movement signal and a three-dimensional rotation signal to move and rotate the tooth interface separator from the first location to a second location; and segmenting the digital dental mesh according to the tooth interface separator at the second location to obtain an independent digital teeth model.

Abstract: Methods for forming a semiconductor structure including using a photoresist material are provided. The method for forming a semiconductor structure includes forming a material layer over a substrate and forming a photoresist layer over the material layer. The method for forming a semiconductor structure further includes performing an exposure process on the photoresist layer and developing the photoresist layer. In addition, the photoresist layer is made of a photoresist material comprising a photosensitive polymer, and the photosensitive polymer has a first photosensitive functional group bonding to a main chain of the photosensitive polymer and a first acid labile group bonding to the first photosensitive functional group.

Abstract: A device includes a semiconductor fin, a first source/drain feature, a second source/drain feature, and a dielectric plug. The first source/drain feature adjoins the semiconductor fin. The second source/drain feature adjoins the semiconductor fin. The dielectric plug extends from above the semiconductor fin into the semiconductor fin, the dielectric plug is between the first source/drain feature and the second source/drain feature. The dielectric plug includes a waist and a first portion below the waist, and a width of the waist is less than a width of the first portion of the dielectric plug.

Abstract: A method for forming openings in an underlayer includes: forming a photoresist layer on an underlayer formed on a substrate; exposing the photoresist layer; forming photoresist patterns by developing the exposed photoresist layer, the photoresist patterns covering regions of the underlayer in which the openings are to be formed; forming a liquid layer over the photoresist patterns; after forming the liquid layer, performing a baking process so as to convert the liquid layer to an organic layer in a solid form; performing an etching back process to remove a portion of the organic layer on a level above the photoresist patterns; removing the photoresist patterns, so as to expose portions of the underlayer by the remaining portion of the organic layer; forming the openings in the underlayer by using the remaining portion of the organic layer as an etching mask; and removing the remaining portion of the organic layer.

Abstract: An attraction-attachable electrically conductive pad includes a conductive film and at least one attaching film. The at least one attaching film is coupled to the conductive film and has a surface on which a plurality of miniature structures in the form of projections are formed such that the conductive film is attachable to a human skin through an attractive force of positive and negative charges between molecules of the projections. As such, in use, the arrangement of being attachable to a human skin through an attractive force of positive and negative charges between molecules of the projections helps prevent positional shifting of the conductive film during a detection operation and helps keep in a state of contacting a body surface, and helps keep comfortable and air ventilating for long term wear in order to achieve effective detection of physiological signals.

Abstract: The present disclosure provides lithography resist materials and corresponding lithography techniques for improving lithography resolution, in particular, by reducing swelling of resist layers during development. An exemplary lithography method includes performing a treatment process on a resist layer to cause cross-linking of acid labile group components of the resist layer via cross-linkable functional components, performing an exposure process on the resist layer, and performing a development process on the resist layer. In some implementations, the resist layer includes an exposed portion and an unexposed portion after the exposure process, and the treatment process reduces solubility of the unexposed portion to a developer used during the development process by increasing a molecular weight of a polymer in the unexposed portion. The treatment process is performed before or after the exposure process.

Abstract: A semiconductor device includes a substrate, a first source/drain feature, a second source/drain feature and a dielectric plug. The substrate has a semiconductor fin. The first source/drain feature is embedded in the semiconductor fin. The second source/drain feature is embedded in the semiconductor fin. The dielectric plug extends from above the semiconductor fin into the semiconductor fin. The dielectric plug is in between the first source/drain feature and the second source/drain feature. The dielectric plug is separated from the first source/drain feature and the second source/drain feature.

Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a resist layer over a substrate and performing an exposing process to the resist layer. The resist layer includes a polymer backbone, an acid labile group (ALG) bonded to the polymer backbone, a sensitizer bonded to the polymer backbone, a photo-acid generator (PAG), and a thermo-base generator (TBG). The method further includes baking the resist layer at a first temperature and subsequently at a second temperature. The second temperature is higher than the first temperature. The method further includes developing the resist layer in a developer, thereby forming a patterned resist layer.

Abstract: The present disclosure provides a method for planarization. The method includes providing a substrate having a top surface and a trench recessed from the top surface; coating a sensitive material layer on the top surface of the substrate, wherein the sensitive material layer fills in the trench; performing an activation treatment to the sensitive material layer so that portions of the material layer are chemically changed; and performing a wet chemical process to the sensitive material layer so that top portions of the sensitive material layer above the trench are removed, wherein remaining portions of the sensitive material layer have top surfaces substantially coplanar with the top surface of the substrate.