Patents by Inventor Cheng-Hung Lin

Cheng-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190252461
    Abstract: A LED display device is provided in the present disclosure, including multiple pixel units arranged in array on the substrate. Each of the pixel units includes three LEDs with different emitting colors. In each row of the pixel units, a first electrode of each LED is connected directly with a lateral through line. In each column of the pixel units, a second electrode of a red LED is electrically connected with a first vertical through line via a first via hole, a second electrode of a green LED is electrically connected with a second vertical through line via a second via hole, and a second electrode of a blue LED is electrically connected with a second vertical through line via a third via hole.
    Type: Application
    Filed: December 22, 2018
    Publication date: August 15, 2019
    Applicant: XIAMEN XM-PLUS TECHNOLOGY LTD
    Inventor: Cheng-Hung Lin
  • Patent number: 10319879
    Abstract: A semiconductor structure includes a first-type semiconductor layer, a second-type semiconductor layer, a light emitting layer and a hole supply layer. The light emitting layer is disposed between the first-type semiconductor layer and the second-type semiconductor layer. The hole supply layer is disposed between the light emitting layer and the second-type semiconductor layer, and the hole supply layer includes a first hole supply layer and a second hole supply layer. The first hole supply layer is disposed between the light emitting layer and the second hole supply layer, and a chemical formula of the first hole supply layer is Alx1Iny1Ga1-x1-y1N, wherein 0?x1<0.4, and 0?y1<0.4. The second hole supply layer is disposed between the first hole supply layer and the second-type semiconductor layer, a chemical formula of the second hole supply layer is Alx2Iny2Ga1-x2-y2N, wherein 0?x2<0.4, 0?y2<0.4, and x1>x2.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: June 11, 2019
    Assignee: Genesis Photonics Inc.
    Inventors: Cheng-Hung Lin, Jeng-Jie Huang, Chi-Feng Huang
  • Publication number: 20180199894
    Abstract: An intraoperative nerve evaluation device includes a flexible substrate, and a plurality of detection units disposed on the substrate and spaced apart from one another. Each of the detection units includes an electrode and a conductive wire electrically connected to the electrode. When the electrodes are attached to a nerve, a selected one of the electrodes is configured to receive an input signal via the corresponding conductive wire and to transmit the input signal to the nerve, and each of the electrodes other than the selected one is configured to receive from the nerve a response signal associated with the input signal and to transmit the response signal via the corresponding conductive wire.
    Type: Application
    Filed: November 20, 2017
    Publication date: July 19, 2018
    Inventors: Yu-Cheng Pei, Ting-Yu Chen, Cheng-Hung Lin, Jian-Jia Huang
  • Publication number: 20180083162
    Abstract: A nitrogen-containing semiconductor device including a first type doped semiconductor layer, a multiple quantum well layer and a second type doped semiconductor layer is provided. The multiple quantum well layer includes barrier layers and well layers, and the well layers and the barrier layers are arranged alternately. The multiple quantum well layer is located between the first type doped semiconductor layer and the second type doped semiconductor layer, and one of the well layers of the multiple quantum well layer is connected to the second type doped semiconductor layer.
    Type: Application
    Filed: September 19, 2017
    Publication date: March 22, 2018
    Applicant: Genesis Photonics Inc.
    Inventors: Hsin-Chiao Fang, Cheng-Hsueh Lu, Cheng-Hung Lin, Chi-Hao Cheng, Chi-Feng Huang
  • Publication number: 20170294924
    Abstract: The present invention discloses a decoding path selection device for decoding codewords generated by convolutional codes or turbo codes encoders in error correction codes, the decoding path selection device comprising: a branch metrics calculation unit for receiving incoming signals and calculating branch metrics values; a programmable generalized trellis router for generating a decoding path control signal according to the turbo code or convolutional code specification employed by one of communications standards; a multiplexer for receiving the branch metrics values from the branch metrics calculation unit and the decoding path control signal from the programmable generalized trellis router and selecting a corresponding branch metrics value; a recursive calculation unit, connected after the multiplexer and for receiving the corresponding branch metrics value from the multiplexer; and an a-posteriori probability calculation unit, connected after the recursive calculation unit and for calculating a final decod
    Type: Application
    Filed: August 1, 2016
    Publication date: October 12, 2017
    Inventors: Cheng-Hung Lin, Tsung-Ju Hsieh
  • Patent number: 9787331
    Abstract: The present invention discloses a decoding path selection device for decoding codewords generated by convolutional codes or turbo codes encoders in error correction codes, the decoding path selection device comprising: a branch metrics calculation unit for receiving incoming signals and calculating branch metrics values; a programmable generalized trellis router for generating a decoding path control signal according to the turbo code or convolutional code specification employed by one of communications standards; a multiplexer for receiving the branch metrics values from the branch metrics calculation unit and the decoding path control signal from the programmable generalized trellis router and selecting a corresponding branch metrics value; a recursive calculation unit, connected after the multiplexer and for receiving the corresponding branch metrics value from the multiplexer; and an a-posteriori probability calculation unit, connected after the recursive calculation unit and for calculating a final decod
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: October 10, 2017
    Assignee: YUAN ZE UNIVERSITY
    Inventors: Cheng-Hung Lin, Tsung-Ju Hsieh
  • Publication number: 20170263814
    Abstract: A semiconductor structure includes a first-type semiconductor layer, a second-type semiconductor layer, a light emitting layer and a hole supply layer. The light emitting layer is disposed between the first-type semiconductor layer and the second-type semiconductor layer. The hole supply layer is disposed between the light emitting layer and the second-type semiconductor layer, and the hole supply layer includes a first hole supply layer and a second hole supply layer. The first hole supply layer is disposed between the light emitting layer and the second hole supply layer, and a chemical formula of the first hole supply layer is Alx1Iny1Ga1-x1-y1N, wherein 0?x1<0.4, and 0?y1<0.4. The second hole supply layer is disposed between the first hole supply layer and the second-type semiconductor layer, a chemical formula of the second hole supply layer is Alx2Iny2Ga1-x2-y2N, wherein 0?x2<0.4, 0?y2<0.4, and x1>x2.
    Type: Application
    Filed: March 8, 2017
    Publication date: September 14, 2017
    Applicant: Genesis Photonics Inc.
    Inventors: Cheng-Hung Lin, Jeng-Jie Huang, Chi-Feng Huang
  • Publication number: 20170220069
    Abstract: A method for controlling a docking apparatus using a portable electronic device permits enhanced functionality for the portable electronic device. In the control method, the docking apparatus receives I2C messages in a first byte format from the portable electronic device over a first I2C bus. The docking apparatus translates the I2C message from the first byte format to a second byte format and transmits the translated I2C message over a second I2C bus to an I2C-compatible device.
    Type: Application
    Filed: January 28, 2016
    Publication date: August 3, 2017
    Inventors: HUNG-CHANG LIN, CHENG-HUNG LIN
  • Publication number: 20170063213
    Abstract: A flyback converter includes: a transformer including a primary winding and a secondary winding; a first switch coupled to the primary winding; a first control module configured to control the first switch; a second switch coupled to the secondary winding; and a second control module configured to control the second switch, such that the second switch operates in an ON state during a first time period and during a second time period which follows the first time period, and such that a current flowing through the secondary winding has a direction during the second time period opposite to that during the first time period.
    Type: Application
    Filed: April 21, 2016
    Publication date: March 2, 2017
    Inventors: CHENG-TAI LIN, TING-YI HSU, CHENG-HUNG LIN, MING-TSUNG HSIEH, YU-KANG LO
  • Patent number: 9344116
    Abstract: A method for determining a layer stoppage in LDPC decoding is provided. The method may include determining the occurrence of the layer stoppage to detect and record a convergence of a layer arithmetic unit after the performance of a layer decoding operation using LDPC decoding, and in a subsequent iteration operation stopping an operation of the layer arithmetic unit that has converged and repeating determining the layer stoppage for the layer arithmetic unit that has not yet converged. An output of the non-convergent layer may be diverted to the next non-convergent layer while bypassing the convergent layer without interrupting the subsequent iteration operation while maintaining the overall error correction capability.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: May 17, 2016
    Assignee: YUAN ZE UNIVERSITY
    Inventors: Cheng-Hung Lin, Tzu-Hsuan Huang, Shin-An Chou
  • Publication number: 20150349800
    Abstract: A method for determining a layer stoppage in LDPC decoding is provided. The method may include determining the occurrence of the layer stoppage to detect and record a convergence of a layer arithmetic unit after the performance of a layer decoding operation using LDPC decoding, and in a subsequent iteration operation stopping an operation of the layer arithmetic unit that has converged and repeating determining the layer stoppage for the layer arithmetic unit that has not yet converged. An output of the non-convergent layer may be diverted to the next non-convergent layer while bypassing the convergent layer without interrupting the subsequent iteration operation while maintaining the overall error correction capability.
    Type: Application
    Filed: May 29, 2014
    Publication date: December 3, 2015
    Applicant: YUAN ZE UNIVERSITY
    Inventors: Cheng-Hung LIN, Tzu-Hsuan HUANG, Shin-An CHOU
  • Patent number: 9153743
    Abstract: A method of forming light emitting diode dies includes: forming an epitaxial layered structure that defines light emitting units on a front surface of a substrate wafer; forming a photoresist layer over a back surface of the substrate wafer; aligning the substrate wafer and patterning the photoresist layer so as to form openings in the photoresist layer, each of the openings having an area less than a projected area of the respective light emitting unit; forming a solder layer on the photoresist layer such that the solder layer fills the openings in the photoresist layer; removing the photoresist layer and a portion of the solder layer that covers the photoresist layer from the substrate wafer; and dicing the substrate wafer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 6, 2015
    Assignee: Genesis Photonics Inc.
    Inventors: Cheng-Hung Lin, Yu-Yun Lo, Cheng-Yen Chen, Yu-Hung Lai
  • Patent number: 9099923
    Abstract: A hybrid power supply architecture including a microcontroller, a linear regulator, a first current sensing unit, a second current sensing unit, a switching regulator, a PWM controller and a hybrid output stage is disclosed. The linear and switching regulators respectively perform linear and switching regulation according to a first enable signal and a second enable signal generated by the microcontroller to generate a linear output power and a switching output power. The first and second current sensing units respectively generate a first current sensing signal and a second current sensing signal by sensing the linear and switching output powers. The microcontroller receives the first and second current sensing signals to determine a loading state. The switching regulator is enabled to actuate in case of heavy loading, and particularly the linear regulator is shut off only when the switching output power is stable, thereby implementing the best conversion efficiency.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: August 4, 2015
    Assignee: Celestica Technology Consultancy (Shanghai) Co., Ltd.
    Inventor: Cheng-Hung Lin
  • Publication number: 20150207413
    Abstract: A hybrid power supply architecture including a microcontroller, a linear regulator, a first current sensing unit, a second current sensing unit, a switching regulator, a PWM controller and a hybrid output stage is disclosed. The linear and switching regulators respectively perform linear and switching regulation according to a first enable signal and a second enable signal generated by the microcontroller to generate a linear output power and a switching output power. The first and second current sensing units respectively generate a first current sensing signal and a second current sensing signal by sensing the linear and switching output powers. The microcontroller receives the first and second current sensing signals to determine a loading state. The switching regulator is enabled to actuate in case of heavy loading, and particularly the linear regulator is shut off only when the switching output power is stable, thereby implementing the best conversion efficiency.
    Type: Application
    Filed: September 19, 2014
    Publication date: July 23, 2015
    Applicant: Celestica Technology Consultancy (Shanghai) Co., Ltd.
    Inventor: Cheng-Hung LIN
  • Patent number: 9020182
    Abstract: The present invention provides a removable speaker structure for electronic device, which uses the space for the optical disk drives in electronic devices such as notebook computers or in docking stations. After removing the optical disk drive, the removable speaker can be placed. The removable speaker comprises a main module and a speaker module. The speaker module can be removed form the main module for playing multimedia data and enhancing its sound effects.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: April 28, 2015
    Assignee: Wistron Corporation
    Inventors: Cheng-Hung Lin, Kuo-Wei So
  • Patent number: 9019721
    Abstract: A connection port module is mounted to a side wall of a housing of an electronic device. The electronic device includes a control circuit. The connection port module includes a rotating box, a circuit board, and at least one connection port. The rotating box is formed with at least one opening. The circuit board is electrically coupled to the control circuit. The connection port corresponds in number to the opening and is electrically coupled to the circuit board. The connection port is disposed correspondingly to the opening. The rotating box is pivotable relative to the housing between a first position and a second position.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: April 28, 2015
    Assignee: Wistron Corporation
    Inventors: Yu-Hsun Chen, Chih-Yi Wang, Cheng-Hung Lin
  • Publication number: 20150033094
    Abstract: A window-stopped method for applying to turbo decoding is disclosed, and proceeds a window detection to decoding information via a window-based detector and detects and records a convergent condition of each window of the decoding information when a turbo decoding is proceeded in every iteration operation and a soft-input soft-output decoder executes the turbo decoding.
    Type: Application
    Filed: July 23, 2013
    Publication date: January 29, 2015
    Applicant: Yuan Ze University
    Inventors: Cheng-Hung LIN, Chih-Chia WEI, Shu-Wei GUO, Li-An OU
  • Publication number: 20140226848
    Abstract: The present invention provides a removable speaker structure for electronic device, which uses the space for the optical disk drives in electronic devices such as notebook computers or in docking stations. After removing the optical disk drive, the removable speaker can be placed. The removable speaker comprises a main module and a speaker module. The speaker module can be removed form the main module for playing multimedia data and enhancing its sound effects.
    Type: Application
    Filed: October 16, 2013
    Publication date: August 14, 2014
    Applicant: WISTRON CORPORATION
    Inventors: Cheng-Hung Lin, Kuo-Wei So
  • Patent number: 8705241
    Abstract: An electronic device includes a casing and a battery module removably locked to the casing. The casing includes a connecting wall, two inner side walls connected to opposite ends of the connecting wall and having pillars protruding therefrom, and a first magnetic member disposed at the connecting wall. The battery module includes a first side wall to abut against the connecting wall, and two second side walls connected to two opposite ends of the first sidewall. A second magnetic member is disposed at the first side wall and has a magnetic attraction force with the first magnetic member. Each second side wall is formed with a guiding groove extending along an insertion direction of the battery module for engaging a corresponding pillar.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: April 22, 2014
    Assignee: Wistron Corporation
    Inventors: Cheng-Hung Lin, Chih-Yi Wang, Wen-Tai Lin
  • Publication number: 20140103367
    Abstract: A method of forming light emitting diode dies includes: forming an epitaxial layered structure that defines light emitting units on a front surface of a substrate wafer; forming a photoresist layer over a back surface of the substrate wafer; aligning the substrate wafer and patterning the photoresist layer so as to form openings in the photoresist layer, each of the openings having an area less than a projected area of the respective light emitting unit; forming a solder layer on the photoresist layer such that the solder layer fills the openings in the photoresist layer; removing the photoresist layer and a portion of the solder layer that covers the photoresist layer from the substrate wafer; and dicing the substrate wafer.
    Type: Application
    Filed: March 15, 2013
    Publication date: April 17, 2014
    Applicant: Genesis Photonics Inc.
    Inventors: Cheng-Hung Lin, Yu-Yun Lo, Cheng-Yen Chen, Yu-Hung Lai