Patents by Inventor Cheng-Yi Liu

Cheng-Yi Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8168455
    Abstract: A method for manufacturing light emitting diode (LED) is revealed. By means of wet etching, a plurality of pyramids is formed on epitaxial structure. The depth of the pyramids is beyond a n-type semiconductor layer, reaching a p-type semiconductor layer. Thus light emitting directions of the LED made by the method of the present invention are increased. Therefore, the light emitting efficiency of LED is improved.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: May 1, 2012
    Inventors: Cheng-yi Liu, Yung-Hsun Lin
  • Patent number: 8153461
    Abstract: A light-emitting diode (LED) apparatus includes a thermoconductive substrate, a thermoconductive adhesive layer, an epitaxial layer, a current spreading layer and a micro- or nano-roughing structure. The thermoconductive adhesive layer is disposed on the thermoconductive substrate. The epitaxial layer is disposed opposite to the thermoconductive adhesive layer and has a first semiconductor layer, an active layer and a second semiconductor layer. The current spreading layer is disposed between the second semiconductor layer of the epitaxial layer and the thermoconductive adhesive layer. The micro- or nano-roughing structure is disposed on the first semiconductor layer of the epitaxial layer. In addition, a manufacturing method of the LED apparatus is also disclosed.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: April 10, 2012
    Assignees: Delta Electronics, Inc., National Central University
    Inventors: Shih-Peng Chen, Chia-Hua Chan, Horng-Jou Wang, Ching-Liang Lin, Chii-Chang Chen, Cheng-Yi Liu, Huang-Kun Chen
  • Publication number: 20110300650
    Abstract: A light-emitting diode (LED) apparatus includes a thermoconductive substrate, a thermoconductive adhesive layer, an epitaxial layer, a current spreading layer and a micro- or nano-roughing structure. The thermoconductive adhesive layer is disposed on the thermoconductive substrate. The epitaxial layer is disposed opposite to the thermoconductive adhesive layer and has a first semiconductor layer, an active layer and a second semiconductor layer. The current spreading layer is disposed between the second semiconductor layer of the epitaxial layer and the thermoconductive adhesive layer. The micro- or nano-roughing structure is disposed on the first semiconductor layer of the epitaxial layer. In addition, a manufacturing method of the LED apparatus is also disclosed.
    Type: Application
    Filed: August 11, 2011
    Publication date: December 8, 2011
    Inventors: Shih-Peng Chen, Chia-Hua Chan, Horng-Jou Wang, Ching-Liang Lin, Chii-Chang Chen, Cheng-Yi Liu, Huang-Kun Chen
  • Patent number: 8017962
    Abstract: A light-emitting diode (LED) apparatus includes a thermoconductive substrate, a thermoconductive adhesive layer, an epitaxial layer, a current spreading layer and a micro- or nano-roughing structure. The thermoconductive adhesive layer is disposed on the thermoconductive substrate. The epitaxial layer is disposed opposite to the thermoconductive adhesive layer and has a first semiconductor layer, an active layer and a second semiconductor layer. The current spreading layer is disposed between the second semiconductor layer of the epitaxial layer and the thermoconductive adhesive layer. The micro- or nano-roughing structure is disposed on the first semiconductor layer of the epitaxial layer. In addition, a manufacturing method of the LED apparatus is also disclosed.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: September 13, 2011
    Assignees: Delta Electronics, Inc., National Central University
    Inventors: Shih-Peng Chen, Chia-Hua Chan, Horng-Jou Wang, Ching-Liang Lin, Chii-Chang Chen, Cheng-Yi Liu, Huang-Kun Chen
  • Publication number: 20110186884
    Abstract: A reflective structure is fabricated for a light emitting diode (LED). An ohmic contact layer of the LED is made into a netlike structure. Thus, a current is evenly distributed and a low contact resistance is remained. Furthermore, the reflective layer directly reflects light through holes of the netlike structure on emitting light. Thus, a reflectivity of the LED is enhanced.
    Type: Application
    Filed: February 3, 2010
    Publication date: August 4, 2011
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Cheng-Yi Liu, Po-Han Chang
  • Patent number: 7888183
    Abstract: A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die reduces the thermal resistance of the die/heat spreader combination to improve heat extraction from the die as well as eliminating processing steps in fabrication. Additionally, the thinned die becomes more compliant as it takes on the thermal/mechanical properties of the heat spreader to reduce stress-induced cracking of the die.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: February 15, 2011
    Assignee: Intel Corporation
    Inventors: Cheng-Yi Liu, Johanna Swan, Steven Towle, Anna George, legal representative, Chuan Hu
  • Publication number: 20100216270
    Abstract: A method for manufacturing light emitting diode (LED) is revealed. By means of wet etching, a plurality of pyramids is formed on epitaxial structure. The depth of the pyramids is beyond a n-type semiconductor layer, reaching a p-type semiconductor layer. Thus light emitting directions of the LED made by the method of the present invention are increased. Therefore, the light emitting efficiency of LED is improved.
    Type: Application
    Filed: September 10, 2009
    Publication date: August 26, 2010
    Inventors: Cheng-yi Liu, Yung-Hsun Lin
  • Publication number: 20100183896
    Abstract: A Sn—Ag bonding and a method thereof are revealed. By means of a bonding layer formed by tin and silver between wafers, the stress released by diffusion and bonding between tin (Sn) and silver (Ag) is larger than the stress released by diffusion and bonding of conventional gold-silver bonding. Moreover, a Sn—Ag bonding method of the present invention forms Sn—Ag bonding at low temperature and releases more stress so as to reduce thermal stress generated during wafer bonding effectively. And after wafer bonding, the high temperature processes can be performed.
    Type: Application
    Filed: April 27, 2009
    Publication date: July 22, 2010
    Inventors: Cheng-Yi LIU, Ming-Chung Kuo
  • Patent number: 7736849
    Abstract: The present invention provides an oligonucleotide for amplifying a nucleic acid of human cytomegalovirus and a kit for detecting human cytomegalovirus. The present invention also provides an oligonucleotide for identifying a nucleic acid of human cytomegalovirus. The present invention further provides a method of detecting human cytomegalovirus in an individual.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: June 15, 2010
    Assignee: Taipei Veterans General Hospital, VAC
    Inventors: Yu-Jiun Chan, Jui-Chu Lin, Cheng-Yi Liu, Ming-Tak Ho
  • Publication number: 20100044743
    Abstract: A flip chip light emitting diode with an epitaxial strengthening layer and a manufacturing method thereof are revealed. The flip chip light emitting diode with an epitaxial strengthening layer includes an epitaxial structure connected with an epitaxial strengthening layer while the manufacturing method of the flip chip light emitting diode with an epitaxial strengthening layer is mainly to form an epitaxial strengthening layer on the epitaxial structure. Thus the epitaxial structure of the flip chip light emitting diode is strengthened so as to prevent breakage of the epitaxial structure while removing a substrate by laser assisted lift-off technique or other techniques. Moreover, the thermal expansion coefficient of the epitaxial strengthening layer matches well with thermal expansion coefficient of the epitaxial structure. Thus after being treated with cyclic heating, there is no stress caused by unmatched thermal expansion coefficient.
    Type: Application
    Filed: February 20, 2009
    Publication date: February 25, 2010
    Inventors: Cheng-Yi LIU, You-Hsien Chang, Shiaw-Tseh Chiang
  • Publication number: 20090146166
    Abstract: A structure applying an optical wave guide layer includes an incident light source and at least one optical wave guide layer. The structure can be in any geometric shape such as a planar, hemispherical or conical shape. The geometric structure is designed for collecting and guiding the incident light source in specific directions. The light can be guided by a combination of materials having different optical properties. The incident angle of the collected light is controlled and the materials are selected to effectively overcome a drawback of the prior art that a portion of the light of some optical components cannot be extracted by a light extraction method.
    Type: Application
    Filed: April 2, 2008
    Publication date: June 11, 2009
    Inventors: Cheng-yi Liu, Yung-Hsun Lin, Ching-Liang Lin, Po-Han Chen, Chia-Lun Chang, Pen-Ko Chou, Yi-Ju Chen, You-Hsian Chang
  • Patent number: 7507636
    Abstract: An amorphous Si (silicon)/Au (gold) eutectic wafer bonding structure is fabricated. An amorphous Si obtained through coating or growth contacts with Au for bonding. The bonding layer is a Si/Au eutectic layer. Si is prevented from being precipitated. The bonding structure has a fast reaction ratio and a uniformed reaction. Thus, an electrical device has an improved electricity and reliability.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: March 24, 2009
    Assignee: National Central University
    Inventors: Cheng-yi Liu, Po-Han Chan, Ching-Liang Lin
  • Publication number: 20090039954
    Abstract: A filter is electrically coupled to a fan or is built-in with a fan, the filter is also electrically coupled a first power terminal and a second power terminal. The filter includes an amplifier, a capacitor, and a divider. The amplifier includes a first terminal, a second terminal and a third terminal, wherein the third terminal is electrically coupled to a power circuit of the fan. The capacitor is electrically coupled between the third terminal of the amplifier and the second power terminal. The divider is electrically coupled between the first power terminal and the second power terminal, wherein a node of the divider is electrically coupled to the second terminal of the amplifier.
    Type: Application
    Filed: August 6, 2008
    Publication date: February 12, 2009
    Inventors: Cheng-Yi Liu, Tsung-Chih Tsai
  • Publication number: 20080283503
    Abstract: A method of processing nature pattern on expitaxial substrate, unlike the conventional method of processing regular pattern on expitaxial substrate (such as sapphire substrate) by lithography, wet etches a sapphire substrate directly to obtain a nature pattern, so as to simplify the fabrication process. Compared with the conventional way of processing pattern sapphire, the nature pattern sapphire substrate produced by the method can avoid voids between the interface of sapphire and GaN and apply this technology to a wired bond LED structure to increase the sidewall light extraction and improve the texture of the sapphire surface of a flip chip LED structure. In addition, this method also can be applied to a thin-GaN LED for achieving the surface texture after the sapphire is removed by laser.
    Type: Application
    Filed: May 14, 2007
    Publication date: November 20, 2008
    Inventors: Cheng-yi Liu, Yi-ju Chen, Shih-Chieh Hsu, Ching-Liang Lin
  • Patent number: 7420273
    Abstract: A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die reduces the thermal resistance of the die/heat spreader combination to improve heat extraction from the die as well as eliminating processing steps in fabrication. Additionally, the thinned die becomes more compliant as it takes on the thermal/mechanical properties of the heat spreader to reduce stress-induced cracking of the die.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: September 2, 2008
    Assignee: Intel Corporation
    Inventors: Cheng-Yi Liu, Johanna Swan, Anna George, legal representative, Chuan Hu, Steven Towle
  • Publication number: 20080194077
    Abstract: Two wafers are bonded. One wafer has a gold (Au) film on its surface; the other, a silver (Ag) film. The wafers are stuck together for a bonding process between the Au and the Ag films. Thus, an Au/Ag bonding layer is formed. The bonding layer has a high melting point and so is suitable for high-temperature processes. The bonding process also do no harm to devices on the bonded wafer.
    Type: Application
    Filed: June 6, 2007
    Publication date: August 14, 2008
    Applicant: National Central University
    Inventors: Cheng-Yi Liu, Chia-Lun Chang
  • Publication number: 20080176354
    Abstract: An electric device has a p-n diode, where the p-n diode is covered with a current modified layer (CML). With a resistance distribution of the CML, a current is decreased toward all directions from a point on a bonding pad between the CML and the p-n diode. Hence, a current is uniformly distributed on the CML by fine tuning the resistance distribution. Thus, an effectiveness of the electric device is improved.
    Type: Application
    Filed: April 23, 2007
    Publication date: July 24, 2008
    Applicant: National Central University
    Inventors: Cheng-yi Liu, Te-Yuan Chung, Pen-ko Chou, Ching-Liang Lin
  • Publication number: 20080153209
    Abstract: A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die reduces the thermal resistance of the die/heat spreader combination to improve heat extraction from the die as well as eliminating processing steps in fabrication. Additionally, the thinned die becomes more compliant as it takes on the thermal/mechanical properties of the heat spreader to reduce stress-induced cracking of the die.
    Type: Application
    Filed: March 5, 2008
    Publication date: June 26, 2008
    Inventors: Cheng-Yi Liu, Johanna Swan, Steven Towle, Anna George, Chuan Hu
  • Publication number: 20080138965
    Abstract: An amorphous Si (silicon)/Au (gold) eutectic wafer bonding structure is fabricated. An amorphous Si obtained through coating or growth contacts with Au for bonding. The bonding layer is a Si/Au eutectic layer. Si is prevented from being precipitated. The bonding structure has a fast reaction ratio and a uniformed reaction. Thus, an electrical device has an improved electricity and reliability.
    Type: Application
    Filed: January 5, 2007
    Publication date: June 12, 2008
    Applicant: National Central University
    Inventors: Cheng-yi Liu, Po-Han Chan, Ching-Liang Lin
  • Publication number: 20080113463
    Abstract: A laser is used in fabricating a thin film gallium nitride (GaN) light emitting diode (LED). The laser has a wave length to be absorbed by GaN. The laser is used to define a GaN grain. And the laser is used to lift off a substrate after obtaining a bonding layer of GaN. Fabrication procedure is thus simplified.
    Type: Application
    Filed: December 26, 2006
    Publication date: May 15, 2008
    Applicant: National Central University
    Inventors: Cheng-yi Liu, Ching-Liang Lin, Po-Han Chan