Patents by Inventor Cheng-Yi Liu

Cheng-Yi Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080032280
    Abstract: The present invention provides methods and kits for detecting human cytomegalovirus. The present invention also provides oligonucleotides for detecting human cytomegalovirus.
    Type: Application
    Filed: July 21, 2006
    Publication date: February 7, 2008
    Applicant: TAIPEI VETERANS GENERAL HOSPITAL, VAC
    Inventors: Yu-Jiun Chan, Jui-Chu Lin, Cheng-Yi Liu, Ming-Tak Ho
  • Publication number: 20080014664
    Abstract: A method for fabricating a light emitting diode (LED) is provided. A first-type doped semiconductor layer, a light emitting layer and a second-type doped semiconductor layer are formed on an epitaxy substrate sequentially. Then, a gold layer is formed on the second-type doped semiconductor layer. Next, a bonding substrate is provided. The bonding substrate includes a silicon substrate and a germanium-contained layer disposed on the silicon substrate. Then, a bonding process is performed on the bonding substrate and the gold layer. Next, the epitaxy substrate is removed. Accordingly, a LED with better reliability and light-emitting efficiency can be made. Moreover, a LED is also provided.
    Type: Application
    Filed: September 27, 2007
    Publication date: January 17, 2008
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Cheng-Yi Liu, Shih-Chieh Hsu
  • Publication number: 20080003707
    Abstract: The present invention provides a method to fabricate a diode whose heat stability is improved. The diode has a layer of high reflective ohmic contact and an alloy metal is used in the layer. With the alloy metal used in the layer, the heat stability of the diode is improved.
    Type: Application
    Filed: August 9, 2006
    Publication date: January 3, 2008
    Applicant: National Central University
    Inventors: Cheng-Yi Liu, Chia-Hsien Chou, Ching-Liang Lin
  • Patent number: 7295707
    Abstract: A method for aligning gesture features of image is disclosed. An input gesture image is captured, and then a closed curve formed by a binary contour image of the gesture image is determined by processing the gesture image. A curvature scale space (CSS) image of the gesture image is drawn based on the closed curve. A convolution operation is performed with respect to the sequence of a coordinate-peak set formed by the CSS image and a predefined function to designate the coordinate with maximal value of integration as a basis point for obtaining a feature parameter of the gesture image. Finally, comparing the feature parameter of the gesture image with each feature parameter of a plurality of reference gesture shapes, thereby determining a gesture shape corresponding to the gesture image.
    Type: Grant
    Filed: July 29, 2003
    Date of Patent: November 13, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Chin-Chen Chang, Cheng-Yi Liu, I-Yen Chen
  • Patent number: 7291863
    Abstract: A LED structure including an epitaxy substrate, a semiconductor layer, a first bonding pad and a second bonding pad, is provided. The epitaxy substrate has a through hole and the semiconductor layer is disposed on the epitaxy substrate. The semiconductor layer includes a first type doped semiconductor layer, a light-emitting layer and a second type doped semiconductor layer. The first type doped semiconductor layer is disposed on the epitaxy substrate, while the light-emitting layer is disposed between the first type and second type doped semiconductor layers. The first bonding pad is disposed in the through hole and electrically connected to the first type doped semiconductor layer, while the second bonding pad is disposed on the second type doped semiconductor layer.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: November 6, 2007
    Assignee: National Central University
    Inventors: Cheng-Yi Liu, Yuan-Tai Lai, Shen-Jie Wang
  • Patent number: 7265389
    Abstract: A method for fabricating a light emitting diode (LED) is provided. Successively forming a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer on an epitaxy substrate; forming a bonding layer thereon; bonding a transferring substrate with the bonding layer; removing the epitaxy substrate; removing a part of the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer for exposing a part of the bonding layer; patterning the bonding layer to form a first and a second bonding portion isolated from each other, wherein the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer are disposed on the first bonding portion; forming a pad on the first type doped semiconductor layer; and forming a conducting wire for electrically connecting the pad and the second bonding portion.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: September 4, 2007
    Assignee: National Central University
    Inventors: Cheng-Yi Liu, Yuan-Tai Lai, Shen-Jie Wang
  • Publication number: 20070158665
    Abstract: A method for fabricating a light emitting diode (LED) is provided. First, a first type doped semiconductor layer, an emitting layer and a second type doped semiconductor layer are sequentially formed on an epitaxy substrate. Then, a gold layer is formed on the second type doped semiconductor layer. Next, a silicon substrate is provided, and a wafer bonding process is performed between the silicon substrate and the gold layer. Finally, the epitaxy substrate is removed. As mentioned above, a LED with better reliability and efficiency of light-emitting is fabricated according to the method provided by the present invention. Moreover, the present invention further provides a LED.
    Type: Application
    Filed: March 22, 2007
    Publication date: July 12, 2007
    Applicant: NATIONAL CENTRAL UNIVERSITY
    Inventors: Cheng-Yi Liu, Shih-Chieh Hsu
  • Publication number: 20070122646
    Abstract: A solder composition for reacting with aluminum is provided. The main alloying components in the solder includes tin (Sn), zinc (Zn) and chromium (Cr) with 0.01 wt % to 20 wt % zinc and 0.01 wt % to 20 wt % chromium.
    Type: Application
    Filed: February 8, 2006
    Publication date: May 31, 2007
    Inventors: Cheng-Yi Liu, Shen-Jie Wang
  • Publication number: 20070010035
    Abstract: A method for fabricating a light emitting diode (LED) is provided. First, a first type doped semiconductor layer, an emitting layer and a second type doped semiconductor layer are sequentially formed on an epitaxy substrate. Then, a first transparent conductive layer is formed on the second type doped semiconductor layer. Next, a substitution substrate having a second transparent conductive layer formed thereon is provided. Then, a wafer bonding process is performed on the epitaxy substrate and the substitution substrate, so as to bond the first transparent conductive layer and the second transparent conductive layer. Finally, the epitaxy substrate is removed. As mentioned above, an LED with better reliability is fabricated according to the method provided by the present invention. Moreover, the present invention further provides an LED.
    Type: Application
    Filed: June 20, 2006
    Publication date: January 11, 2007
    Applicant: National Central University
    Inventors: Cheng-Yi Liu, Shih-Chieh Hsu, Ching-Liang Lin, Yong-Syun Lin
  • Publication number: 20060255348
    Abstract: A method for fabricating a light emitting diode (LED) is provided. A first-type doped semiconductor layer, a light emitting layer and a second-type doped semiconductor layer are formed on an epitaxy substrate sequentially. Then, a gold layer is formed on the second-type doped semiconductor layer. Next, a bonding substrate is provided. The bonding substrate includes a silicon substrate and a germanium-contained layer disposed on the silicon substrate. Then, a bonding process is performed on the bonding substrate and the gold layer. Next, the epitaxy substrate is removed. Accordingly, a LED with better reliability and light-emitting efficiency can be made. Moreover, a LED is also provided.
    Type: Application
    Filed: November 11, 2005
    Publication date: November 16, 2006
    Inventors: Cheng-Yi Liu, Shih-Chieh Hsu
  • Publication number: 20060243991
    Abstract: A method for fabricating a light emitting diode (LED) is provided. First, a first type doped semiconductor layer, an emitting layer and a second type doped semiconductor layer are sequentially formed on an epitaxy substrate. Then, a gold layer is formed on the second type doped semiconductor layer. Next, a silicon substrate is provided, and a wafer bonding process is performed between the silicon substrate and the gold layer. Finally, the epitaxy substrate is removed. As mentioned above, a LED with better reliability and efficiency of light-emitting is fabricated according to the method provided by the present invention. Moreover, the present invention further provides a LED.
    Type: Application
    Filed: December 28, 2005
    Publication date: November 2, 2006
    Inventors: Cheng-Yi Liu, Shih-Chien Hsu
  • Publication number: 20060141644
    Abstract: A method for fabricating a light emitting diode (LED) is provided. Successively forming a first type doped semiconductor layer, a light emitting layer and a second type doped semiconductor layer on an epitaxy substrate; forming a bonding layer thereon; bonding a transferring substrate with the bonding layer; removing the epitaxy substrate; removing a part of the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer for exposing a part of the bonding layer; patterning the bonding layer to form a first and a second bonding portion isolated from each other, wherein the first type doped semiconductor layer, the light emitting layer and the second type doped semiconductor layer are disposed on the first bonding portion; forming a pad on the first type doped semiconductor layer; and forming a conducting wire for electrically connecting the pad and the second bonding portion.
    Type: Application
    Filed: October 14, 2005
    Publication date: June 29, 2006
    Inventors: Cheng-Yi Liu, Yuan-Tai Lai, Shen-Jie Wang
  • Publication number: 20060102925
    Abstract: A LED structure including an epitaxy substrate, a semiconductor layer, a first bonding pad and a second bonding pad, is provided. The epitaxy substrate has a through hole and the semiconductor layer is disposed on the epitaxy substrate. The semiconductor layer includes a first type doped semiconductor layer, a light-emitting layer and a second type doped semiconductor layer. The first type doped semiconductor layer is disposed on the epitaxy substrate, while the light-emitting layer is disposed between the first type and second type doped semiconductor layers. The first bonding pad is disposed in the through hole and electrically connected to the first type doped semiconductor layer, while the second bonding pad is disposed on the second type doped semiconductor layer.
    Type: Application
    Filed: October 11, 2005
    Publication date: May 18, 2006
    Inventors: Cheng-Yi Liu, Yuan-Tai Lai, Shen-Jie Wang
  • Patent number: 6996272
    Abstract: A background removal apparatus comprises a color normalization module that normalizes an original image, and an image segmentation module that segments the normalized image into several segmented regions. A background mesh generation module simulates the variation of pixel colors in background and generates an interpolated background mesh. A comparison module compares the normalized image and the interpolated background mesh to form a background mask by extracting the coherent regions between them. A refinement module uses a refined rule to determine a final background mask, and a background removal module through which a pure foreground image is obtained. The apparatus combines the efficiency of both color and spatial clustering, and improves the capabilities of current image segmentation method to perform background removal.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: February 7, 2006
    Assignee: Industrial Technology Research Institute
    Inventors: Jiann-Jone Chen, Jau-Fu Liu, I-Yen Chen, Cheng-Yi Liu
  • Publication number: 20060019481
    Abstract: A flip-chip gold bump structure and a method of fabricating thereof are disclosed. The structure includes a nickel layer formed on a gold bump formed on a chip, and a copper layer formed on the nickel layer for forming a Ni/Cu barrier layer. Because of the formation of the Ni/Cu layer which prevents the interaction of the gold bump and the solder, the fragile connecting point resulting from the rapid interaction of the Au—Sn can be eliminated.
    Type: Application
    Filed: October 4, 2005
    Publication date: January 26, 2006
    Inventors: Cheng-Yi Liu, Shen-Jie Wang
  • Publication number: 20050121778
    Abstract: A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die reduces the thermal resistance of the die/heat spreader combination to improve heat extraction from the die as well as eliminating processing steps in fabrication. Additionally, the thinned die becomes more compliant as it takes on the thermal/mechanical properties of the heat spreader to reduce stress-induced cracking of the die.
    Type: Application
    Filed: January 11, 2005
    Publication date: June 9, 2005
    Inventors: Cheng-Yi Liu, Johanna Swan, Steven Towle, Anna George, Chuan Hu
  • Publication number: 20050089225
    Abstract: A method for aligning gesture features of image is disclosed. An input gesture image is captured, and then a closed curve formed by a binary contour image of the gesture image is determined by processing the gesture image. A curvature scale space (CSS) image of the gesture image is drawn based on the closed curve. A convolution operation is performed with respect to the sequence of a coordinate-peak set formed by the CSS image and a predefined function to designate the coordinate with maximal value of integration as a basis point for obtaining a feature parameter of the gesture image. Finally, comparing the feature parameter of the gesture image with each feature parameter of a plurality of reference gesture shapes, thereby determining a gesture shape corresponding to the gesture image.
    Type: Application
    Filed: July 29, 2003
    Publication date: April 28, 2005
    Applicant: Industrial Technology Research Institute
    Inventors: Chin-Chen Chang, Cheng-Yi Liu, I-Yen Chen
  • Publication number: 20050031483
    Abstract: A solder composition adapted to bond metallic materials and non-metallic materials is provided. The solder composition can enhance the bonding strength for the metallic materials and the non-metallic materials. The solder composition mainly comprises Sn—Cr alloy. The solder composition further includes anther metal component for regulating the bonding capability so that the solder composition can be used to bond various materials.
    Type: Application
    Filed: June 11, 2004
    Publication date: February 10, 2005
    Inventors: Cheng-Yi Liu, Shih-Chieh Hsu, Shen-Jie Wang
  • Patent number: 6841413
    Abstract: A method and apparatus provide an integrated circuit package with improved heat dissipation and easier fabrication. The integrated circuit package includes a thinned semiconductor die attached to a heat spreader using a thermally conductive material. The thinned die reduces the thermal resistance of the die/heat spreader combination to improve heat extraction from the die as well as eliminating processing steps in fabrication. Additionally, the thinned die becomes more compliant as it takes on the thermal/mechanical properties of the heat spreader to reduce stress-induced cracking of the die.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: January 11, 2005
    Assignee: Intel Corporation
    Inventors: Cheng-Yi Liu, Johanna Swan, Anna George, Steven Towle
  • Publication number: 20040183194
    Abstract: A flip-chip gold bump structure and a method of fabricating thereof are disclosed. The structure includes a nickel layer formed on a gold bump formed on a chip, and a copper layer formed on the nickel layer for forming a Ni/Cu barrier layer. Because of the formation of the Ni/Cu layer which prevents the interaction of the gold bump and the solder, the fragile connecting point resulting from the rapid interaction of the Au—Sn can be eliminated.
    Type: Application
    Filed: January 15, 2004
    Publication date: September 23, 2004
    Inventors: CHENG-YI LIU, SHEN-JIE WANG