Patents by Inventor Chi-Chou Lin

Chi-Chou Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170186716
    Abstract: A chip with I/O pads on the peripheries and a method making the chip is disclosed. The chip includes: a substrate; a first metal layer, formed above the substrate; an inter-metal dielectric layer, formed above the first metal layer, having concave portions formed along the peripheries of the chip so that a portion of the first metal layer is exposed to form an input-output (I/O) pad in each of the concave portions which are spaced apart from each other; and a passivation layer, formed above the second metal layer without covering the concave portions so that specific circuits are formed by the first metal layer and the second metal layer, respectively. By changing the I/O pad from the top of the chip to the peripheries, the extra thickness of the packaged chip caused by wire bonding in the prior arts can be reduced.
    Type: Application
    Filed: March 16, 2017
    Publication date: June 29, 2017
    Applicant: SunASIC Technologies, Inc.
    Inventors: Chi Chou LIN, Zheng Ping HE
  • Patent number: 9690916
    Abstract: A multi-function identification system is described in the present invention. The system includes an appliance and a number of keys. Under a registration process, the system allows multiple appliances to be controlled by a single key or an appliance can be controlled by different keys. The system can also allow users to set specified actions to be conducted after identification processes are completed. That satisfies requirements of a multi-function identification. Meanwhile, the key is a plug-and play and on-the-go product. It is desired that the key is a host used for other purpose.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: June 27, 2017
    Assignee: Sunasic Technologies Inc.
    Inventor: Chi-Chou Lin
  • Publication number: 20170161536
    Abstract: A capacitive fingerprint sensing unit and enhanced capacitive fingerprint reader using the capacitive fingerprint sensing units are disclosed. The enhanced capacitive fingerprint reader includes a number of capacitive fingerprint sensing units, forming a fingerprint sensing array; a conductive element; and an excitation signal driver, for providing excitation signals to the conductive element. By increasing the thicknesses of a first inter-metal dielectric layer and a second inter-metal dielectric layer in fingerprint sensing units in the enhanced capacitive fingerprint reader, sensitivity of the enhanced capacitive fingerprint reader can be improved.
    Type: Application
    Filed: December 4, 2015
    Publication date: June 8, 2017
    Applicant: SunASIC Technologies, Inc.
    Inventors: Chi-Chou LIN, Zheng-Ping HE
  • Publication number: 20170148670
    Abstract: Methods for forming metal contacts having tungsten liner layers are provided herein. In some embodiments, a method of processing a substrate includes: exposing a substrate, within a first substrate process chamber, to a plasma formed from a first gas comprising a metal organic tungsten precursor gas or a fluorine-free tungsten halide precursor to deposit a tungsten liner layer, wherein the tungsten liner layer is deposited atop a dielectric layer and within a feature formed in a first surface of the dielectric layer of a substrate; transferring the substrate to a second substrate process chamber without exposing the substrate to atmosphere; and exposing the substrate to a second gas comprising a tungsten fluoride precursor to deposit a tungsten fill layer atop the tungsten liner layer.
    Type: Application
    Filed: November 22, 2016
    Publication date: May 25, 2017
    Inventors: YU LEI, VIKASH BANTHIA, KAI WU, XINYU FU, YI XU, KAZUYA DAITO, FEIYUE MA, PULKIT AGARWAL, CHI-CHOU LIN, DIEN-YEH WU, GUOQIANG JIAN, WEI V. TANG, JONATHAN BAKKE, MEI CHANG, SUNDAR RAMAMURTHY
  • Publication number: 20170142834
    Abstract: A Printed Circuit Board Assembly (PCBA) for forming an enhanced biometric module and a method for manufacturing the PCBA are disclosed. The method includes the steps of providing a PCB, a biometric sensing chip and SMDs; mounting the biometric sensing chip on the PCB with each bonding pad being electrically linked to one corresponding first contact pad; mounting the SMDs on second contact pads which are electrically linked thereto, respectively; and forming a protection layer. The present invention takes advantages of compact size of small conductive elements to avoid cracks in the protection layer.
    Type: Application
    Filed: November 16, 2015
    Publication date: May 18, 2017
    Applicant: SunASIC Technologies, Inc.
    Inventors: Chung Hao HSIEH, Chi Chou LIN, Zheng Ping HE
  • Patent number: 9633960
    Abstract: A chip with I/O pads on the peripheries and a method making the chip is disclosed. The chip includes: a substrate; at least two metal layers, formed above the substrate, each metal layer forming a specific circuit, wherein two adjacent metal layers are separated by an inter-metal dielectric layer; and a passivation layer, formed on a top side of the chip. By changing the I/O pad from the top of the chip to the peripheries, the extra thickness of the packaged chip caused by wire bonding in the prior arts can be reduced.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: April 25, 2017
    Assignee: Sunasic Technologies Inc.
    Inventors: Chi-Chou Lin, Zheng-Ping He
  • Publication number: 20170012142
    Abstract: A Printed Circuit Board Assembly (PCBA) forming an enhanced fingerprint module is disclosed. The PCBA includes a Printed Circuit Board (PCB), an image sensing chip, at least one electrode and a protection layer. An opening in a first insulation layer and a second insulation layer of the PCB together form a sensor portion so that the image sensing chip can be packaged in the opening. Thus, the thickness of the enhanced fingerprint module can be thinner than other fingerprint modules provided by the conventional package methods.
    Type: Application
    Filed: July 6, 2015
    Publication date: January 12, 2017
    Applicant: SunASIC Technologies, Inc.
    Inventors: Chi-Chou LIN, Zheng-Ping HE
  • Publication number: 20170005050
    Abstract: A chip with I/O pads on the peripheries and a method making the chip is disclosed. The chip includes: a substrate; at least two metal layers, formed above the substrate, each metal layer forming a specific circuit, wherein two adjacent metal layers are separated by an inter-metal dielectric layer; and a passivation layer, formed on a top side of the chip. By changing the I/O pad from the top of the chip to the peripheries, the extra thickness of the packaged chip caused by wire bonding in the prior arts can be reduced.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Applicant: SunASIC Technologies, Inc.
    Inventors: Chi-Chou LIN, Zheng-Ping HE
  • Publication number: 20160379034
    Abstract: A capacitive image sensor and a method for running the capacitive image sensor are disclosed. The capacitive image sensor includes a number of capacitive sensing elements, forming an array, each capacitive sensing element for transforming a distance between a portion of a surface of an approaching finger and a top surface thereof into an output voltage, wherein a value of the output voltage is changed by a driving signal exerted on the finger; an A/D converter, for converting the output voltage into a number and outputting the number; and a signal source, for providing the driving signal to the finger.
    Type: Application
    Filed: June 22, 2016
    Publication date: December 29, 2016
    Applicant: SunASIC Technologies, Inc.
    Inventors: Chi-Chou LIN, Zheng-Ping HE
  • Publication number: 20160373800
    Abstract: A remote control for a smart TV or a set-top box is disclosed. The remote control includes a capacitive fingerprint sensor, a processor and a wireless transmitter. The present invention takes advantages of the capacitive fingerprint sensor so that every user's personal data and corresponding setting for the smart TV or set-top box are available. Channel (or web-site) content rating can be achieved. Purchasing over TV can be safer than ever.
    Type: Application
    Filed: March 15, 2016
    Publication date: December 22, 2016
    Applicant: SunASIC Technologies, Inc.
    Inventors: Chi-Chou LIN, Zheng-Ping HE
  • Patent number: 9465973
    Abstract: An enhanced capacitive fingerprint sensing unit is disclosed. The enhanced capacitive fingerprint sensing unit includes a base structure and a fingerprint sensing structure. The fingerprint sensing structure has a first inter-metal dielectric layer, a second metal layer, a second inter-metal dielectric layer, a third metal layer, and a passivation layer. By connecting the third metal layer to Transient Voltage Suppressor (TVS) device, anti-Electrostatic Discharge (ESD) is available. By increasing the thicknesses of the first inter-metal dielectric layer and the second inter-metal dielectric layer, sensitivity of the enhanced capacitive fingerprint sensing unit can be improved.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: October 11, 2016
    Assignee: Sunasic Technologies, Inc.
    Inventors: Chi-Chou Lin, Zheng-Ping He
  • Publication number: 20160275332
    Abstract: An enhanced capacitive fingerprint sensing unit is disclosed. The enhanced capacitive fingerprint sensing unit includes a base structure and a fingerprint sensing structure. The fingerprint sensing structure has a first inter-metal dielectric layer, a second metal layer, a second inter-metal dielectric layer, a third metal layer, and a passivation layer. By connecting the third metal layer to Transient Voltage Suppressor (TVS) device, anti-Electrostatic Discharge (ESD) is available. By increasing the thicknesses of the first inter-metal dielectric layer and the second inter-metal dielectric layer, sensitivity of the enhanced capacitive fingerprint sensing unit can be improved.
    Type: Application
    Filed: March 19, 2015
    Publication date: September 22, 2016
    Applicant: SUNASIC TECHNOLOGIES, INC.
    Inventors: Chi-Chou LIN, Zheng-Ping HE
  • Publication number: 20160157352
    Abstract: A printed circuit board having an electronic component embedded is disclosed. The printed circuit board has four electrically conductive layers and three core layers formed interleavedly. By properly removing a portion of the printed circuit board, the electronic component can be exposed. It has advantages that the exposed electronic component can be a CCD, CMOS or module. When the devices mentioned are embedded in the printed circuit board, one part of them can be exposed from the printed circuit board for normal functions. The overall thickness of the printed circuit board assembly can be minimized to meet the trend of compact design of electronic products.
    Type: Application
    Filed: February 2, 2016
    Publication date: June 2, 2016
    Applicant: SunASIC Technologies, Inc.
    Inventor: Chi-Chou LIN
  • Publication number: 20160141235
    Abstract: A printed circuit board assembly (PCBA) and a method to assemble the PCBA are disclosed. The PCBA includes a printed circuit board (PCB), an image sensing chip and a protection layer. The PCB includes a first insulation layer, a second insulation layer, a first electrically conductive layer, a second electrically conductive layer, and a third electrically conductive layer. The image sensing chip has a number of bonding pads with a sensor portion facing down through the second opening. The PCBA can function as an image sensing module and make the module have the thinnest thickness.
    Type: Application
    Filed: November 18, 2014
    Publication date: May 19, 2016
    Applicant: SUNASIC TECHNOLOGIES, INC.
    Inventors: Chi-Chou LIN, Zheng-Ping HE
  • Publication number: 20160125091
    Abstract: A read-only method and a read-only system for operating a portable device are disclosed. The system includes a portable device which has a memory unit and a processing unit, and a host which has a display unit and a processor. A browser requests an access to a portable device inserted to a host. After the storage units been accessed are traced, corresponding service will be performed by the portable device without being blocked by the security system of the host.
    Type: Application
    Filed: October 30, 2014
    Publication date: May 5, 2016
    Applicant: SUNASIC TECHNOLOGIES, INC.
    Inventor: Chi-Chou LIN
  • Patent number: 9331033
    Abstract: A method for forming a stacked metal contact in electrical communication with aluminum wiring in a semiconductor wafer of an integrated circuit is disclosed. The method includes the steps of: forming at least one passivation layer on a surface of the semiconductor wafer of the integrated circuit, where an aluminum wiring is embedded; forming a patterned terminal via opening through the passivation layer to expose the aluminum wiring; removing a portion of the aluminum wiring from the patterned terminal via opening by chemical etching and forming a thin zinc film on an etched surface at the same time; forming a nickel film stacked on the zinc film; and; and forming a metal stack in the patterned terminal via opening and/or at least a portion of the passivation layer by chemical plating or metal plating.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: May 3, 2016
    Assignee: Sunasic Technologies Inc.
    Inventors: Chi-Chou Lin, Zheng-Ping He
  • Patent number: 9305202
    Abstract: A portable device having fingerprint recognition function includes an image sensing unit, a microprocessor, a signal transmitting unit, a carrying member, a cleaning unit, and a housing. It is characterized that the cleaning unit removes residual fingerprint from the image sensing unit while the carrying member moves in and out of the housing. The portable device of the present invention is free from fingerprint residue and can reduce security risks.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: April 5, 2016
    Assignee: Sunasic Technologies Inc.
    Inventor: Chi-Chou Lin
  • Patent number: 9295158
    Abstract: A printed circuit board having an electronic component embedded and a method making the same are disclosed. The printed circuit board has four electrically conductive layers and three core layers formed interleavedly. By properly removing a portion of the printed circuit board, the electronic component can be exposed. It has advantages that the exposed electronic component can be a CCD, CMOS or module. When the devices mentioned are embedded in the printed circuit board, one part of them can be exposed from the printed circuit board for normal functions. The overall thickness of the printed circuit board assembly can be minimized to meet the trend of compact design of electronic products.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: March 22, 2016
    Assignee: Sunasic Technologies, Inc.
    Inventor: Chi-Chou Lin
  • Publication number: 20160079289
    Abstract: A method for mounting a chip on a printed circuit board (PCB) is disclosed. The method includes the steps of: providing a chip having a plurality of bonding pads and a PCB having a recess portion and a plurality of connectors; gluing the recess portion; placing the chip into the recess portion; and forming circuit patterns linking associated bonding pad and connector. A bottom of the recess portion is substantially flat and a shape of the recess portion is similar to that of the chip but large enough so that the chip can be fixed in the recess portion after being glued.
    Type: Application
    Filed: September 17, 2014
    Publication date: March 17, 2016
    Applicant: SUNASIC TECHNOLOGIES, INC.
    Inventors: Chi-Chou LIN, Zheng-Ping HE
  • Patent number: 9281339
    Abstract: A method for mounting a chip on a printed circuit board (PCB) is disclosed. The method includes the steps of: providing a chip having a plurality of bonding pads and a PCB having a recess portion and a plurality of connectors; gluing the recess portion; placing the chip into the recess portion; and forming circuit patterns linking associated bonding pad and connector. A bottom of the recess portion is substantially flat and a shape of the recess portion is similar to that of the chip but large enough so that the chip can be fixed in the recess portion after being glued.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: March 8, 2016
    Assignee: Sunasic Technologies, Inc.
    Inventors: Chi-Chou Lin, Zheng-Ping He