Patents by Inventor Chi-Feng Chen

Chi-Feng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973113
    Abstract: Provided is a semiconductor device including a substrate having a lower portion and an upper portion on the lower portion; an isolation region disposed on the lower portion of the substrate and surrounding the upper portion of the substrate in a closed path; a gate structure disposed on and across the upper portion of the substrate; source and/or drain (S/D) regions disposed in the upper portion of the substrate at opposite sides of the gate structure; and a channel region disposed below the gate structure and abutting between the S/D regions, wherein the channel region and the S/D regions have different conductivity types, and the channel region and the substrate have the same conductivity type.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Victor Chiang Liang, Chung-Hao Chu
  • Patent number: 11955389
    Abstract: A method of determining the reliability of a high-voltage PMOS (HVPMOS) device includes determining a bulk resistance of the HVPMOS device, and evaluating the reliability of the HVPMOS device based on the bulk resistance.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Tse-Hua Lu
  • Patent number: 11946569
    Abstract: An actuating and sensing module is disclosed and includes a bottom plate, a gas pressure sensor, a thin gas transportation device and a cover plate. The bottom plate includes a pressure relief orifice, a discharging orifice and a communication orifice. The gas pressure sensor is disposed on the bottom plate and seals the communication orifice. The thin gas transportation device is disposed on the bottom plate and seals the pressure relief orifice and the discharging orifice. The cover plate is disposed on the bottom plate and covers the gas pressure sensor and the thin gas-transportation device. The cover plate includes an intake orifice. The thin gas transportation device is driven to inhale gas through the intake orifice, the gas is then discharged through the discharging orifice by the thin gas transportation device, and a pressure change of the gas is sensed by the gas pressure sensor.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: April 2, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Shih-Chang Chen, Jia-Yu Liao, Hung-Hsin Liao, Chung-Wei Kao, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee
  • Patent number: 11936299
    Abstract: A transistor includes a gate structure over a substrate, wherein the substrate includes a channel region. The transistor further includes a source/drain (S/D) in the substrate adjacent to the gate structure. The transistor further includes a lightly doped drain (LDD) region adjacent to the S/D, wherein a dopant concentration in the first LDD is less than a dopant concentration in the S/D. The transistor further includes a doping extension region adjacent the LDD region, wherein the doping extension region extends farther under the gate structure than the LDD region, and a maximum depth of the doping extension region is 10-times to 30-times greater than a maximum depth of the LDD.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chu Fu Chen, Chi-Feng Huang, Chia-Chung Chen, Chin-Lung Chen, Victor Chiang Liang, Chia-Cheng Pao
  • Publication number: 20240088224
    Abstract: A semiconductor structure includes a first gate structure, a second gate structure coupled to the first gate structure, a source region, a first drain region, and a second drain region. The source region is surrounded by the first gate structure and the second gate structure. The first drain region is separated from the source region by the first gate structure. The second drain region is separated from the source region by the second gat structure. A shape of the first drain region and a shape of the second drain region are different from each other from a plan view.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 14, 2024
    Inventors: HSING-I TSAI, FU-HUAN TSAI, CHIA-CHUNG CHEN, HSIAO-CHUN LEE, CHI-FENG HUANG, CHO-YING LU, VICTOR CHIANG LIANG
  • Patent number: 11923252
    Abstract: A semiconductor device includes a first set of nanostructures stacked over a substrate in a vertical direction, and each of the first set of nanostructures includes a first end portion and a second end portion, and a first middle portion laterally between the first end portion and the second end portion. The first end portion and the second end portion are thicker than the first middle portion. The semiconductor device also includes a first plurality of semiconductor capping layers around the first middle portions of the first set of nanostructures, and a gate structure around the first plurality of semiconductor capping layers.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sai-Hooi Yeong, Bo-Feng Young, Chi-On Chui, Chih-Chieh Yeh, Cheng-Hsien Wu, Chih-Sheng Chang, Tzu-Chiang Chen, I-Sheng Chen
  • Publication number: 20240071799
    Abstract: A system for a semiconductor fabrication facility comprises a transporting tool configured to move a carrier, a first manufacturing tool configured to accept the carrier facing in a first direction, a second manufacturing tool configured to accept the carrier facing in the second direction, and an orientation tool. The carrier is moved to the orientation tool by the transporting tool prior to being moved to the first manufacturing tool or the second manufacturing tool by the transporting tool. The orientation tool rotates the carrier so that the carrier is accepted by the first manufacturing tool or the second manufacturing tool. The transporting tool, the first manufacturing tool, the second manufacturing tool and the orientation tool are physically separated from each other.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: CHUAN WEI LIN, FU-HSIEN LI, YONG-JYU LIN, RONG-SHEN CHEN, CHI-FENG TUNG, HSIANG YIN SHEN
  • Publication number: 20230420818
    Abstract: A multi-layered resonator circuit structure and a multi-layered filter circuit structure. The multi-layered resonator circuit structure includes a multi-layered substrate, a plurality of resonators and a plurality of conductive components. The multi-layered substrate has a top surface, a bottom surface, and a ground layer. The top surface and the bottom surface face away from each other. The ground layer is located between the top surface and the bottom surface. A part of the plurality of resonators is/are disposed on the top surface. Another part of the plurality of resonators is/are disposed on the bottom surface. The plurality of conductive components is located in the multi-layered substrate. The plurality of resonators is electrically connected to the ground layer, respectively, via the plurality of conductive components.
    Type: Application
    Filed: March 14, 2023
    Publication date: December 28, 2023
    Applicants: UNIMICRON TECHNOLOGY CORP., TUNGHAI UNIVERSITY
    Inventors: Chi-Feng CHEN, Po-Sheng YEN, Ruey-Beei WU, Ra-Min TAIN, Chin-Sheng WANG, Jun-Ho CHEN
  • Publication number: 20230305643
    Abstract: A joystick module includes a casing, a movable component, a circuit board, a base, a swing arm, a joystick and a sensor. The movable component is disposed inside or outside the casing. The base is disposed within the casing. The swing arm is disposed within the casing, pivotally connected to the base and connected to the movable component for driving the movable component to move. The joystick is connected to the swing arm for driving the swing arm to move. The sensor is disposed on the circuit board and opposite to the movable component, and configured to sense a plurality of received signals from the movable component. The received signals are different with the movement of the movable component.
    Type: Application
    Filed: March 22, 2023
    Publication date: September 28, 2023
    Inventors: Chun-Tseng HUNG, Hsin-Chang CHEN, Yi-Huan CHEN, Yi-Wei CHIU, Chih-Hsien CHUANG, Chi-Feng CHEN, Ying-Jui LEE
  • Publication number: 20220206548
    Abstract: An example non-transitory machine-readable storage medium includes instructions to determine whether a cooling fan is controlled by pulse wave modulation (PWM) or is voltage-controlled. When executed, the instructions cause a processor of a computing device to transmit first and second PWM test signals at different PWM duties to a fan connector connected to the cooling fan, receive a first and second fan speed signals in response, and determine, when the first fan speed signal is not equal to the second fan speed signal, that the cooling fan is a PWM-controlled fan. The instructions further cause the processor to transmit first and second voltage test signals at different voltages to the fan connector, receive a third fan and fourth speed signal in response, and determine, when the third fan speed signal is not equal to the fourth fan speed signal, that the cooling fan is a voltage-controlled fan.
    Type: Application
    Filed: July 24, 2019
    Publication date: June 30, 2022
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Hsiang Chuan Sung, Chien Hao Chen, Fu-Yi Chen, Yi-Hsuan Huang, Chi-feng Chen
  • Patent number: 11183152
    Abstract: A method for compensating for a brightness of an abnormal pixel of a display device is provided. The display device includes a plurality of normal pixels. The method includes: enhancing a brightness of at least one of the normal pixels to compensate for the brightness of the abnormal pixel. The at least one of the normal pixels has a same color as the abnormal pixel, and is adjacent to the abnormal pixel.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: November 23, 2021
    Assignee: Innolux Corporation
    Inventors: Ming-Chia Shih, Chin-Lung Ting, Chi-Feng Chen
  • Publication number: 20210049978
    Abstract: A method for compensating for a brightness of an abnormal pixel of a display device is provided. The display device includes a plurality of normal pixels. The method includes: enhancing a brightness of at least one of the normal pixels to compensate for the brightness of the abnormal pixel. The at least one of the normal pixels has a same color as the abnormal pixel, and is adjacent to the abnormal pixel.
    Type: Application
    Filed: July 23, 2020
    Publication date: February 18, 2021
    Applicant: Innolux Corporation
    Inventors: Ming-Chia Shih, Chin-Lung Ting, Chi-Feng Chen
  • Patent number: 9356060
    Abstract: A system and method for blocking light from regions around a photodiode in a pixel of an image sensor is provided. In an embodiment a first optical block layer is formed on a first glue layer and a second glue layer is formed on the first optical block layer. The formation of the first optical block layer and the second glue layer is repeated one or more times to form multiple optical block layers and multiple glue layers. As such, if voids open up in the optical block layers during further processing, there is another optical block layer to block any light that may have penetrated through the void.
    Type: Grant
    Filed: May 31, 2013
    Date of Patent: May 31, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Ho Tai, Po-Jung Chiang, Bo-Chang Su, Chi-Feng Chen, Jung-I Lin
  • Patent number: 9051649
    Abstract: Provided is a physical vapor deposition apparatus with one or multiple deposition chambers for depositing films on substrates. The deposition chambers includes a heater and various cooling features to cool the chamber, the heater and the substrate. The sidewalls and top of the chamber are cooled by a cooling feature. The heater includes a cooling plate. A fitted heated cover is disposed between the heater and the substrate. A cooling pipe delivers a coolant throughout the cooling plate and extends in a high spatial density throughout the surface of the cooling plate. The cooling pipe occupies an area of about 14-20% of the area of the cooling plate and no location on the cooling plate surface is greater than about 15-20 mm from the cooling pipe. The cooling pipe cools the heater rapidly and enables deposition operations of long duration and using high power to be carried out.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: June 9, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Pao-Tsung Lai, Chia-Chiun Chen, Ching-Chung Cheng, Chi-Feng Chen
  • Publication number: 20140264701
    Abstract: A system and method for blocking light from regions around a photodiode in a pixel of an image sensor is provided. In an embodiment a first optical block layer is formed on a first glue layer and a second glue layer is formed on the first optical block layer. The formation of the first optical block layer and the second glue layer is repeated one or more times to form multiple optical block layers and multiple glue layers. As such, if voids open up in the optical block layers during further processing, there is another optical block layer to block any light that may have penetrated through the void.
    Type: Application
    Filed: May 31, 2013
    Publication date: September 18, 2014
    Inventors: Chih-Ho Tai, Po-Jung Chiang, Bo-Chang Su, Chi-Feng Chen, Jung-I Lin
  • Publication number: 20140246601
    Abstract: A scanned ultraviolet-light emitting diode (UV-LED) exposure device, exposing a large area by using a periodic UV-LED exposure light source with a fixed rate in an exposure task without a need of stopping movement of the device, so as to periodically repeat a use of an exposure light source to increase a use efficiency of the energy source, resulting in an improved uniformity of exposure, with the LEDs alternatively arranged policy, which further results in an improved yield. In addition, the overall design of the upper and lower exposure stations and the periodic moving ring assembly sufficiently employs the available space, and results in a reduced volume, a corresponding production space, energy consumption and production cost.
    Type: Application
    Filed: July 3, 2013
    Publication date: September 4, 2014
    Inventor: Chi-Feng Chen
  • Patent number: 8809813
    Abstract: A scanned ultraviolet-light emitting diode (UV-LED) exposure device, exposing a large area by using a periodic UV-LED exposure light source with a fixed rate in an exposure task without a need of stopping movement of the device, so as to periodically repeat a use of an exposure light source to increase a use efficiency of the energy source, resulting in an improved uniformity of exposure, with the LEDs alternatively arranged policy, which further results in an improved yield. In addition, the overall design of the upper and lower exposure stations and the periodic moving ring assembly sufficiently employs the available space, and results in a reduced volume, a corresponding production space, energy consumption and production cost.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: August 19, 2014
    Assignee: National Central University
    Inventor: Chi-Feng Chen
  • Patent number: 8253089
    Abstract: The present invention discloses a pointing error correcting system and method thereof applied for a concentrated photovoltaic or solar heat energy system comprising a processing module, a driving module, a tracker and a measuring module. The method comprises steps of calculating a position of a celestial body; controlling the driving module to drive the tracker pointing toward the celestial body; calculating an error value between the pointing of the tracker and the celestial body measured by the measuring module through a coordinate transforming method; and correcting the driving module to drive the tracker pointing the celestial body.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: August 28, 2012
    Assignee: National Central University
    Inventors: Jiunn-Chi Wu, Jhih-Wei Liou, Chi-Feng Chen
  • Patent number: 8031405
    Abstract: An optical adjusting apparatus having a composite pattern structure is described. The optical adjusting apparatus include a substrate layer, at least one first pattern module and at least one second pattern module. The substrate has a first optical surface and a second optical surface opposite to the first optical surface. The first pattern module positioned on the first optical surface, wherein the first pattern module has a first structure unit along a first arrangement direction. The second pattern module which is adjacent to the first pattern module and positioned on the first optical surface. The second pattern module has the second structure unit along a second arrangement direction. The first structure unit of the first pattern module is connected to the second structure unit of the second pattern module. Therefore, the convergent angle of a light module is adjusted and the brightness of the light module is increased along specific direction.
    Type: Grant
    Filed: April 15, 2009
    Date of Patent: October 4, 2011
    Assignee: Dayu Optoelectronics
    Inventors: Jauh-jung Yang, Chi-feng Chen
  • Publication number: 20110228392
    Abstract: An optical retroreflective apparatus and method thereof are described. The optical retroreflective apparatus includes a substrate, a first material layer, a first taper pattern layer, a reflecting layer, and a second material layer. The first material layer is formed on the substrate. The first taper pattern layer is formed on the first material layer wherein the first taper pattern layer has a plurality of first pyramidal units. The reflecting layer is formed on the first taper pattern layer wherein the reflecting layer has a plurality of reflecting patterns and each of the reflecting patterns is covered with each of first pyramidal units. The second material layer is formed on the reflecting layer wherein the second material layer has a second taper pattern layer having a plurality of second pyramidal units. The second taper pattern layer is covered with the reflecting layer and the second pyramidal units are filled with the spacing region between the reflecting patterns of the reflecting layer.
    Type: Application
    Filed: May 28, 2010
    Publication date: September 22, 2011
    Applicant: DAYU optoelectronics
    Inventors: Jauh-jung Yang, Chi-feng Chen