Abstract: A range hood for preventing air pollution is disclosed and includes a main body, a gas guider, a filtration and purification component and at least one gas detection module. The main body is configured to form a diversion path. The gas guider is disposed in the diversion path for guiding an air convection. The filtration and purification component is disposed in the diversion path for filtering and purifying an air pollution source contained in the air convection guided by the gas guider. The at least one gas detection module is disposed in the diversion path for detecting the air pollution source and transmitting a gas detection datum.

Abstract: An indoor gas exchange system configured between an outdoor space and an indoor space includes one or more outdoor air pollution detectors, a plurality of indoor air pollution detectors, a gas exchange device, a filtering component, and a central processing controller. The gas exchange device is manufactured by a plurality of gas-guiding units integrated as a thin member through semiconductor manufacturing processes. The gas exchange device is configured between the outdoor space and the indoor space to provide gas exchange for the indoor gas. The central processing controller performs an intelligent computation to control the gas exchange device to be opened or closed and to determine whether the outdoor gas is to be introduced into the indoor space or the indoor gas is to be discharged to the outdoor space, so that the indoor gas in the indoor space is exchanged and cleaned to a safe and breathable state.

Abstract: A system for detecting and cleaning indoor air pollution adapted to be utilized in an indoor space with an HVAC system includes one or more outdoor gas detection devices, a plurality of channels, a plurality of indoor gas detection devices, a plurality of physical-typed or chemical-typed filtering devices, and a control central processor. The blower of the filtering device receives a control command so as to be driven and to generate an air convection which is directed. Therefore, the air pollution is filtered by the filtering component to allow the indoor air pollution data to approach to almost zero, so that a gas in the indoor space is cleaned to a safe and breathable state.

Abstract: A system for detecting and cleaning indoor air pollution includes gas detection devices and filtering devices. The gas detection devices are adapted to detect a qualitative property and a concentration of an air pollution and output an air pollution data to perform an intelligent computation. The filtering devices are physical-typed or chemical-typed for filtering the air pollution. The filtering devices include one or more movable filtering devices, and the movable filtering device includes a gas detection device. After the intelligent computation is performed to locate an air pollution location, a control command is transmitted to the movable filtering device selectively and intelligently, and the movable filtering device receives the control command and is moved to the air pollution location. Therefore, the movable filtering device allows the air pollution data to approach to a non-detection state, thus a gas in the indoor space is cleaned to a safe and breathable state.

Abstract: A semiconductor device includes a first set of nanostructures stacked over a substrate in a vertical direction, and each of the first set of nanostructures includes a first end portion and a second end portion, and a first middle portion laterally between the first end portion and the second end portion. The first end portion and the second end portion are thicker than the first middle portion. The semiconductor device also includes a first plurality of semiconductor capping layers around the first middle portions of the first set of nanostructures, and a gate structure around the first plurality of semiconductor capping layers.

Abstract: A flood warning method, adapted to a detection field, the method comprises: obtaining an original image associated with the detection field by a camera, wherein the original image includes a predetermined detection area; performing an image processing procedure on the original image by a processor to obtain a processed image, and overlapping the predetermined detection area with the processed image; calculating a ratio of a puddle area overlapping the predetermined detection area by the processor; determining whether the ratio falls within a warning range by the processor; and outputting a warning notification by the processor when the ratio falls within the warning range.

Abstract: A flood warning method, adapted to a detection field, the method comprises: obtaining an original image associated with the detection field by a camera, wherein the original image includes a predetermined detection area; performing an image processing procedure on the original image by a processor to obtain a processed image, and overlapping the predetermined detection area with the processed image; calculating a ratio of a puddle area overlapping the predetermined detection area by the processor; determining whether the ratio falls within a warning range by the processor; and outputting a warning notification by the processor when the ratio falls within the warning range.

Abstract: A reactive UV absorber suitable for polyurethane is provided. The reactive UV absorber is a compound of formula 1: wherein R1 is H or Cl.

Abstract: A reactive UV absorber suitable for polyurethane is provided. The reactive UV absorber is a compound of formula 1: wherein R1 is H or Cl.

Abstract: An unmanned aerial vehicle operator identity authentication system is provided, including a flight control module and a license certificate module connected with each other. The flight control module includes a first encryption and decryption unit for generating a random number code, and a first storage unit for storing a license register table. The license certificate module includes a second storage unit for storing a license certificate identifier, and a second encryption and decryption unit for encrypting the received random number code and the license certificate identifier, and transmitting the encrypted data to the first encryption and decryption unit. After decryption, if the first encryption and decryption unit determines that the decrypted random number code is the same as the original random number code, and the decrypted license certificate identifier exists in the license register table, the operator identity authentication is completed and the UAV can be actuated.

Abstract: Consistent with an example embodiment, a WLCSP (wafer-level chip-scale package) device may be encapsulating in a six-sided protection envelope. The envelope is a molding compound or other resilient material. The encapsulated WLCSP device is protected from handling damage during assembly into the end user's system.

Abstract: In an example embodiment, there is method for assembling semiconductor devices, the method comprises providing a temporary carrier having a plurality device die locations and a boundary edge. Surrounding the device die locations, electrical connection pads are applied. Device die in the plurality of device die locations are mounted; the device die have pad landings electrically coupled to active components with the device die. The pad landings of the device die are wire bonded to corresponding electrical connection pads. With the molding compound flowing to the boundary edge of the temporary carrier, the device die are encapsulated. In a particular example embodiment, the electrical connection pads may be ball bonds.

Abstract: A memory apparatus and a related testing method are provided in the present invention. The memory apparatus includes a memory and a testing module. The testing module includes an error recording unit for recording corresponding addresses of bit errors occurred in the memory. The testing module determines whether the memory has multi-bit error according to the addresses recorded in the error recording unit. The memory is an ECC memory.

Abstract: A memory apparatus and a related testing method are provided in the present invention. The memory apparatus includes a memory and a testing module. The testing module includes an error recording unit for recording corresponding addresses of bit errors occurred in the memory. The testing module determines whether the memory has multi-bit error according to the addresses recorded in the error recording unit. The memory is an ECC memory.

Abstract: A method of accessing internal memory of a processor and the device thereof. The method employs a bank swapping mechanism for the processing unit of a processor and a direct memory access controller to simultaneously access different memory units in internal memory. The processing unit can continuously access and process data in the internal memory to optimize its efficiency. In the device, the processing unit of a processor and a direct memory access controller are coupled to internal memory through a switching circuit, the switch of which enables the processing unit and the direct memory access controller to access different memory units in the internal memory. Therefore, the processing unit can continuously access and process data in the internal memory to optimize its efficiency.

Abstract: A test clock generating apparatus is provided in the invention. The test clock generating apparatus includes an at-speed clock generator and a multiplexer. The at-speed clock generator is for receiving a reference clock signal and a scan chain enable signal and outputting an at-speed clock signal. The frequency of the at-speed clock signal is substantially the same with that of the reference clock signal. The multiplexer is for receiving the at-speed clock signal and a scan chain clock signal and outputting a test clock signal according to the scan chain enable signal. The frequency of the reference clock signal is higher than that of the scan chain clock.

Abstract: A method of accessing internal memory of a processor and the device thereof. The method employs a bank swapping mechanism for the processing unit of a processor and a direct memory access controller to simultaneously access different memory units in internal memory. The processing unit can continuously access and process data in the internal memory to optimize its efficiency. In the device, the processing unit of a processor and a direct memory access controller are coupled to internal memory through a switching circuit, the switch of which enables the processing unit and the direct memory access controller to access different memory units in the internal memory. Therefore, the processing unit can continuously access and process data in the internal memory to optimize its efficiency.

Abstract: A logic system for performing scan test with single scan clock and related method. The logic system includes a first clock domain, which performs logic operations and scan tests with a first clock signal, and a second clock domain, which performs logic operations with a second clock signal and performs scan tests with the first clock signal.

Abstract: A test clock generating apparatus is provided in the invention. The test clock generating apparatus includes an at-speed clock generator and a multiplexer. The at-speed clock generator is for receiving a reference clock signal and a scan chain enable signal and outputting an at-speed clock signal. The frequency of the at-speed clock signal is substantially the same with that of the reference clock signal. The multiplexer is for receiving the at-speed clock signal and a scan chain clock signal and outputting a test clock signal according to the scan chain enable signal. The frequency of the reference clock signal is higher than that of the scan chain clock.

Abstract: A logic system for performing scan test with single scan clock and related method. The logic system includes a first clock domain, which performs logic operations and scan tests with a first clock signal, and a second clock domain, which performs logic operations witha second clock signal and performs scan tests withthe first clock signal.