Abstract: A nitride semiconductor epitaxial stack structure including: a Silicon substrate; an aluminum-including nucleation layer disposed on the silicon substrate; a buffer structure disposed on the aluminum-including nucleation layer and sequentially including: a first superlattice epitaxial structure, a first GaN based thick layer disposed on the first superlattice epitaxial structure, a second superlattice epitaxial structure disposed on the first GaN based thick layer, and a second GaN based thick layer disposed on the second superlattice epitaxial structure; a channel layer disposed on the buffer structure; a barrier layer disposed on the channel layer; and a two dimensional electron gas layer disposed near an interface between the channel layer and the barrier layer, wherein the total thickness of the first GaN based thick layer and the second GaN based thick layer is more than 2 micrometers.

Abstract: A first electronic element is disclosed, which includes: a first substrate having a first surface; a first electrode pad disposed on the first surface, wherein the first electrode pad has a second surface away from the first substrate; and an insulating layer disposed on the first surface, wherein the insulating layer includes an opening, the opening is disposed correspondingly to the first electrode pad, and the opening overlaps the first electrode pad in a normal direction of the first surface, wherein the insulating layer has a third surface away from the first substrate, a distance between the third surface and the second surface in the normal direction of the first surface is defined as a first distance, and the first distance is greater than 0 ?m and less than or equal to 14 ?m. In addition, the disclosure further provides an electronic device including the first electronic element.

Abstract: A semiconductor power device includes an engineered aluminum-nitride substrate structure, and method of fabricating the same are described. The engineered substrate structure is effectively integrated with a transition layer of AlN/AlGaN disposed thereon, a buffer layer disposed on the transition layer having a C—(Al)GaN/u-GaN multiple stacking layered structure, a channel layer, a barrier layer, and an optional SiNx interlayer together, to form a GaN-based semiconductor power device. The GaN buffer layer is capable of achieving sufficient thickness for higher performance. The engineered substrate structure has a core region made of an aluminum nitride (AlN) substrate, a single crystal silicon layer as top material layer thereof, and bonded together with an encapsulated multi-layered structure containing adhesive layers, thin film layers and the AlN substrate.

Abstract: A semiconductor power device includes a substrate, a buffer structure formed on the substrate, a barrier structure formed on the buffer structure, a channel layer formed on the barrier structure, and a barrier layer formed on the channel layer. The barrier structure includes a first functional layer on the buffer structure, a first back-barrier layer on the first functional layer, and an interlayer between the first back-barrier layer and the first functional layer. A material of the first back-barrier layer comprises Alx1Ga1-x1N, a material of the first functional layer comprises Alx2Ga1-x2N, 0<x1?1, 0?x2?1, and x1?x2. The interlayer includes a carbon doped or an iron doped material.

Abstract: A display device is provided. The display device includes a first light-emitting diode and a second light-emitting diode. The first light-emitting diode includes a first conductive pad, a second conductive pad adjacent to the first conductive pad, and a first light-emitting portion disposed on the first conductive pad. The second light-emitting diode includes a third conductive pad, a fourth conductive pad adjacent to the third conductive pad, and a second light-emitting portion disposed on the third conductive pad. A distance between the first conductive pad and the third conductive pad is less than a distance between the second conductive pad and the fourth conductive pad.

Abstract: A display device is provided. The display device includes a display panel, a flexible circuit board, an integrated circuit, and a conductive layer. The flexible circuit board is electrically connected with the display panel and includes a plurality of conductive wires. The integrated circuit is disposed on the flexible circuit board and has a plurality of bumps. The conductive layer is disposed between the integrated circuit and the flexible circuit board and covers a periphery of the integrated circuit. In addition, the conductive layer includes an adhesive and a plurality of conductive particles distributed in the adhesive. Moreover, the bumps are electrically connected with the conductive wires through the conductive particles.

Abstract: A nitride semiconductor epitaxial stack structure including: a Silicon substrate; an aluminum-including nucleation layer disposed on the silicon substrate; a buffer structure disposed on the aluminum-including nucleation layer and sequentially including: a first superlattice epitaxial structure, a first GaN based thick layer disposed on the first superlattice epitaxial structure, a second superlattice epitaxial structure disposed on the first GaN based thick layer, and a second GaN based thick layer disposed on the second superlattice epitaxial structure; a channel layer disposed on the buffer structure; a barrier layer disposed on the channel layer; and a two dimensional electron gas layer disposed near an interface between the channel layer and the barrier layer, wherein the total thickness of the first GaN based thick layer and the second GaN based thick layer is more than 2 micrometers.

Abstract: An ion implanting method includes providing a gas having a bonding energy ranged from about 220 kJ/mol to about 450 kJ/mol; ionizing the gas to form a plurality of types of ions; and directing at least one of the types of the ions to implant a substance. The gas includes at least one of N2H4, CH3N2H3, C6H5N2H3, CFCl3 and C(CH3)3F.

Abstract: A display device is provided. The display device includes a substrate having a first surface and a second surface opposite to the first surface, a plurality of light-emitting units disposed on the first surface of the substrate, and a plurality of conductive structures extending into the substrate from the second surface of the substrate. The plurality of conductive structures are electrically connected to the plurality of light-emitting units.

Abstract: Embodiments of a method for generating ions in an ion source are provided. The method for generating ions in an ion source includes introducing a dopant gas and a diluent gas into an ion source arc chamber. The method for generating ions in an ion source further includes generating plasma in the ion source arc chamber based on the dopant gas and the diluent gas. In addition, the dopant gas includes carbon monoxide, and the diluent gas includes xenon and hydrogen.

Abstract: A method of manufacturing electronic module is provided. The method can perform selective partial molding by forming the tapes in a predetermined area on the circuit substrate, setting electronic components out the predetermined area on the circuit substrate, forming the molding member encapsulating the whole circuit substrate and removing the tapes along of the molding member thereon. Following, forming an EMI shielding layer on the molding member and setting optoelectronics in the predetermined area on the circuit substrate could protect the electronic components from electromagnetic disturbance and avoid the optoelectronics being encapsulated.

Abstract: A method of manufacturing electronic package module is provided. The method provides selective molding by attaching tapes on the circuit substrate on which electric components are mounted thereon, forming molding compound to cover the circuit substrate, and removing tapes along with the molding compound thereon.

Abstract: A substrate structure includes a first substrate, a plurality of first bonding pads, a second substrate and a connecting layer. The first substrate has an element configuration area and a peripheral area. The peripheral area is located around the element configuration area. The first bonding pads are configured spacing at the peripheral area, and a gap is provided between two adjacent first bonding pads. The first bonding pads are located between the first substrate and the second substrate. The connecting layer is located between the first bonding pads and the second substrate. The part of the connecting layer close to the element configuration area is configured with a plurality of first arc edges.

Abstract: A substrate structure includes a first substrate, a plurality of first bonding pads, a second substrate and a connecting layer. The first substrate has an element configuration area and a peripheral area. The peripheral area is located around the element configuration area. The first bonding pads are configured spacing at the peripheral area, and a gap is provided between two adjacent first bonding pads. The first bonding pads are located between the first substrate and the second substrate. The connecting layer is located between the first bonding pads and the second substrate. The part of the connecting layer close to the element configuration area is configured with a plurality of first arc edges.

Abstract: A substrate structure includes a first substrate, a plurality of first bonding pads and a connecting layer. The first substrate has an element configuration area and a peripheral area. The peripheral area is disposed around the element configuration area. The first bonding pads are configured spacing at the peripheral area, and a gap is provided between two adjacent first bonding pads. The connecting layer is disposed on the first substrate and covers the first bonding pads and the gaps. The part of the connecting layer close to the element configuration area is configured with a plurality of first arc edges.

Abstract: A substrate structure includes a first substrate, a plurality of first bonding pads and a connecting layer. The first substrate has an element configuration area and a peripheral area. The peripheral area is disposed around the element configuration area. The first bonding pads are configured spacing at the peripheral area, and a gap is provided between two adjacent first bonding pads. The connecting layer is disposed on the first substrate and covers the first bonding pads and the gaps. The part of the connecting layer close to the element configuration area is configured with a plurality of first arc edges.

Abstract: Embodiments of a method for generating ions in an ion source are provided. The method for generating ions in an ion source includes introducing a dopant gas and a diluent gas into an ion source arc chamber. The method for generating ions in an ion source further includes generating plasma in the ion source arc chamber based on the dopant gas and the diluent gas.

Abstract: A light-emitting structure includes a transparent substrate; a first transparent conductive layer formed on the transparent substrate and having a first top surface and a second top surface substantially coplanar with the first top surface; a first light-emitting stack formed on the first top surface; and a first electrode directly formed on the second top surface.

Abstract: A method of manufacturing electronic module is provided. The method can perform selective partial molding by forming the tapes in a predetermined area on the circuit substrate, setting electronic components out the predetermined area on the circuit substrate, forming the molding member encapsulating the whole circuit substrate and removing the tapes along of the molding member thereon. Following, forming an EMI shielding layer on the molding member and setting optoelectronics in the predetermined area on the circuit substrate could protect the electronic components from electromagnetic disturbance and avoid the optoelectronics being encapsulated.

Abstract: A method of manufacturing electronic package module is provided. The method provides selective molding by attaching tapes on the circuit substrate on which electric components are mounted thereon, forming molding compound to cover the circuit substrate, and removing tapes along with the molding compound thereon.