Patents by Inventor Chia Shen

Chia Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11002927
    Abstract: In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: May 11, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Lun Chang, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hsuan-Ting Kuo, Chia-Shen Cheng, Chih-Chiang Tsao
  • Patent number: 10978370
    Abstract: A semiconductor structure includes a die embedded in a molding material, the die having die connectors on a first side; a first redistribution structure at the first side of the die, the first redistribution structure being electrically coupled to the die through the die connectors; a second redistribution structure at a second side of the die opposing the first side; and a thermally conductive material in the second redistribution structure, the die being interposed between the thermally conductive material and the first redistribution structure, the thermally conductive material extending through the second redistribution structure, and the thermally conductive material being electrically isolated.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: April 13, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Cheng-Ting Chen, Chia-Lun Chang, Chih-Wei Lin, Hsiu-Jen Lin, Ching-Hua Hsieh, Chung-Shi Liu
  • Patent number: 10921933
    Abstract: A touch detection apparatus and a touch detection method are provided. The touch detection apparatus includes a sensing element and a detection circuit. The touch detection method includes the following steps. At least one touch sensing value is provided by the sensing element. Whether a first object touches the sensing element is determined by the detection circuit according to the at least one touch sensing value and a first reference value in a first stage. If the first object touches the sensing element, a second reference value is calculated by the detection circuit according to the at least one touch sensing value and the detection circuit enters a second stage. Whether a second object touches the first object is determined by the detection circuit according to the at least one touch sensing value and the second reference value in the second stage.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: February 16, 2021
    Assignee: ITE Tech. Inc.
    Inventors: Chih-Hsuan Lo, Chia-Shen Hsu
  • Publication number: 20210044886
    Abstract: An earphone has a housing, a sound output hole, a first touch sensor, a second touch, a third touch sensor, and a microprocessor. The microprocessor is coupled to the first touch sensor, the second touch sensor and the third touch sensor for determining whether the earphone is worn on an ear according to the sensing result of the first touch sensor, determining whether the earphone is held in hand according to the sensing result of the second touch sensor, and providing a corresponding control function according to the sensing result of the third touch sensor.
    Type: Application
    Filed: August 5, 2020
    Publication date: February 11, 2021
    Inventors: Chia-Shen Hsu, Ping-Yuan Wang
  • Patent number: 10910469
    Abstract: A semiconductor device includes a substrate and a conducting structure. The substrate has a first conductivity type and includes a first isolation region, a first implant region, and a second implant region. The first isolation region is disposed along the circumference of the substrate. The first implant region has the first conductivity type, and the second implant region has a second conductivity type that is the opposite of the first conductivity type. The conducting structure is disposed on the substrate, and at least a portion of the conducting structure is located on the first isolation region.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: February 2, 2021
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Wen-Hua Wen, Chia-Shen Liu, Wen-Chung Chen, Chrong-Jung Lin
  • Patent number: 10903090
    Abstract: A method of forming a package structure includes the following processes. A die is attached to a polymer layer. An encapsulant is formed over the polymer layer to encapsulate sidewalls of the die. A RDL structure is formed on the encapsulant and the die. A conductive terminal is electrically connected to the die through the RDL structure. A light transmitting film is formed on the polymer layer. An alignment process is performed, and the alignment process uses an optical equipment to see through the light transmitting film to capture the alignment information included in the polymer layer. A singulating process is performed to singulate the package structure according to the alignment information.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: January 26, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ting Chen, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Wei-Yu Chen, Chia-Lun Chang, Chia-Shen Cheng, Cheng-Shiuan Wong
  • Publication number: 20210019013
    Abstract: A touch detection apparatus and a touch detection method are provided. The touch detection apparatus includes a sensing element and a detection circuit. The touch detection method includes the following steps. At least one touch sensing value is provided by the sensing element. Whether a first object touches the sensing element is determined by the detection circuit according to the at least one touch sensing value and a first reference value in a first stage. If the first object touches the sensing element, a second reference value is calculated by the detection circuit according to the at least one touch sensing value and the detection circuit enters a second stage. Whether a second object touches the first object is determined by the detection circuit according to the at least one touch sensing value and the second reference value in the second stage.
    Type: Application
    Filed: October 7, 2019
    Publication date: January 21, 2021
    Applicant: ITE Tech. Inc.
    Inventors: Chih-Hsuan Lo, Chia-Shen Hsu
  • Publication number: 20210013173
    Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.
    Type: Application
    Filed: September 28, 2020
    Publication date: January 14, 2021
    Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu
  • Patent number: 10868353
    Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes a chip package, an antenna pattern, and an insulating layer. The chip package includes a semiconductor die and an insulating encapsulation enclosing the semiconductor die. The antenna pattern is electrically coupled to the chip package, where a material of the antenna pattern comprises a conductive powder having fused metal particles. The insulating layer disposed between the chip package and the antenna pattern, where the antenna pattern includes a first surface in contact with the insulating layer, and a second surface opposite to the first surface, and a surface roughness of the second surface is greater than a surface roughness of the first surface.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Lin Lu, Hsiu-Jen Lin, Hsuan-Ting Kuo, Kai-Chiang Wu, Ming-Che Ho, Wei-Yu Chen, Yu-Peng Tsai, Chia-Lun Chang, Chia-Shen Cheng, Chih-Chiang Tsao, Tzu-Chun Tang, Ching-Hua Hsieh, Tuan-Yu Hung, Cheng-Shiuan Wong
  • Publication number: 20200388676
    Abstract: A semiconductor device includes a substrate and a conducting structure. The substrate has a first conductivity type and includes a first isolation region, a first implant region, and a second implant region. The first isolation region is disposed along the circumference of the substrate. The first implant region has the first conductivity type, and the second implant region has a second conductivity type that is the opposite of the first conductivity type. The conducting structure is disposed on the substrate, and at least a portion of the conducting structure is located on the first isolation region.
    Type: Application
    Filed: June 7, 2019
    Publication date: December 10, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Wen-Hua WEN, Chia-Shen LIU, Wen-Chung CHEN, Chrong-Jung LIN
  • Publication number: 20200365420
    Abstract: A method of forming a package structure includes the following processes. A die is attached to a polymer layer. An encapsulant is formed over the polymer layer to encapsulate sidewalls of the die. A RDL structure is formed on the encapsulant and the die. A conductive terminal is electrically connected to the die through the RDL structure. A light transmitting film is formed on the polymer layer. An alignment process is performed, and the alignment process uses an optical equipment to see through the light transmitting film to capture the alignment information included in the polymer layer. A singulating process is performed to singulate the package structure according to the alignment information.
    Type: Application
    Filed: May 16, 2019
    Publication date: November 19, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Ting Chen, Ching-Hua Hsieh, Hsiu-Jen Lin, Hao-Jan Pei, Wei-Yu Chen, Chia-Lun Chang, Chia-Shen Cheng, Cheng-Shiuan Wong
  • Patent number: 10790261
    Abstract: A method includes performing a first laser shot on a first portion of a top surface of a first package component. The first package component is over a second package component, and a first solder region between the first package component and the second package component is reflowed by the first laser shot. After the first laser shot, a second laser shot is performed on a second portion of the top surface of the first package component. A second solder region between the first package component and the second package component is reflowed by the second laser shot.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: September 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chen, Chia-Shen Cheng, Hao-Jan Pei, Philip Yu-Shuan Chung, Kuei-Wei Huang, Yu-Peng Tsai, Hsiu-Jen Lin, Ching-Hua Hsieh, Chen-Hua Yu, Chung-Shi Liu
  • Publication number: 20200271873
    Abstract: In an embodiment, a package structure including an electro-optical circuit board, a fanout package disposed over the electro-optical circuit board is provided. The electro-optical circuit board includes an optical waveguide. The fanout package includes a first optical input/output portion, a second optical input/output portion and a plurality of electrical input/output terminals electrically connected to the electro-optical circuit board. The first optical input/output portion is optically coupled to the second optical input/output portion through the optical waveguide of the electro-optical circuit board.
    Type: Application
    Filed: February 21, 2019
    Publication date: August 27, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Lun Chang, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Hsuan-Ting Kuo, Chia-Shen Cheng, Chih-Chiang Tsao
  • Publication number: 20200106156
    Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes a chip package, an antenna pattern, and an insulating layer. The chip package includes a semiconductor die and an insulating encapsulation enclosing the semiconductor die. The antenna pattern is electrically coupled to the chip package, where a material of the antenna pattern comprises a conductive powder having fused metal particles. The insulating layer disposed between the chip package and the antenna pattern, where the antenna pattern includes a first surface in contact with the insulating layer, and a second surface opposite to the first surface, and a surface roughness of the second surface is greater than a surface roughness of the first surface.
    Type: Application
    Filed: April 18, 2019
    Publication date: April 2, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Lin Lu, Hsiu-Jen Lin, Hsuan-Ting Kuo, Kai-Chiang Wu, Ming-Che Ho, Wei-Yu Chen, Yu-Peng Tsai, Chia-Lun Chang, Chia-Shen Cheng, Chih-Chiang Tsao, Tzu-Chun Tang, Ching-Hua Hsieh, Tuan-Yu Hung, Cheng-Shiuan Wong
  • Patent number: 10604700
    Abstract: A method for manufacturing a nitride phosphor is provided. The method comprises providing a nitride phosphor formulation and subjecting the nitride phosphor formulation to a hot isostatic pressing step. The nitride phosphor formulation comprises a flux and a phosphor precursor, wherein the flux is a barium-containing nitride. The phosphor precursor comprises two or more metal nitrides, and wherein a plurality of metal elements are present in the nitride phosphor and the two or more metal nitrides contain the plurality of metal elements.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: March 31, 2020
    Assignee: BELL CERAMICS CO., LTD.
    Inventors: Chang-Lung Chiang, Mu-Huai Fang, Chia-Shen Hsu, Ru-Shi Liu, Chaochin Su, Te-Hsin Chiang
  • Patent number: 10600556
    Abstract: An inductor structure formed on a substrate and extending in a quadrant comprising a first domain, a second domain, a third domain and a fourth domain is provided. The inductor structure comprises an input conducting wire, an output conducting wire and a conducting wire. The conducting wire is coupled between the input conducting wire and the output conducting wire. A first portion of the conducting wire is extended from a start terminal, to the second domain, to the fourth domain, to a stop terminal. A second portion of the conducting wire is extended from the start terminal, to the third domain, to the first domain, to the stop terminal.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: March 24, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventor: Chia-Shen Liu
  • Patent number: 10566261
    Abstract: A semiconductor structure includes a die embedded in a molding material, the die having die connectors on a first side; a first redistribution structure at the first side of the die, the first redistribution structure being electrically coupled to the die through the die connectors; a second redistribution structure at a second side of the die opposing the first side; and a thermally conductive material in the second redistribution structure, the die being interposed between the thermally conductive material and the first redistribution structure, the thermally conductive material extending through the second redistribution structure, and the thermally conductive material being electrically isolated.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: February 18, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Cheng-Ting Chen, Chia-Lun Chang, Chih-Wei Lin, Hsiu-Jen Lin, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20200006191
    Abstract: A semiconductor structure includes a die embedded in a molding material, the die having die connectors on a first side; a first redistribution structure at the first side of the die, the first redistribution structure being electrically coupled to the die through the die connectors; a second redistribution structure at a second side of the die opposing the first side; and a thermally conductive material in the second redistribution structure, the die being interposed between the thermally conductive material and the first redistribution structure, the thermally conductive material extending through the second redistribution structure, and the thermally conductive material being electrically isolated.
    Type: Application
    Filed: September 13, 2019
    Publication date: January 2, 2020
    Inventors: Hao-Jan Pei, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Cheng-Ting Chen, Chia-Lun Chang, Chih-Wei Lin, Hsiu-Jen Lin, Ching-Hua Hsieh, Chung-Shi Liu
  • Patent number: 10504815
    Abstract: A semiconductor structure includes a die embedded in a molding material, the die having die connectors on a first side; a first redistribution structure at the first side of the die, the first redistribution structure being electrically coupled to the die through the die connectors; a second redistribution structure at a second side of the die opposing the first side; and a thermally conductive material in the second redistribution structure, the die being interposed between the thermally conductive material and the first redistribution structure, the thermally conductive material extending through the second redistribution structure, and the thermally conductive material being electrically isolated.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: December 10, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hao-Jan Pei, Wei-Yu Chen, Chia-Shen Cheng, Chih-Chiang Tsao, Cheng-Ting Chen, Chia-Lun Chang, Chih-Wei Lin, Hsiu-Jen Lin, Ching-Hua Hsieh, Chung-Shi Liu
  • Publication number: 20190296002
    Abstract: In an embodiment, a method includes: aligning a first package component with a second package component, the first package component having a first region and a second region, the first region including a first conductive connector, the second region including a second conductive connector; performing a first laser shot on a first portion of a top surface of the first package component, the first laser shot reflowing the first conductive connector of the first region, the first portion of the top surface of the first package component completely overlapping the first region; and after performing the first laser shot, performing a second laser shot on a second portion of the top surface of the first package component, the second laser shot reflowing the second conductive connector of the second region, the second portion of the top surface of the first package component completely overlapping the second region.
    Type: Application
    Filed: October 1, 2018
    Publication date: September 26, 2019
    Inventors: Hao-Jan Pei, Hsiu-Jen Lin, Wei-Yu Chen, Philip Yu-Shuan Chung, Chia-Shen Cheng, Kuei-Wei Huang, Ching-Hua Hsieh, Chung-Shi Liu, Chen-Hua Yu