Abstract: A case tampering detection device, used for a computer system covered with a computer case, includes at least one detector for detecting whether the computer case is opened and generating a detection result; a storage unit; a microcontroller unit, coupled to the storage unit, for generating a case tampering event and storing the case tampering event in the microcontroller unit or the storage unit when being powered; and a power supply unit, coupled to the at least one detector, for receiving the detection result, and supplying power to the microcontroller unit when the detection result indicates that the computer case is opened.

Abstract: A multi-module wearable device. According to an embodiment of the present disclosure, there is provided a system, including: a first wearable instrument; a second wearable instrument including a biometric sensor; an electrical connection between the first wearable instrument and the second wearable instrument; and a strap, sized and dimensioned to be disposed about a wrist. The electrical connection may be capable of connecting the first wearable instrument to the second wearable instrument when the second wearable instrument is at a first position on the strap relative to the first wearable instrument, and of connecting the first wearable instrument to the second wearable instrument when the second wearable instrument is at a second position on the strap relative to the first wearable instrument.

Abstract: A bonding fixture. In some embodiments, the fixture includes: a plate for supporting a central region of the wafer, the central region including 80% of the area of the wafer; and a frame for supporting: the edge of the wafer, and the edge of the plate, the frame having: a first vacuum passage, for pulling the wafer against an upper surface of the frame, and a second vacuum passage, for pulling the plate against the frame.

Abstract: A system and method for alignment. In some embodiments, the method includes measuring a first offset, the first offset being an offset along a first direction between a first alignment mark and a second alignment mark, the first alignment mark being an alignment mark on a first edge of a source die, the second alignment mark being an alignment mark on a target wafer, and the first direction being substantially parallel to the first edge of the source die.

Abstract: An optical assembly (100) for use in a wearable device is provided, the assembly (100) comprising: a prism (104), a photonic integrated chip, PIC (108), a substrate layer (106), and a lid (102); wherein the PIC (108) is mounted onto the substrate layer (106); the prism (104) comprising: (i) a first input/output surface (112) optically coupled to the PIC (108), and (ii) a second input/output surface (114) optically coupled to the lid (102), the second input/output surface (114) orientated perpendicularly to the first input/output surface (112), and wherein the prism (104) provides an optical path and reflects a percentage of light from the first input/output surface (112) to the second input/output surface (114). Methods of manufacturing such an optical assembly are also provided.

Abstract: A minimally invasive spectrophotometric system. In some embodiments, the system includes a minimally invasive device and a spectrophotometer. The spectrophotometer may include: a transmitting fiber, a receiving fiber, and a head. The head of the spectrophotometer may include: a light source connected to the transmitting fiber and a photodetector connected to the receiving fiber. A portion of the transmitting fiber may be in an insertion tube of the minimally invasive device, and a portion of the receiving fiber may be in the insertion tube of the minimally invasive device. The head of the spectrophotometer may occupy a volume of less than 300 cubic centimeters.

Abstract: A computer system for failing a secure boot in a case tampering event comprises a microcontroller unit (MCU); a trusted platform module (TPM), for generating random bytes for a secure boot of the computer system; a bootloader, for storing information comprising the random bytes in the MCU and at least one hardware of the computer system and performing the secure boot, wherein the TPM is comprised in the bootloader; an operating system (OS), for performing the secure boot; and at least one sensor, coupled to the MCU, for detecting a case tampering event, and transmitting a signal for triggering a deletion of the random bytes, if the case tampering event happens. The MCU performs the operation of deleting the random bytes stored in the MCU and the at least one hardware according to a power supply, in response to the signal.

Abstract: An optical engine. In some embodiments, the optical engine includes an electronic interfacing component including: an upper surface having a plurality of conductors for forming a corresponding plurality of connections to a host board, a lower surface having a plurality of conductors for forming a corresponding plurality of connections to one or more optoelectronic elements, and a plurality of vias extending from the lower surface to the upper surface.

Abstract: An optoelectronic device. The device comprising: a silicon-on-insulator, SOI, wafer, the SOI wafer including a cavity and an input waveguide, the input waveguide being optically coupled into the cavity; and a mirror, located within the cavity and bonded to a bed thereof, the mirror including a reflector configured to reflect light received from the input waveguide in the SOI wafer.

Abstract: A bonding fixture. In some embodiments, the fixture includes: a plate for supporting a central region of the wafer, the central region including 80% of the area of the wafer; and a frame for supporting: the edge of the wafer, and the edge of the plate, the frame having: a first vacuum passage, for pulling the wafer against an upper surface of the frame, and a second vacuum passage, for pulling the plate against the frame.

Abstract: A siliconized heterogeneous optical engine. In some embodiments, the siliconized heterogeneous optical engine includes a photonic integrated circuit; an electro-optical chip, on a top surface of the photonic integrated circuit; an electronic integrated circuit, on the top surface of the photonic integrated circuit; an interposer, on the top surface of the photonic integrated circuit; a redistribution layer, on a top surface of the interposer, the redistribution layer including a plurality of conductive traces; and a plurality of protruding conductors, on the conductive traces of the redistribution layer. The electronic integrated circuit may be electrically connected to the electro-optical chip and to a conductive trace of the plurality of conductive traces of the redistribution layer.

Abstract: An optoelectronic module. In some embodiments, the optoelectronic module includes a substrate; a digital integrated circuit, on an upper surface of the substrate; a photonic integrated circuit, secured in a pocket of the substrate, the pocket being in the upper surface of the substrate; and an analog integrated circuit, on the photonic integrated circuit.

Abstract: A system integrating a fan-out package, including a first semiconductor die, with a second semiconductor die. In some embodiments the fan-out package includes the first semiconductor die, a mold compound, covering the first semiconductor die on at least two sides, and an electrical contact, on a lower surface of the first semiconductor die. The fan-out package may have a rabbet along a portion of a lower edge of the fan-out package.

Abstract: A system integrating a fan-out package, including a first semiconductor die, with a second semiconductor die. In some embodiments the fan-out package includes the first semiconductor die, a mold compound, covering the first semiconductor die on at least two sides, and an electrical contact, on a lower surface of the first semiconductor die. The fan-out package may have a rabbet along a portion of a lower edge of the fan-out package.

Abstract: An assembly. In some embodiments, the assembly includes a first semiconductor chip, a substrate, and a first alignment element. The alignment of the first semiconductor chip and the substrate may be determined at least in part by engagement of the first alignment element with a first recessed alignment feature, in a surface of the first semiconductor chip.

Abstract: An optoelectronic module. In some embodiments, the optoelectronic module includes: a substrate; a digital integrated circuit, on an upper surface of the substrate; and a frame, secured in a pocket of the substrate. The pocket is in a lower surface of the substrate, and the substrate includes an insulating layer, and a plurality of conductive traces.

Abstract: An optoelectronic module. In some embodiments, the module includes: a housing, a substantially planar subcarrier, a photonic integrated circuit, and an analog electronic integrated circuit. The subcarrier has a thermal conductivity greater than 10 W/m/K. The photonic integrated circuit and the analog electronic integrated circuit are secured to a first side of the subcarrier, and the subcarrier is secured to a first wall of the housing. A second side of the subcarrier, opposite the first side of the subcarrier, is parallel to, secured to, and in thermal contact with, an interior side of the first wall of the housing.

Abstract: A silicon photonic integrated circuit with a heater. In some embodiments, the silicon photonic integrated circuit includes a first waveguide, on a top surface of the silicon integrated circuit, and a heater element, on the first waveguide. The heater element may include a first metal layer, on the first waveguide, and a second metal layer, on the first metal layer, the second metal layer having a different composition than the first metal layer, the second layer having a thickness of less than 300 nm.

Abstract: An optoelectronic module. In some embodiments, the optoelectronic module includes: a substrate; a digital integrated circuit, on an upper surface of the substrate; and a frame, secured in a pocket of the substrate. The pocket is in a lower surface of the substrate, and the substrate includes an insulating layer, and a plurality of conductive traces.

Abstract: Embodiments are directed to a photonic device that includes a first substrate defining a surface and a trench forming a depression along a portion of the surface, and a second substrate coupled with the surface and extending from the surface to form a raised portion around the trench. The photonic device can also include a laser die positioned within the trench, such that the laser die is surrounded by the second substrate, and an optical material positioned within a region between the laser die and the second substrate. The photonic device can further include a third substrate coupled with the second substrate such that the second substrate is positioned between the first substrate and the third substrate such that the second substrate is configured to at least partially isolate the laser die from mechanical stress exerted on the optical device.