Patents by Inventor Chia Ying Lee
Chia Ying Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11984165Abstract: A memory device includes a plurality of word lines (WLs). The memory device includes a plurality of drivers that are each configured to control a corresponding one of the plurality of WLs and each comprise a first transistor having a first conductive type and a second transistor having a second conductive type. The first transistor of a first one of the drivers is formed in a first well of a substrate, and the second transistor of the first driver is formed in a second well of the substrate. The first well is spaced apart from the second well.Type: GrantFiled: May 24, 2022Date of Patent: May 14, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Ying Lee, Chia-En Huang, Chieh Lee
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Publication number: 20240136183Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
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Publication number: 20240122163Abstract: The present invention demonstrated a Cre-loxP based cofilin-1 transgenic animal model to address the pathophysiological role of over-expressed cofilin-1 on systemic development.Type: ApplicationFiled: February 6, 2023Publication date: April 18, 2024Inventors: Yi-Jang LEE, Yu-Chuan LIN, Min-Ying LIN, Bing-Ze LIN, Chia-Yun KANG
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Publication number: 20240122457Abstract: The present invention provides an endoscope, which includes a catheter, a handle, an instrument tube, a linkage unit, a controlling unit, cables, tension units, and a tension adjusting unit. One end of the catheter is provided with a lens, and the other end of the catheter is extended into the handle. One part of the instrument tube is disposed in the handle and is connected with the other end of the catheter. The other part of the instrument tube is exposed outside the handle. The linkage unit is disposed in the handle. The controlling unit is disposed outside the handle and is extended into the handle to be pivotally connected with the linkage unit. One end of the cable is connected to the linkage unit, and the other end thereof is connected to one end periphery of the catheter. One end of the tension unit is connected to the periphery of the cable. The tension adjusting unit is provided with adjusting members and connection members.Type: ApplicationFiled: October 6, 2023Publication date: April 18, 2024Inventors: CHIA-JUNG LEE, YUEH-YING FAN
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Patent number: 11955191Abstract: A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.Type: GrantFiled: June 2, 2023Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Perng-Fei Yuh, Tung-Cheng Chang, Gu-Huan Li, Chia-En Huang, Chun-Ying Lee, Yih Wang
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Publication number: 20240088224Abstract: A semiconductor structure includes a first gate structure, a second gate structure coupled to the first gate structure, a source region, a first drain region, and a second drain region. The source region is surrounded by the first gate structure and the second gate structure. The first drain region is separated from the source region by the first gate structure. The second drain region is separated from the source region by the second gat structure. A shape of the first drain region and a shape of the second drain region are different from each other from a plan view.Type: ApplicationFiled: November 14, 2023Publication date: March 14, 2024Inventors: HSING-I TSAI, FU-HUAN TSAI, CHIA-CHUNG CHEN, HSIAO-CHUN LEE, CHI-FENG HUANG, CHO-YING LU, VICTOR CHIANG LIANG
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Publication number: 20240088195Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.Type: ApplicationFiled: November 16, 2023Publication date: March 14, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chia-Yu WEI, Yen-Liang LIN, Kuo-Cheng LEE, Hsun-Ying HUANG, Hsin-Chi CHEN
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Patent number: 11923202Abstract: The present disclosure, in some embodiments, relates to an integrated circuit structure. The integrated circuit structure includes a substrate and a hard mask over the substrate. The hard mask has sidewalls that form a first opening and a second opening exposing an upper surface of the substrate. A block mask is arranged on the hard mask and is set back from the sidewalls of the hard mask. Spacers are disposed over the block mask and have sidewalls that define a spacer opening exposing an upper surface of the block mask. The block mask extends from directly below the spacers to laterally past the sidewalls of the spacers.Type: GrantFiled: July 27, 2022Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Ying Lee, Jyu-Horng Shieh
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Patent number: 11901180Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.Type: GrantFiled: February 14, 2022Date of Patent: February 13, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
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Patent number: 11854820Abstract: A method includes forming a first layer on a substrate; forming a first plurality of trenches in the first layer by a patterning process; and forming a second plurality of trenches in the first layer by another patterning process, resulting in combined trench patterns in the first layer. A first trench of the second plurality connects two trenches of the first plurality. The method further includes forming dielectric spacer features on sidewalls of the combined trench patterns. A space between two opposing sidewalls of the first trench is completely filled by the dielectric spacer features and another space between two opposing sidewalls of one of the two trenches is partially filled by the dielectric spacer features.Type: GrantFiled: May 22, 2020Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ru-Gun Liu, Cheng-Hsiung Tsai, Chung-Ju Lee, Chih-Ming Lai, Chia-Ying Lee, Jyu-Horng Shieh, Ken-Hsien Hsieh, Ming-Feng Shieh, Shau-Lin Shue, Shih-Ming Chang, Tien-I Bao, Tsai-Sheng Gau
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Patent number: 11840487Abstract: The disclosure provides seals for devices that operate at elevated temperatures and have reactive metal vapors, such as lithium, sodium or magnesium. In some examples, such devices include energy storage devices that may be used within an electrical power grid or as part of a standalone system. The energy storage devices may be charged from an electricity production source for later discharge, such as when there is a demand for electrical energy consumption.Type: GrantFiled: February 11, 2022Date of Patent: December 12, 2023Assignee: AMBRI, INC.Inventors: David J. Bradwell, Brian Neltner, Vimal Pujari, Michael J. McNeley, Greg A. Thompson, Chia-Ying Lee, David S. Deak, Hari P. Nayar
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Publication number: 20230237896Abstract: A system, method, and apparatus for implementing workflows across multiple differing systems and devices is provided herein. During operation, a workflow is automatically generated based upon a high probability of overloading resources with a current workflow. In particular, a workstation (or server) detects a high probability that a resource will be overloaded if a particular trigger is implemented. The workstation (or server) then determines an alternate trigger to reduce the chances that a resource will be overloaded. The alternate trigger and action can then be implemented or suggested as a newly-created workflow.Type: ApplicationFiled: January 26, 2022Publication date: July 27, 2023Inventors: KENNETH W. DOUROS, EWELINA SOBON, CHIA YING LEE, CHANTAL LEVERT
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Publication number: 20230122732Abstract: A security ecosystem, device and method for communicating with communication devices based on workflow interactions is provided. A device monitors execution of a safety workflow, the safety workflow comprising one or more triggers and one or more responsive actions. The device provides, at a display screen, an indication of the safety workflow and respective visual indications of: a physical sensor that generated sensor data of a trigger of the safety workflow; and a communication device associated with a responsive action to the trigger. The device detects, via an input device, an interaction with one or more of the respective visual indications to interact with one or more of the physical sensor and the communication device. Based on the interaction, the device one or more of: retrieves the sensor data; initiates communication with the communication device; and sends the sensor data to the communication device.Type: ApplicationFiled: October 19, 2021Publication date: April 20, 2023Inventors: Chantal LEVERT, Ewelina SOBON, Kenneth W. DOUROS, Chia Ying LEE
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Patent number: 11625859Abstract: A computer-implemented method of localizing an image of a person captured using a camera is provided, the person in the field of view of a camera, comprising: obtaining the image captured using a camera, the image comprising the person within a bounding box; determining at least one slant value associated with the person within the bounding box; determining head image coordinates and feet image coordinates for the person using the at least one slant value; and localizing the person by projecting the head image coordinates to a head plane and the feet image coordinates for the person to a ground plane.Type: GrantFiled: July 22, 2020Date of Patent: April 11, 2023Assignee: MOTOROLA SOLUTIONS, INC.Inventors: Chia Ying Lee, Yin Wang, Aleksey Lipchin
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Patent number: 11580661Abstract: A device, method and system for estimating elevation in images from camera devices is provided. The device detects humans at respective positions in images from a camera device, the camera device having a fixed orientation and fixed focal length. The device estimates, for the humans in the images, respective elevations of the humans, relative to the camera device, at the respective positions based at least on camera device parameters defining the fixed orientation and the fixed focal length. The device associates the respective elevations with the respective positions in the images. The device determines, using the respective elevations associated with the respective positions, a function that estimates elevation in an image from the camera device, using a respective image position coordinate as an input. The device provides the function to a video analytics engine to determine relative real-world positions in subsequent images from the camera device.Type: GrantFiled: November 23, 2020Date of Patent: February 14, 2023Assignee: MOTOROLA SOLUTIONS, INC.Inventor: Chia Ying Lee
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Patent number: 11521857Abstract: The present disclosure, in some embodiments, relates to a method of performing an etch process. The method is performed by forming a first plurality of openings defined by first sidewalls of a mask disposed over a substrate. A cut layer is between two of the first plurality of openings. A spacer is formed onto the first sidewalls of the mask and a second plurality of openings are formed. The second plurality of openings are defined by second sidewalls of the mask and are separated by the spacer. The substrate is etched according to the mask and the spacer.Type: GrantFiled: October 18, 2018Date of Patent: December 6, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuan-Wei Huang, Chia-Ying Lee, Ming-Chung Liang
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Publication number: 20220359222Abstract: The present disclosure, in some embodiments, relates to an integrated circuit structure. The integrated circuit structure includes a substrate and a hard mask over the substrate. The hard mask has sidewalls that form a first opening and a second opening exposing an upper surface of the substrate. A block mask is arranged on the hard mask and is set back from the sidewalls of the hard mask. Spacers are disposed over the block mask and have sidewalls that define a spacer opening exposing an upper surface of the block mask. The block mask extends from directly below the spacers to laterally past the sidewalls of the spacers.Type: ApplicationFiled: July 27, 2022Publication date: November 10, 2022Inventors: Chia-Ying Lee, Jyu-Horng Shieh
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Patent number: 11482426Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated circuit. The method includes forming a hard mask over a dielectric layer of a substrate. A blocking layer is formed on the hard mask and spacers are formed over the blocking layer. The spacers laterally straddle opposing edges of the blocking layer. The hard mask is etched according to the spacers and the blocking layer. The dielectric layer is etched according to the hard mask.Type: GrantFiled: January 20, 2021Date of Patent: October 25, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chia-Ying Lee, Jyu-Horng Shieh
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Patent number: D1002808Type: GrantFiled: November 10, 2020Date of Patent: October 24, 2023Assignee: KOHLER (CHINA) INVESTMENT CO., LTD.Inventors: Chia Ying Lee, Fei Ying Su, Ji Min Niu, Hui Ren
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Patent number: D1013387Type: GrantFiled: November 10, 2020Date of Patent: February 6, 2024Assignee: KOHER (CHINA) INVESTMENT CO. LTD.Inventors: Chia Ying Lee, Fei Ying Su, Ji Min Niu, Hui Ren