Patents by Inventor Chieh Chen
Chieh Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11964259Abstract: A catalyst composition for hydrogenating 4,4?-methylenedianiline derivatives is provided. The catalyst composition includes a carrier including aluminum oxide and magnesium oxide, a rhodium-ruthenium active layer loaded on the surface of the carrier, and a solvent including an organic amine. The weight percentage of magnesium oxide in the carrier is between 12% and 30%. A method for preparing 4,4?-methylene bis(cyclohexylamine) derivatives using the catalyst composition is also provided.Type: GrantFiled: December 28, 2020Date of Patent: April 23, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chao-Huang Chen, Jyun-Da Wu, Tzong-Shyan Lu, Ying-Chieh Lee
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Patent number: 11964050Abstract: The present invention relates to a pharmaceutical composition comprising a weak acid drug, with the use of a bicarbonate salt to achieve a high incorporation of the drug into the liposome and a better therapeutic efficacy. Also disclosed is a method for treating a respiratory disease using the pharmaceutical composition disclosed herein.Type: GrantFiled: July 23, 2018Date of Patent: April 23, 2024Assignee: PHARMOSA BIOPHARM INC.Inventors: Pei Kan, Yi Fong Lin, Ko Chieh Chen
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Patent number: 11964881Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.Type: GrantFiled: July 27, 2020Date of Patent: April 23, 2024Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITYInventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
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Publication number: 20240126327Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.Type: ApplicationFiled: October 14, 2022Publication date: April 18, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Chao Wei LIU, Wei-Hao CHANG, Yung-I YEH, Jen-Chieh KAO, Tun-Ching PI, Ming-Hung CHEN, Hui-Ping JIAN, Shang-Lin WU
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Publication number: 20240129766Abstract: A throttle control method for a mobile device include collecting input data, generating a first set of user experience indices according to the input data, and checking whether a user experience index of the first set of user experience indices satisfies a UEI threshold. The input data includes common information data, current configuration data and a plurality of throttle control parameters. Each user experience index of the first set of user experience indices is corresponding to at least one of throttle control parameter of the plurality of throttle control parameters.Type: ApplicationFiled: April 10, 2023Publication date: April 18, 2024Applicant: MediaTek Singapore Pte. Ltd.Inventors: Hung-Yueh Chen, Byeng Hyun Kim, JUNG SHUP SHIN, Shih-Hsin Chen, Chih-Chieh Lai, Chung-Pi Lee, JUNGWOO LEE, Yu-Lun Chang
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Publication number: 20240128420Abstract: A display panel including a circuit board, a plurality of bonding pads, a plurality of light emitting devices, and a plurality of solder patterns is provided. The bonding pads are disposed on the circuit board, and each includes a first metal layer and a second metal layer. The second metal layer is located between the first metal layer and the circuit board. The first metal layer includes an opening overlapping the second metal layer. A material of the first metal layer is different from a material of the second metal layer. The light emitting devices are electrically bonded to the bonding pads. Each of the solder patterns electrically connects one of the light emitting devices and one of the bonding pads. The solder patterns each contact the second metal layer through the opening of the first metal layer of one of the bonding pads to form a eutectic bonding.Type: ApplicationFiled: December 6, 2022Publication date: April 18, 2024Applicant: AUO CorporationInventors: Chia-Hui Pai, Tai-Tso Lin, Wen-Hsien Tseng, Wei-Chieh Chen, Kuan-Yi Lee, Chih-Chun Yang
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Patent number: 11962247Abstract: A resonant half-bridge flyback power converter includes: a first transistor and a second transistor which form a half-bridge circuit; a transformer and a resonant capacitor connected in series and coupled to the half-bridge circuit; and a switching control circuit configured to generate a first driving signal and a second driving signal to control the first transistor and the second transistor respectively for switching the transformer to generate an output voltage. The first driving signal is configured to magnetize the transformer. The second driving signal includes at most one pulse between two consecutive pulses of the first driving signal. The switching control circuit generates a skipping cycle period when an output power is lower than a predetermined threshold. A resonant pulse of the second driving signal is skipped during the skipping cycle period. The skipping cycle period is increased in response to the decrease of the output power.Type: GrantFiled: February 16, 2022Date of Patent: April 16, 2024Assignee: RICHTEK TECHNOLOGY CORPORATIONInventors: Ta-Yung Yang, Ying-Chieh Su, Yu-Chang Chen
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Patent number: 11961880Abstract: A semiconductor device includes first and second metal-insulator-metal structures. The first metal-insulator-metal structure includes a first bottom conductor plate, a first portion of a first dielectric layer, a first middle conductor plate, a first portion of a second dielectric layer, and a first top conductor plate stacked up one over another. The second metal-insulator-metal structure includes a second bottom conductor plate, a second portion of the first dielectric layer, a second middle conductor plate, a second portion of the second dielectric layer, and a second top conductor plate stacked up one over another. In a cross-sectional view, the first bottom conductor plate is wider than the first middle conductor plate that is wider than the first top conductor plate, and the second bottom conductor plate is narrower than the second middle conductor plate that is narrower than the first top conductor plate.Type: GrantFiled: August 9, 2021Date of Patent: April 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yuan-Yang Hsiao, Hsiang-Ku Shen, Tsung-Chieh Hsiao, Ying-Yao Lai, Dian-Hau Chen
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Publication number: 20240120257Abstract: An integrated circuit (IC) device includes a substrate. The IC device includes a multi-layer interconnect structure disposed over a first side of the substrate. The multi-layer interconnect structure includes a plurality of metal layers. The IC device includes a first portion of a through-substrate via (TSV) disposed over the first side of the substrate. The first portion of the TSV includes a plurality of conductive components belonging to the plurality of metal layers of the multi-layer interconnect structure. The IC device includes a second portion of the TSV that extends vertically through the substrate from the first side to a second side opposite the first side. The second portion of the TSV is electrically coupled to the first portion of the TSV.Type: ApplicationFiled: March 30, 2023Publication date: April 11, 2024Inventors: Tsung-Chieh Hsiao, Ke-Gang Wen, Liang-Wei Wang, Dian-Hau Chen
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Publication number: 20240118583Abstract: A display apparatus including a display panel, a camera module, and a diffraction suppression device is provided. The display panel is provided with multiple signal lines and multiple display pixels. The signal lines and the display pixels are alternately arranged along at least one direction. The camera module has a light receiving surface facing the display panel. The light receiving surface is overlapped with the display panel. The diffraction suppression device is disposed between the display panel and the camera module, and has multiple first light-transmitting regions and multiple second light-transmitting regions alternately arranged along the at least one direction. The first light-transmitting regions are respectively overlapped with the display pixels. The second light-transmitting regions are respectively overlapped with the signal lines.Type: ApplicationFiled: April 19, 2023Publication date: April 11, 2024Applicant: Acer IncorporatedInventors: Jui-Chieh Hsiang, Chih-Chiang Chen
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Publication number: 20240119283Abstract: A method of performing automatic tuning on a deep learning model includes: utilizing an instruction-based learned cost model to estimate a first type of operational performance metrics based on a tuned configuration of layer fusion and tensor tiling; utilizing statistical data gathered during a compilation process of the deep learning model to determine a second type of operational performance metrics based on the tuned configuration of layer fusion and tensor tiling; performing an auto-tuning process to obtain a plurality of optimal configurations based on the first type of operational performance metrics and the second type of operational performance metrics; and configure the deep learning model according to one of the plurality of optimal configurations.Type: ApplicationFiled: October 6, 2023Publication date: April 11, 2024Applicant: MEDIATEK INC.Inventors: Jui-Yang Hsu, Cheng-Sheng Chan, Jen-Chieh Tsai, Huai-Ting Li, Bo-Yu Kuo, Yen-Hao Chen, Kai-Ling Huang, Ping-Yuan Tseng, Tao Tu, Sheng-Je Hung
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Publication number: 20240120391Abstract: Embodiments of the present disclosure provide semiconductor device structures and methods of forming the same. The structure includes a first source/drain region disposed under a well portion, a second source/drain region disposed adjacent the first source/drain region, a dielectric material disposed between the first and second source/drain regions, and a conductive contact having a first portion disposed under the first source/drain region and a second portion disposed adjacent the first source/drain region. The second portion is disposed in the dielectric material. The structure further includes a conductive feature disposed in the dielectric material, and the conductive feature is electrically connected to the conductive contact. The conductive feature has a top surface that is substantially coplanar with a top surface of the well portion.Type: ApplicationFiled: January 19, 2023Publication date: April 11, 2024Inventors: Chun-Yuan CHEN, Huan-Chieh SU, Chih-Hao WANG
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Publication number: 20240121547Abstract: A venting device includes a first flap, which is configured to be actuated to swing upward during a rising time, and a second flap, which is disposed opposite to the first flap and configured to be actuated to swing downward during a falling time, a first actuating portion disposed on the first flap, and a second actuating portion disposed on the second flap. The venting device configured to form a vent is disposed within a wearable sound device or to be disposed within the wearable sound device. The vent is formed via applying a first voltage to the first actuating portion and applying a second voltage on the second actuating portion, such that the venting device gradually forms the vent.Type: ApplicationFiled: December 6, 2023Publication date: April 11, 2024Applicant: xMEMS Labs, Inc.Inventors: Wen-Chien Chen, Kai-Chieh Chang, Chiung C. Lo, Yuan-Shuang Liu
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Publication number: 20240116707Abstract: A powered industrial truck includes a lateral movement assembly including four sliding members and four pivotal members both on a wheeled carriage, four links having a first end pivotably secured to the sliding member and a second end pivotably secured to either end of the pivotal member, a motor shaft having two ends pivotably secured to the pivotal members respectively, a first electric motor on one frame member, and four mounts attached to the sliding members respectively; two lift assemblies including a second electric motor, a shaft having two ends rotatably secured to the sliding members respectively, two gear trains at the ends of the shaft respectively, a first gear connected to the second electric motor, a second gear on the shaft, and a first roller chain on the first and second gears; two electric attachments on the platform and being laterally moveable, each attachment. The mount has rollers.Type: ApplicationFiled: September 21, 2023Publication date: April 11, 2024Inventors: Jung-Chieh Chang, Yi-Sheng Chen, Jen-Yung Hsiao, Chia-Fu Hsiao, Wei-Qi Lao, Chen-Chih Chan, Chung-Yu Liu
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Publication number: 20240119256Abstract: The present disclosure provides directed to new, more efficient neural network architectures. As one example, in some implementations, the neural network architectures of the present disclosure can include a linear bottleneck layer positioned structurally prior to and/or after one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. As another example, in some implementations, the neural network architectures of the present disclosure can include one or more inverted residual blocks where the input and output of the inverted residual block are thin bottleneck layers, while an intermediate layer is an expanded representation. For example, the expanded representation can include one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. A residual shortcut connection can exist between the thin bottleneck layers that play a role of an input and output of the inverted residual block.Type: ApplicationFiled: October 13, 2023Publication date: April 11, 2024Inventors: Andrew Gerald Howard, Mark Sandler, Liang-Chieh Chen, Andrey Zhmoginov, Menglong Zhu
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Patent number: 11956534Abstract: An image conversion device includes: a lens module configured to allow passing of image light beams of an object, an optical waveguide element configured to transmit the image light beams to a light processing component, and an image sensor configured to convert the image light beams into digital image signals. By changing image capturing and image forming methods, higher image quality may be achieved and expanding flexibility may be maintained.Type: GrantFiled: October 21, 2021Date of Patent: April 9, 2024Assignee: QuantumZ Inc.Inventors: Chun-Chieh Chen, Ming-Che Hsieh, Po-Ting Chen
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Patent number: 11955515Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.Type: GrantFiled: July 28, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
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Patent number: 11953400Abstract: A pressure sensing unit is provided. The pressure sensing unit includes a membrane and a pressure sensing pad group. The membrane has a first surface and a second surface. The pressure sensing pad group includes a first pressure sensing pad, a second pressure sensing pad, and a ground pad that are spaced apart from one another. The ground pad and one among the first pressure sensing pad and the second pressure sensing pad are located at the first surface of the membrane, another one among the first pressure sensing pad and the second pressure sensing pad is located at the second surface of the membrane, and an orthographic projection of the ground pad projected onto a reference plane is located between orthographic projections of the first pressure sensing pad and the second pressure sensing pad that are projected onto the reference plane. Therefore, a signal-to-noise ratio can be increased and an erroneous detection can be prevented.Type: GrantFiled: May 2, 2023Date of Patent: April 9, 2024Assignee: PIXART IMAGING INC.Inventors: Che-Chia Hsu, Yu-Han Chen, Chi-Chieh Liao
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Patent number: 11955312Abstract: A physical analysis method, a sample for physical analysis and a preparing method thereof are provided. The preparing method of the sample for physical analysis includes: providing a sample to be inspected; and forming a contrast enhancement layer on a surface of the sample to be inspected. The contrast enhancement layer includes a plurality of first material layers and a plurality of second material layers stacked upon one another. The first material layer and the second material layer are made of different materials. Each one of the first and second material layers has a thickness that does not exceed 0.1 nm. In an image captured by an electron microscope, a difference between an average grayscale value of a surface layer image of the sample to be inspected and an average grayscale value of an image of the contrast enhancement layer is at least 50.Type: GrantFiled: December 23, 2021Date of Patent: April 9, 2024Assignee: MATERIALS ANALYSIS TECHNOLOGY INC.Inventors: Chien-Wei Wu, Keng-Chieh Chu, Yung-Sheng Fang, Chun-Wei Wu, Hung-Jen Chen
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Patent number: 11956927Abstract: A case is provided, including a shell, a fan frame, and a fan module. The shell is internally provided with a backplane and a motherboard, where the motherboard is connected to the backplane along a first axis, the backplane is connected with a plug connector, the plug connector includes a plug connector body and a plurality of connection terminals, and the connection terminals are located in the plug connector body. The fan frame bears the fan module, and the fan module includes a fan assembly and a matching connector. The matching connector is connected to the fan assembly, and the matching connector is connected to the plug connector along a second axis. The matching connector includes a matching connector body and a plurality of matching terminals, and the matching terminals are located in the matching connector body. The fan frame is fixed in the shell.Type: GrantFiled: April 8, 2021Date of Patent: April 9, 2024Assignee: WISTRON CORPORATIONInventors: Jen-Hsien Lo, Wei-Hao Chen, Sheng-Chieh Tsai