Abstract: A cold plate is provided and includes: a housing disposed with a chamber; a base combined with the housing to form a working space separated from the chamber but connected with the chamber through an interconnecting structure to allow a working medium to flow within the chamber and the working space; a heat transfer structure disposed on the inner side of the base; and a pump disposed within the working space to drive the working medium in the working space. As such, the cold plate can provide better heat dissipation performance.

Abstract: A signal calibration method, a memory storage device, and a memory control circuit unit are provided. The signal calibration method includes: generating a clock signal and a data strobe signal according to an internal clock signal; respectively transmitting the clock signal and the data strobe signal to a target volatile memory module among multiple volatile memory modules through a first signal path and a second signal path; obtaining a shift value between the data strobe signal and the clock signal at the target volatile memory module; and storing an initial delay setting of the data strobe signal according to delay information of the data strobe signal in response to the shift value being greater than a threshold value.

Abstract: Embodiments described herein relate to flat optical devices with a coating layer including monolayers selected from the group consisting of molybdenum disulfide (MoS2), tungsten disulfide (WS2), tungsten diselenide (WSe2), molybdenum diselenide (MoSe2), molybdenum ditelluride (MoTe2), titanium disulfide (TlS2), zirconium disulfide (ZrS2), zirconium diselenide (ZrSe2), hafnium disulfide (HfS2), platinum disulfide (PtS2), tin disulfide (SnS2), or combinations thereof. The coating layer is disposed over a plurality of optical device structures of the optical device. The monolayers may alternate between the materials to form the coating layer or may be a uniform coating layer of a single material. The coating layer is disposed over each optical device structure of the plurality of optical device structures.

Abstract: A method of moving a susceptor in a processing system, suitable for use in semiconductor processing, is provided. The method includes: moving a first susceptor from an interior volume of a first enclosure to an interior volume of a process chamber during a first time period; and positioning, during a second time period, a first substrate on the first susceptor when the first susceptor is in the process chamber, wherein the interior volume of the first enclosure and interior volume of the process chamber are maintained at a non-atmospheric pressure from the beginning of the first time period until the end of the second time period.

Abstract: A test strip detecting system includes a test strip, a test strip detecting carrier and a mobile communication apparatus. The test strip detecting carrier includes a container structure, positioning markers and colorimetric calibrating blocks, and the colorimetric calibrating blocks are embedded inside the positioning markers. The test strip is placed in the container structure and reacts with a specimen to generate color blocks. The mobile communication apparatus controls an image capture unit to capture an original image of the test strip placed in the test strip detecting carrier; detects the positioning markers in the original image to obtain a plurality of coordinates of the positioning markers; performs image coordinate calibration according to the plurality of coordinates to generate a calibrated image; and performs a colorimetric calibration for the color blocks and the colorimetric calibrating blocks according to the calibrated image so as to generate a test result.

Abstract: An isolated and purified lactic acid bacteria is provided, which is Lactobacillus paracasei PS23 (PS23) and its applications in delaying aging process, improving immunomodulatory activity, reducing, preventing or treating allergic and inflammation, preventing or treating a chronic disorder and/or (vi) preventing and/or treating a mood disorder or a neurological condition.

Abstract: A cell includes a membrane and an actuating layer. The membrane includes a first membrane subpart and a second membrane subpart, wherein the first membrane subpart and the second membrane subpart are opposite to each other. The actuating layer is disposed on the first membrane subpart and the second membrane subpart. The first membrane subpart includes a first anchored edge which is fully or partially anchored, and edges of the first membrane subpart other than the first anchored edge are non-anchored. The second membrane subpart includes a second anchored edge which is fully or partially anchored, and edges of the second membrane subpart other than the second anchored edge are non-anchored.

Abstract: The present disclosure provides a semiconductor structure, including a substrate having a front surface, a first semiconductor layer proximal to the front surface, a second semiconductor layer over the first semiconductor layer, a gate having a portion between the first semiconductor layer and the second semiconductor layer, a spacer between the first semiconductor layer and the second semiconductor layer, contacting the gate, and a source/drain (S/D) region, wherein the S/D region is in direct contact with a bottom surface of the second semiconductor layer, and the spacer has an upper surface interfacing with the second semiconductor layer, the upper surface including a first section proximal to the S/D region, a second section proximal to the gate, and a third section between the first section and the second section.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first source/drain epitaxial feature, a second source/drain epitaxial feature disposed adjacent the first source/drain epitaxial feature, a first dielectric layer disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature, a first dielectric spacer disposed under the first dielectric layer, and a second dielectric layer disposed under the first dielectric layer and in contact with the first dielectric spacer. The second dielectric layer and the first dielectric spacer include different materials.

Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.

Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first micro-light-emitting diodes on a first temporary substrate; and replacing at least one defective micro-light-emitting diode of the first micro-light-emitting diodes with at least one second micro-light-emitting diode. The first micro-light-emitting diodes and at least one second micro-light-emitting diode are distributed on the first temporary substrate. The first micro-light-emitting diodes and at least one second micro-light-emitting diode have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first micro-light-emitting diodes and at least one second micro-light-emitting diode. A semiconductor structure and a display panel are also provided.

Abstract: Semiconductor structures and the manufacturing method thereof are disclosed. An exemplary semiconductor structure according to the present disclosure includes a substrate having a p-type well or an n-type well, a first base portion over the p-type well, a second base portion over the n-type well, a first plurality of channel members over the first base portion, a second plurality of channel members over the second base portion, an isolation feature disposed between the first base portion and the second base portion, and a deep isolation structure in the substrate disposed below the isolation feature.

Abstract: In some examples, an apparatus can include a housing, a tilt structure connected to the housing, a swivel structure connected to the tilt structure, and a rail structure connected to the swivel structure, where the rail structure comprises a sliding mechanism to interface with a track such that the housing is translatable along the track.

Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.

Abstract: An example device includes a display component that is configured to operate at a first refresh rate or a second refresh rate. The device also includes one or more processors operable to perform operations. The operations include identifying a rate change triggering event while the display component is operating at the first refresh rate. The operations further include determining a current brightness value of the display component. The operations also include determining, based on an environmental state measurement associated with an environment around the device, a threshold brightness value. The operations additionally include transitioning the display component from the first refresh rate to the second refresh rate m response to identifying the rate change triggering event if the current brightness value of the display component meets or exceeds the threshold brightness value.

Abstract: The present invention extends to methods, systems, and computer program products for integrating healthcare screening with other identity-based functions. In general, components facilitating healthcare screening interoperate with and/or are integrated into other systems, including facility access, identity, time keeping, payroll, etc. Aspects of the invention include using facial recognition to improve healthcare screening and satisfy governmental regulations. A thermal scanner can include a camera and an InfraRed (IR) camera. The thermal scanner can collect a facial image and derive a temperature for a person (e.g., from an IR image). The thermal scanner can also collect or access previously collected healthcare screening questionnaire answers. The collected temperate and healthcare screening questionnaire answers can be used to control access to the facility.

Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.

Abstract: Various embodiments of the present disclosure are directed towards a camera module comprising flat lenses. Flat lenses have reduced thicknesses compared to other types of lenses, whereby the camera module may have a small size and camera bumps may be omitted or reduced in size on cell phones and the like incorporating the camera module. The flat lenses are configured to focus visible light into a beam of white light, split the beam into sub-beams of red, green, and blue light, and guide the sub-beams respectively to separate image sensors for red, green, and blue light. The image sensors generate images for corresponding colors and the images are combined into a full-color image. Optically splitting the beam into the sub-beams and using separate image sensors for the sub-beams allows color filters to be omitted and smaller pixel sensors. This, in turn, allows higher quality imaging.

Abstract: A semiconductor structure includes a dielectric layer over a substrate, a via conductor over the substrate and in the dielectric layer, and a first graphene layer disposed over the via conductor. In some embodiments, a top surface of the via conductor and a top surface of the dielectric layer are level. In some embodiments, the first graphene layer overlaps the via conductor from a top view. In some embodiments, the semiconductor structure further includes a second graphene layer under the via conductor and a third graphene layer between the dielectric layer and the via conductor. In some embodiments, the second graphene layer is between the substrate and the via conductor.

Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.