Abstract: Embodiments of mechanisms for forming a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a substrate and a MEMS substrate disposed on the substrate. The MEMS substrate includes a movable element, a fixed element and at least a spring connected to the movable element and the fixed element. The MEMS device also includes a polysilicon layer on the movable element.

Abstract: Embodiments of mechanisms for forming a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a substrate and a MEMS substrate disposed on the substrate. The MEMS substrate includes a movable element, a fixed element and at least a spring connected to the movable element and the fixed element. The MEMS device also includes a polysilicon layer on the movable element.

Abstract: A method of forming a semiconductor device is disclosed. A gate structure is formed on a substrate. The gate structure includes a dummy gate and a spacer at a sidewall of the dummy gate. A dielectric layer is formed on the substrate outside of the gate structure. A metal hard mask layer is formed to cover tops of the dielectric layer and the spacer and to expose a surface of the gate structure. The dummy gate is removed to form a gate trench. A low-resistivity metal layer is formed on the metal hard mask layer filling in the gate trench. The low-resistivity metal layer outside of the gate trench is removed. The metal hard mask layer is removed.

Abstract: A method for manufacturing TSVs, wherein the method comprises several steps as follows: A stack structure having a substrate and an ILD layer (inter layer dielectric layer) is provided, in which an opening penetrating through the ILD layer and further extending into the substrate is formed. After an insulator layer and a metal barrier layer are formed on the stack structure and the sidewalls of the opening, a top metal layer is then formed on the stack structure to fulfill the opening. A first planarization process stopping on the barrier layer is conducted to remove a portion of the top metal layer. A second planarization process stopping on the ILD layer is subsequently conducted to remove a portion of the metal barrier layer, a portion of the insulator layer and a portion of the top metal layer, wherein the second planarization process has a polishing endpoint determined by a light interferometry or a motor current.

Abstract: A planarization method of manufacturing a semiconductor component is provided. A dielectric layer is formed above a substrate and defines a trench therein. A barrier layer and a metal layer are formed in sequence in the trench. A first planarization process is applied to the metal layer by using a first reactant so that a portion of the metal layer is removed. An etching rate of the first reactant to the metal layer is greater than that of the first reactant to the barrier layer. A second planarization process is applied to the barrier layer and the metal layer by using a second reactant so that a portion of the barrier layer and the metal layer are removed to expose the dielectric layer. An etching rate of the second reactant to the barrier layer is greater than that of the second reactant to the metal layer.

Abstract: A coaxial tube holder is provided, which essentially has a holder major body having an aperture for tightening and holding fork tube of bicycle. The holder major body has an abutment segment provided on the bottom side thereof, which is abutted against bearing seat body of head tube. An ornamental cover is inserted outside the holder major body. Then the assembly can be finished very easily and securely between the head tube and the fork tube by the holder major body. Further, the ornamental cover can be made in different color or to be transparent, or to have decorative body having pattern, veins or characters images thereon, so that the overall design can be more novel and dazzling to attract more consumer groups to purchase. Hence, benefit of enhancing competitiveness of industry can be achieved.

Abstract: A waist-training machine has a base, a track frame, an adjusting frame and a sliding kneeler. The base has a front hinge mount and a rear hinge mount. The track frame is curved, is connected to the base and has a connecting block, a rear pivot mount, two track bars, a handle frame and a front pivot mount. The adjusting frame is connected to the base and the track frame and has a lower telescopic pipe, an upper telescopic pipe and a rotating button. The lower telescopic pipe is aslant connected to the front hinge mount and has an inserting chamber and a button hole. The upper telescopic pipe is slidably connected to the lower telescopic pipe and has multiple inserting holes. The sliding kneeler is slidably mounted on the track frame and has a pin mount and an inserting pin.

Abstract: A method for manufacturing TSVs, wherein the method comprises several steps as follows: A stack structure having a substrate and an ILD layer (inter layer dielectric layer) is provided, in which an opening penetrating through the ILD layer and further extending into the substrate is formed. After an insulator layer and a metal barrier layer are formed on the stack structure and the sidewalls of the opening, a top metal layer is then formed on the stack structure to fulfill the opening. A first planarization process stopping on the barrier layer is conducted to remove a portion of the top metal layer. A second planarization process stopping on the ILD layer is subsequently conducted to remove a portion of the metal barrier layer, a portion of the insulator layer and a portion of the top metal layer, wherein the second planarization process has a polishing endpoint determined by a light interferometry or a motor current.

Abstract: A bar end plug structure of handle grip has an assembly aperture formed on its plug main body. A gap is provided on one side of the plug main body and a fastening unit is provided on the lateral of the gap. The structure further has a plug cap and a flexible washer. The flexible washer has a housing aperture to be engaged by an annular block of the plug cap. The flexible washer is invaginated into one side of the assembly aperture of the plug main body, while a grip is inserted in the other side of the same. Thus, the flexible washer is used as a cushion among the plug main body, the plug cap and the grip to compensate relative tolerance occurred among them during manufacturing, so as to firmly assemble them together, furthermore, to maintain their respective structure in good integrity without damage happened.

Abstract: A coaxial tube holder is provided, which essentially has a holder major body having an aperture for tightening and holding fork tube of bicycle. The holder major body has an abutment segment provided on the bottom side thereof, which is abutted against bearing seat body of head tube. An ornamental cover is inserted outside the holder major body. Then the assembly can be finished very easily and securely between the head tube and the fork tube by the holder major body. Further, the ornamental cover can be made in different color or to be transparent, or to have decorative body having pattern, veins or characters images thereon, so that the overall design can be more novel and dazzling to attract more consumer groups to purchase. Hence, benefit of enhancing competitiveness of industry can be achieved.

Abstract: A planarization method of manufacturing a semiconductor component is provided. A dielectric layer is formed above a substrate and defines a trench therein. A barrier layer and a metal layer are formed in sequence in the trench. A first planarization process is applied to the metal layer by using a first reactant so that a portion of the metal layer is removed. An etching rate of the first reactant to the metal layer is greater than that of the first reactant to the barrier layer. A second planarization process is applied to the barrier layer and the metal layer by using a second reactant so that a portion of the barrier layer and the metal layer are removed to expose the dielectric layer. An etching rate of the second reactant to the barrier layer is greater than that of the second reactant to the metal layer.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: An exercise apparatus includes an exercise machine and a media device. The exercise machine includes an exercise device and a controller. The exercise device generates an electrical output through an exercise mechanism that drives operation of a power generating unit. The controller includes a status data generating unit for receiving the electrical output and generating exercise status data based on the electrical output, a control unit storing user-configured data and the exercise status data, and a resistance controlling unit controlled by the control unit for causing the exercise status data to conform with the user-configured data. The control unit and the media device are configured to operate according to a personal computer compatible protocol. The user-configured data is established and configured through the media device. The exercise status data is stored in or displayed by the media device.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: A bottom-gate thin film transistor includes a gate electrode, a gate insulating layer and a microcrystalline silicon layer. The gate electrode is disposed on a substrate. The gate insulating layer is made up of silicon nitride and disposed on the gate electrode and the substrate. The microcrystalline silicon layer is disposed on the gate insulating layer and corresponds to the gate electrode, in which a contact interface between the gate insulating layer and the microcrystalline silicon layer has a plurality of oxygen atoms, and concentration of the oxygen atoms ranges between 1020 atoms/cm3 and 1025 atoms/cm3. A method of fabricating a bottom-gate thin film transistor is also disclosed herein.

Abstract: An exercise device capable of generating electricity includes a generator unit, a power conversion unit, a controller unit, a power resistor unit, a human machine interface (HMI) unit and an energy conversion unit. The power conversion unit is electrically connected to the generator unit for receiving an AC power source outputted by the generator and converting it into a plurality of DC power sources. With stepping on the exercise device by external manpower to drive the generator unit to operate, the energy conversion unit is used to store the energy. Further, in the beginning of the operation of the exercise device, the energy conversion unit provides the HMI unit with necessary electricity. After the exercise device achieves a certain rotating speed, the power conversion unit is switched to provide the HMI unit with necessary electricity. With the above arrangement, the exercise device can be driven by an external force to generate electricity.

Abstract: A three-dimensional interconnect interposer adapted for use in system in package (SIP) includes a wafer, at least an embedded passive device and at least an interconnect pattern disposed on the front surface of the wafer, a plurality of cavities exposing the inner contact pads of the interconnect pattern formed on the back surface of the wafer, and a back connect pattern disposed on the back surface of the wafer electrically connected to the interconnect pattern and the embedded passive device through the inner contact pads.

Abstract: A method of protecting front surface structure of a wafer and method of wafer dividing is provided. Initially, a wafer having a plurality of device disposed on a front surface thereof is provided. A protective layer is formed on the front surface of the wafer and a first bonding layer is provided to bond the wafer to a carrier. Subsequently, a wafer dividing process is performed to form a plurality of dies. After that, the first bonding layer and the protective layer are removed to separate the dies individually.

Abstract: A method for wafer-level package. A cap wafer having cavities is bonded to a support wafer, and a portion of the cap wafer is etched through. The cap wafer is released from the support wafer, and bonded to a transparent wafer, and a portion of the cap wafer corresponding to the cavities is removed so that the remaining cap wafer forms a plurality of support blocks. A device wafer is provided, and the support blocks are bonded to the device wafer so that the support blocks and the transparent wafer hermitically seal the devices disposed in the device wafer.