Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.

Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.

Abstract: A di(2-ethylhexyl) terephthalate composition is provided. The di(2-ethylhexyl) terephthalate composition comprises di(2-ethylhexyl)terephthalate, at least one of a first component, a second component and a third component, and a fourth component When the di(2-ethylhexyl) terephthalate composition is characterized by gas chromatography (GC), the first component is eluted at a retention time ranging from 4.8 minutes to 6.0 minutes, the second component is eluted at a retention time ranging from 9.0 minutes to 10.0 minutes, the third component is eluted at a retention time ranging from 10.1 minutes to 12.0 minutes, and the fourth component is eluted at a retention time ranging from 21.0 minutes to 22.1 minutes. The ratio of the total area of the chromatographic peaks indicating the first component, second component, and third component to the area of the chromatographic peaks indicating the fourth component is 0.135 to 1.720.

Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.

Abstract: A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.

Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.

Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.

Abstract: A semiconductor device includes a substrate, first and second stacks of semiconductor nanosheets, a gate structure, first and second strained layers and first and second dielectric walls. The substrate includes first and second fins. The first and second stacks of semiconductor nanosheets are disposed on the first and second fins respectively. The gate structure wraps the first and second stacks of semiconductor nanosheets. The first and second strained layers are respectively disposed on the first and second fins and abutting the first and second stacks of semiconductor nanosheets. The first dielectric wall is disposed on the substrate and located between the first and second strained layers. The second dielectric wall is disposed on the first dielectric wall and located between the first and second strained layers. A top surface of the second dielectric wall is lower than top surfaces of the first and second strained layers.

Abstract: Disclosed is a memory cell including a first transistor having a first terminal coupled to a bit line; a second transistor having a first terminal coupled to a bit line bar; a weight storage circuit coupled between a gate terminal of the first transistor and a gate terminal of the second transistor, storing a weight value, and determining to turn on the first transistor or the second transistor according to the weight value; and a driving circuit coupled to a second terminal of the first transistor, a second terminal of the second transistor, and at least one word line, receiving at least one threshold voltage and at least one input data from the word line, and determining whether to generate an operation current on a path of the turned-on first transistor or the turned-on second transistor according to the threshold voltage and the input data.

Abstract: A foldable electronic device includes a first body having an end and a first inclined surface, a second body having a second inclined surface, and a hinge module. The end includes an accommodating area. A virtual shaft line exists between sides of the first inclined surface and the second inclined surface that are closest to each other. The second body rotates relative to the first body through the virtual shaft line. The hinge module includes a first bracket adjacent to the first inclined surface, connected to the first body, and located in the accommodating area, a second bracket adjacent to the second inclined surface and connected to the second body, and a third bracket including a first end and a second end. The first bracket is connected to the first end through a first torsion assembly. The second bracket is connected to the second end through a second torsion assembly.

Abstract: Various embodiments of a battery charging apparatus are disclosed, along with methods of charging and rejuvenating a battery using the apparatus. The apparatus may include a positive electrode and a negative electrode which are configured to connect to a battery, and a charging current generator generating a charging current that charges the battery for a period of time via the positive and and negative electrodes by adding electric charge to the battery. The charging current is generated based on parameters of the battery, including a charging constant and an initial charging state. In some embodiments, a natural logarithm of a ratio of the added electric charge to the initial charging state substantially equals to a product of the charging constant and a length of the period of time and negative one.

Abstract: A food heating device includes a placement unit and a heating unit. The placement unit includes a housing and a placement board, wherein the placement board is disposed in the housing and is for placing a food item. The heating unit includes a water injection element and a microwave element, wherein the water injection element connects to the housing and is communication with an internal space of the housing, and the microwave element connects to the housing. The microwave element is for heating by microwave the water injected into the internal space of the housing through the water injection element and producing steam therefrom.

Abstract: A fastener stringer used for a slide fastener, including: a pair of fastener tapes including a stretchable yarn; a pair of fastener element rows mounted on opposite side edge portions of the pair of fastener tapes, respectively; and a reflective film disposed on a front or back surface of one of the fastener tapes. The reflective film has stretchability.

Abstract: A semiconductor structure includes a substrate, a channel layer, a barrier layer, a source structure, a drain structure, a doped compound semiconductor layer, a dielectric layer, and a gate structure. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The source structure and the drain structure are disposed on opposite sides of the barrier layer. The doped compound semiconductor layer is disposed on the barrier layer. The doped compound semiconductor layer has a first side adjacent to the source structure and a second side adjacent to the drain structure. The doped compound semiconductor layer has at least one opening exposing at least a portion of the barrier layer. The dielectric layer is disposed on the doped compound semiconductor layer and the barrier layer. The gate structure is disposed on the doped compound semiconductor layer.

Abstract: A coil module includes a first coil set; a second coil set, including a first coil body, a second coil body and an insulative separator disposed between the first coil body and the second coil body, the separator having an adopting hole, the first coil body having an open winding surrounding the adapting hole and fixed on a side of the separator, the second coil body having an open winding surrounding the adapting hole and fixed on another side of the separator; and a coil base sheathing the second coil set with exposing the adopting hole. The first coil set surrounds the adopting hole and is fixed on the coil base to form a coil module.

Abstract: The present invention provides an audio output device. The audio output device includes a speaker unit, a first plate and a second plate. The speaker unit has a sound-emitting surface, and the sound-emitting surface has a first side and a second side opposite to each other. A first side edge of the first plate corresponds to the first side and is rotatably connected. A second side of the second plate corresponds to the second side and is rotatably connected, and a sound channel corresponding to the speaker unit is formed between the first plate and the second plate, and a sound outlet is formed at an end of the sound channel farthest away from the speaker unit, and a direction pointed by a connection line between a center point of the sound-emitting surface and a center point of the sound outlet is adjustable.

Abstract: A semiconductor device includes a substrate, a gate dielectric layer, a gate electrode, a field plate, a source electrode and a drain electrode. The gate dielectric layer is disposed on the substrate and includes a first portion having a first thickness, a second portion having a second thickness, and a third portion having a third thickness. The first, second and third thicknesses are different from each other, and the first thickness is smaller than the second and third thicknesses. The gate electrode is disposed on the first portion of the gate dielectric layer. The field plate is separated from and electrically coupled to the gate electrode, and is disposed on the second and third portions of the gate dielectric layer. The source and drain electrodes are disposed on the sides of the gate electrode and the field plate, respectively.