Patents by Inventor Chih-Hung Lin

Chih-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210051992
    Abstract: Provided herein are a food mold for use in food processing and a method for food processing using the food mold. The food mold includes a bottom portion, a sidewall and a protruding structure. The bottom portion includes a peripheral edge and a bottom surface. The peripheral edge surrounds the bottom surface. The sidewall includes a lower edge and an upper edge opposite to the lower edge. The sidewall surrounds the bottom portion. The lower edge is connected to the peripheral edge. The protruding structure is disposed on the bottom surface.
    Type: Application
    Filed: August 19, 2020
    Publication date: February 25, 2021
    Applicant: YO-KAI EXPRESS INC.
    Inventor: Chih Hung LIN
  • Publication number: 20210052101
    Abstract: A food heating device and a food heating method are provided. The food heating device includes a placement device and a heating device. The placement device includes a casing and a placement board. The placement board is disposed in the casing and is configured to place a food item. The heating device includes a steam portion, a hot water portion and an injection member. The steam portion and the hot water portion are in communication with the injection member, the injection member passes through the casing and is movably provided corresponding to the placement board, and the steam portion and the hot water portion are configured to inject steam and hot water into the food item on the placement board through the injection member so as to heat the food item.
    Type: Application
    Filed: August 19, 2020
    Publication date: February 25, 2021
    Applicant: YO-KAI EXPRESS INC.
    Inventor: Chih Hung LIN
  • Publication number: 20210037930
    Abstract: A fastener stringer used for a slide fastener, including: a pair of fastener tapes including a stretchable yarn; a pair of fastener element rows mounted on opposite side edge portions of the pair of fastener tapes, respectively; and a reflective film disposed on a front or back surface of one of the fastener tapes. The reflective film has stretchability.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 11, 2021
    Inventor: Chih Hung Lin
  • Publication number: 20210027568
    Abstract: A food vending machine and a food vending method are provided. The food vending machine includes a storage device, a movement device, a delivery device and a heating device. The storage device is configured to store at least one food item. The movement device is provided corresponding to the storage device, and is configured to fetch the at least one food item from the storage device and move the at least one food item. The delivery device is provided corresponding to the movement device, and includes at least one delivery portion. The at least one delivery portion includes a placement board. The movement device is configured to move and place the at least one food item on the placement board. The heating device includes a steam portion, a hot water portion and at least one injection member.
    Type: Application
    Filed: July 22, 2020
    Publication date: January 28, 2021
    Applicant: YO-KAI EXPRESS INC.
    Inventor: Chih Hung LIN
  • Patent number: 10846114
    Abstract: A virtual time control apparatus, method, and non-transitory computer readable storage medium thereof are provided. The virtual time control apparatus includes a system timer, a real time clock, and a processing unit, wherein the processing unit is electrically connected to the system timer and the real time clock. The system timer has an original timer period, while the real time clock has an original tick period. The processing unit executes a hypervisor. The hypervisor generates a virtual timer period according to an adjustment ratio and the original timer period. The hypervisor generates a virtual tick period according to the adjustment ratio and the original tick period.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: November 24, 2020
    Assignee: Institute For Information Industry
    Inventors: Sheng-Hao Wang, Jian-De Jiang, Chin-Wei Tien, Chih-Hung Lin
  • Patent number: 10750262
    Abstract: A display device includes a casing, a display module and a woofer. The casing includes a back cover. A top side of the back cover has a plurality of sound holes formed thereon. A wall structure extends from an inner surface of the back cover. An opening of the back cover communicates with the sound holes. The display module is disposed in the casing. The woofer is disposed in the casing and located between the display module and the back cover. The wall structure encloses the woofer to guide a sound outputted by the woofer to the sound holes through the opening.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: August 18, 2020
    Assignee: Qisda Corporation
    Inventors: Chih-Hung Lin, Hsun-Cheng Cho, Long-Sing Jhong
  • Publication number: 20200228892
    Abstract: A passive radiator includes a frame, a vibrating member, a surround and a plurality of strengthening ribs. The vibrating member is disposed in the frame. The surround includes a first arc portion and a second arc portion. The first arc portion is connected to the frame. The second arc portion is connected to the vibrating member. The first arc portion and the second arc portion are connected to form an S shape. The strengthening ribs are connected to the first arc portion and the second arc portion. A thickness of the strengthening rib corresponding to the first arc portion is larger than a thickness of the strengthening rib corresponding to the second arc portion. Furthermore, the passive radiator may include a plurality of reinforcing ribs connected to the first arc portion. Moreover, a thickness of the first arc portion may be larger than a thickness of the second arc portion.
    Type: Application
    Filed: May 15, 2019
    Publication date: July 16, 2020
    Inventors: Kai-Jung Chang, Chih-Hung Lin
  • Patent number: 10658228
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an oxide layer disposed over the substrate, and a first epitaxial layer disposed over the oxide layer. The first epitaxial layer has the first conductivity type. The semiconductor device also includes a second epitaxial layer disposed over the first epitaxial layer and a third epitaxial layer disposed over the second epitaxial layer. The second epitaxial layer has a second conductivity type that is opposite to the first conductivity type. The third epitaxial layer has the first conductivity type.
    Type: Grant
    Filed: July 11, 2018
    Date of Patent: May 19, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chih-Hung Lin, Chia-Hao Lee
  • Publication number: 20200111912
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first oxide layer disposed over the substrate, a second oxide layer, and a semiconductor layer disposed over the second oxide layer. The second oxide layer is disposed at one side of the first oxide layer and is in contact with the first oxide layer. The second oxide layer partially overlaps the first oxide layer, and the first oxide layer and the second oxide layer include the same oxide.
    Type: Application
    Filed: October 3, 2018
    Publication date: April 9, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Hung LIN, Chia-Hao LEE
  • Patent number: 10600919
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a first oxide layer disposed over the substrate, a second oxide layer, and a semiconductor layer disposed over the second oxide layer. The second oxide layer is disposed at one side of the first oxide layer and is in contact with the first oxide layer. The second oxide layer partially overlaps the first oxide layer, and the first oxide layer and the second oxide layer include the same oxide.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: March 24, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chih-Hung Lin, Chia-Hao Lee
  • Patent number: 10598776
    Abstract: An electronic device includes a clock generating circuit, a receiving circuit and a training circuit. The clock generating circuit generates a sampling clock signal, a phase-early sampling clock signal and a phase-late sampling clock signal. The receiving circuit samples received data according to the sampling clock signal, the phase-early sampling clock signal and the phase-late sampling clock signal to generate a sample result. The training circuit controls the clock generating circuit to generate the sampling clock signal and the corresponding phase-early sampling clock signal and phase-late sampling clock signal that have different phases in a plurality of different time intervals, respectively, to cause the receiving circuit to generate a plurality of sample results. The training circuit further determines a sampling phase of the sampling clock signal according to the sample results.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: March 24, 2020
    Assignee: MEDIATEK INC.
    Inventors: Ming-Han Weng, Wei-Yung Wang, Chih-Hung Lin, Jyun Yang Shih, Chun-Chia Chen
  • Publication number: 20200020573
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an oxide layer disposed over the substrate, and a first epitaxial layer disposed over the oxide layer. The first epitaxial layer has the first conductivity type. The semiconductor device also includes a second epitaxial layer disposed over the first epitaxial layer and a third epitaxial layer disposed over the second epitaxial layer. The second epitaxial layer has a second conductivity type that is opposite to the first conductivity type. The third epitaxial layer has the first conductivity type.
    Type: Application
    Filed: July 11, 2018
    Publication date: January 16, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Hung LIN, Chia-Hao LEE
  • Patent number: 10522533
    Abstract: A three-dimensional (3D) circuit structure includes a 3D insulating substrate having at least one circuit forming zone and at least one exposed contact forming zone; at least one circuit pattern portion provided on the 3D insulating substrate and having at least one circuit trace layout layer located in the circuit forming zone and at least one exposed contact located in the exposed contact forming zone and connected to the circuit trace layout layer; and an insulating encapsulation member covering at least the circuit forming zone and the circuit trace layout layer. With the insulating encapsulation member, the circuit trace layout layer is waterproof, dustproof, scratch-resistant, peeling-proof, secure for use, and compliant with safety codes of electrical insulation, enabling the 3D circuit structure in use to have stable electrical characteristics.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: December 31, 2019
    Assignee: PIN SHINE INDUSTRIAL CO., LTD.
    Inventors: Chih-Hung Lin, Kun-Chuan Chang
  • Publication number: 20190393339
    Abstract: A method for manufacturing a high-voltage semiconductor device is provided. The method includes providing a substrate having a first conductive type. The method also includes performing a first ion implantation process so that a first doped region is formed in the substrate. The first doped region has a second conductive type that is different from the first conductive type. The method further includes forming a first epitaxial layer over the substrate. In addition, the method includes performing a second ion implantation process so that a second doped region is formed in the first epitaxial layer. The second doped region has the second conductive type, and the first doped region is in direct contact with the second doped region.
    Type: Application
    Filed: June 26, 2018
    Publication date: December 26, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Chih-Hung LIN, Chia-Hao LEE
  • Publication number: 20190392982
    Abstract: A passive component structure includes an insulating substrate having a centered hollow portion and provided on a surface with a coil holding zone having at least one spiral receiving recess; at least one coil held in the coil holding zone and including a winding portion received in the spiral receiving recess and connected to a first and a second terminal; an insulating encapsulation member covering at least the insulating substrate and the winding portion of the coil; and a magnetic unit engaged with the hollow portion of the insulating substrate. With these arrangements, the passive component structure can include only one coil and be configured into an inductor, or can include two coils and be configured into a transformer. Therefore, the passive component structure has the advantages of having simple structure, reduced volume and improved insulation, and can be flexibly applied to make different electronic elements at reduced cost.
    Type: Application
    Filed: June 25, 2018
    Publication date: December 26, 2019
    Inventors: CHIH-HUNG LIN, KUN-CHUAN CHANG
  • Publication number: 20190393213
    Abstract: A three-dimensional (3D) circuit structure includes a 3D insulating substrate having at least one circuit forming zone and at least one exposed contact forming zone; at least one circuit pattern portion provided on the 3D insulating substrate and having at least one circuit trace layout layer located in the circuit forming zone and at least one exposed contact located in the exposed contact forming zone and connected to the circuit trace layout layer; and an insulating encapsulation member covering at least the circuit forming zone and the circuit trace layout layer. With the insulating encapsulation member, the circuit trace layout layer is waterproof, dustproof, scratch-resistant, peeling-proof, secure for use, and compliant with safety codes of electrical insulation, enabling the 3D circuit structure in use to have stable electrical characteristics.
    Type: Application
    Filed: June 25, 2018
    Publication date: December 26, 2019
    Inventors: CHIH-HUNG LIN, KUN-CHUAN CHANG
  • Patent number: 10489591
    Abstract: A detection system and method thereof are provided. The detection method comprises the following steps: decompiling a first application package file to generate a plurality of first decompiled files, and the first decompiled files comprising a first decompiled code; comparing the first decompiled code with a second decompiled code of a second application package file to analyze a different code segment between the first decompiled code and the second decompiled code; classifying a changed code type corresponding to the different code segment according to a function call flow of the first decompiled code; loading a correspondence table and selecting at least one detection rule corresponding to the changed code type in the correspondence table; confirming a detection region of the first decompiled code according to the at least one detection rule; and detecting the detection region to generate a security detection result.
    Type: Grant
    Filed: June 19, 2016
    Date of Patent: November 26, 2019
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Chih-Hung Lin, Chia-Wei Tien, Tse-Yung Huang, Chin-Wei Tien
  • Publication number: 20190349657
    Abstract: A display device includes a casing, a display module and a woofer. The casing includes a back cover. A top side of the back cover has a plurality of sound holes formed thereon. A wall structure extends from an inner surface of the back cover. An opening of the back cover communicates with the sound holes. The display module is disposed in the casing. The woofer is disposed in the casing and located between the display module and the back cover. The wall structure encloses the woofer to guide a sound outputted by the woofer to the sound holes through the opening.
    Type: Application
    Filed: March 29, 2019
    Publication date: November 14, 2019
    Inventors: Chih-Hung Lin, Hsun-Cheng Cho, Long-Sing Jhong
  • Patent number: D880733
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: April 7, 2020
    Assignee: METEOR ILLUMINATION TECHNOLOGIES, INC.
    Inventors: Chih-Chieh Lo, Chih-Hung Lin
  • Patent number: D910408
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: February 16, 2021
    Inventor: Chih-Hung Lin