Patents by Inventor Chih-Jen Huang
Chih-Jen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160197019Abstract: A semiconductor device includes: a plurality of stacked semiconductor layers; a plurality of composite doped regions separately and parallelly disposed in a portion of the semiconductor layers along a first direction; a gate structure disposed over a portion of the semiconductor layers along a second direction, wherein the gate structure covers a portion of the composite doped regions; a first doped region formed in the most top semiconductor layer along the second direction and being adjacent to a first side of the gate structure; and a second doped region formed in the most top semiconductor layer along the second direction and being adjacent to a second side of the gate structure opposite to the first side thereof.Type: ApplicationFiled: March 16, 2016Publication date: July 7, 2016Applicant: Vanguard International Semiconductor CorporationInventors: Hsiung-Shih CHANG, Jui-Chun CHANG, Chih-Jen HUANG
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Publication number: 20160172487Abstract: A semiconductor device is provided. The device includes a substrate having a first conductivity type. The device further includes a drain region, a source region, and a well region disposed in the substrate. The well region is disposed between the drain region and the source region and having a second conductivity type opposite to the first conductivity type. The device further includes a plurality of doped regions disposed within the well region. The doped regions are vertically and horizontally offset from each other. Each of the doped regions includes a lower portion having the first conductivity type, and an upper portion stacked on the lower region and having the second conductivity type.Type: ApplicationFiled: February 24, 2016Publication date: June 16, 2016Inventors: Shang-Hui TU, Chih-Jen HUANG, Jui-Chun CHANG, Shin-Cheng LIN, Yu-Hao HO, Wen-Hsin LIN
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Patent number: 9362372Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes an isolation structure formed in a substrate to define an active region of the substrate. The active region has a field plate region therein. A step gate dielectric structure is formed on the substrate in the field plate region. The step gate dielectric structure includes a first layer of a first dielectric material and a second layer of the dielectric material, laminated vertically to each other. The first and second layers of the first dielectric material are separated from each other by a second dielectric material layer. An etch rate of the second dielectric material layer to an etchant is different from that of the second layer of the first dielectric material. A method for forming a semiconductor device is also disclosed.Type: GrantFiled: March 12, 2015Date of Patent: June 7, 2016Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Sue-Yi Chen, Chien-Hsien Song, Chih-Jen Huang
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Patent number: 9324785Abstract: A semiconductor device includes: a plurality of stacked semiconductor layers; a plurality of composite doped regions separately and parallelly disposed in a portion of the semiconductor layers along a first direction; a gate structure disposed over a portion of the semiconductor layers along a second direction, wherein the gate structure covers a portion of the composite doped regions; a first doped region formed in the most top semiconductor layer along the second direction and being adjacent to a first side of the gate structure; and a second doped region formed in the most top semiconductor layer along the second direction and being adjacent to a second side of the gate structure opposite to the first side thereof.Type: GrantFiled: April 10, 2014Date of Patent: April 26, 2016Assignee: Vanguard International Semiconductor CorporationInventors: Hsiung-Shih Chang, Jui-Chun Chang, Chih-Jen Huang
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Patent number: 9306034Abstract: A semiconductor device is provided. The device includes a substrate having a first conductivity type. The device further includes a drain region, a source region, and a well region disposed in the substrate. The well region is disposed between the drain region and the source region and having a second conductivity type opposite to the first conductivity type. The device further includes a plurality of doped regions disposed within the well region. The doped regions are vertically and horizontally offset from each other. Each of the doped regions includes a lower portion having the first conductivity type, and an upper portion stacked on the lower region and having the second conductivity type.Type: GrantFiled: February 24, 2014Date of Patent: April 5, 2016Assignee: Vanguard International Semiconductor CorporationInventors: Shang-Hui Tu, Chih-Jen Huang, Jui-Chun Chang, Shin-Cheng Lin, Yu-Hao Ho, Wen-Hsin Lin
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Patent number: 9292839Abstract: Various embodiments of a system and method for personalized commands are described. The system and method for personalized commands may include a payment service including a command management component. Such payment service may be responsive to one or more base commands. The command management component may be configured to generate a user interface for specifying personalized commands that correspond to the base commands. The command management component may be configured to generate mapping information from the information received via the user interface. The command management component may be configured to receive one or more messages that may include commands for the payment service, including personalized commands. From the personalized commands, the command management component may be configured to determine a corresponding base commands (e.g., based on the mapping information). Once the base command is determined, the payment service may perform the base command.Type: GrantFiled: May 19, 2014Date of Patent: March 22, 2016Assignee: Amazon Technologies, Inc.Inventors: Diwakar Gupta, Chih-Jen Huang, Philip Yuen, Gerald Yuen
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Patent number: 9190279Abstract: A semiconductor device is disclosed. An isolation structure is formed in a substrate to define an active region of the substrate, wherein the active region has a field plate region. A gate dielectric layer is formed on the substrate outside of the field plate region. A step gate dielectric structure is formed on the substrate corresponding to the field plate region, wherein the step gate dielectric structure has a thickness greater than that of the gate dielectric layer and less than that of the isolation structure. A method for forming a semiconductor device is also disclosed.Type: GrantFiled: April 25, 2013Date of Patent: November 17, 2015Assignee: Vanguard International Semiconductor CorporationInventors: Sue-Yi Chen, Chien-Hsien Song, Chih-Jen Huang
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Patent number: 9171301Abstract: A mobile payment network may include a server receiving a request for payment from a device, where the request may include information related to a location for the device. The information related to location information for the device that is included within the request may then be used for deriving location information for the device. Given the location information for the device, a distance between the location information and a geographic area may be determined. The distance between the location information for the device and the geographic area may then serve, at least in part, as the basis for approving the request for payment.Type: GrantFiled: August 9, 2013Date of Patent: October 27, 2015Assignee: Amazon Technologies, Inc.Inventors: Diwakar Gupta, Paul C. Schattauer, Chih-Jen Huang, Kiran Kumar Meduri
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Publication number: 20150295032Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate having an isolation region and an active region defined by the isolation region. At least one trench is formed in the active region and extends along a first direction. A gate layer is disposed on the active region and extends along a second direction, wherein the gate layer conformably fills the at least one trench and covers a bottom surface and sidewalls of the at least one trench. The disclosure also provides a method for manufacturing the semiconductor device.Type: ApplicationFiled: April 9, 2014Publication date: October 15, 2015Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Chung-Ren LAO, Hsing-Chao LIU, Chih-Jen HUANG
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Publication number: 20150295026Abstract: A semiconductor device includes: a plurality of stacked semiconductor layers; a plurality of composite doped regions separately and parallelly disposed in a portion of the semiconductor layers along a first direction; a gate structure disposed over a portion of the semiconductor layers along a second direction, wherein the gate structure covers a portion of the composite doped regions; a first doped region formed in the most top semiconductor layer along the second direction and being adjacent to a first side of the gate structure; and a second doped region formed in the most top semiconductor layer along the second direction and being adjacent to a second side of the gate structure opposite to the first side thereof.Type: ApplicationFiled: April 10, 2014Publication date: October 15, 2015Applicant: Vanguard International Semiconductor CorporationInventors: Hsiung-Shih CHANG, Jui-Chun CHANG, Chih-Jen HUANG
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Publication number: 20150295018Abstract: A semiconductor device including a substrate having an isolation structure therein is disclosed. A capacitor is disposed on the isolation structure and includes a polysilicon electrode, an insulating layer disposed on the polysilicon electrode, and a metal electrode disposed on the insulating layer. A method for forming the semiconductor device is also disclosed.Type: ApplicationFiled: April 10, 2014Publication date: October 15, 2015Applicant: Vanguard International Semiconductor CorporationInventors: Chung-Ren LAO, Hsing-Chao LIU, Tzung-Hsian WU, Chih-Jen HUANG
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Publication number: 20150279986Abstract: The present disclosure provides a semiconductor device, including a semiconductor substrate, an epitaxial structure, a well region, a drain region and a source region respectively formed in the epitaxial structure inside and outside of the well region. At least one set of first, second and third heavily doped regions formed in the well region between source and drain regions, wherein the first, second and third heavily doped regions are adjoined sequentially from bottom to top. A gate structure disposed over the epitaxial structure. The present disclosure also provides a method for manufacturing the semiconductor device.Type: ApplicationFiled: April 21, 2015Publication date: October 1, 2015Applicant: Vanguard International Semiconductor CorporationInventors: Shang-Hui TU, Chih-Jen HUANG, Jui-Chun CHANG, Yu-Hao HO, Wen-Hsin LIN, Shin-Cheng LIN
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Patent number: 9129989Abstract: The present disclosure provides a semiconductor device, including a semiconductor substrate, an epitaxial structure, a well region, a drain region and a source region respectively formed in the epitaxial structure inside and outside of the well region. At least one set of first, second and third heavily doped regions formed in the well region between source and drain regions, wherein the first, second and third heavily doped regions are adjoined sequentially from bottom to top. A gate structure disposed over the epitaxial structure. The present disclosure also provides a method for manufacturing the semiconductor device.Type: GrantFiled: April 21, 2015Date of Patent: September 8, 2015Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Shang-Hui Tu, Chih-Jen Huang, Jui-Chun Chang, Yu-Hao Ho, Wen-Hsin Lin, Shin-Cheng Lin
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Publication number: 20150243766Abstract: A semiconductor device is provided. The device includes a substrate having a first conductivity type. The device further includes a drain region, a source region, and a well region disposed in the substrate. The well region is disposed between the drain region and the source region and having a second conductivity type opposite to the first conductivity type. The device further includes a plurality of doped regions disposed within the well region. The doped regions are vertically and horizontally offset from each other. Each of the doped regions includes a lower portion having the first conductivity type, and an upper portion stacked on the lower region and having the second conductivity type.Type: ApplicationFiled: February 24, 2014Publication date: August 27, 2015Applicant: Vanguard International Semiconductor CorporationInventors: Shang-Hui TU, Chih-Jen HUANG, Jui-Chun CHANG, Shin-Cheng LIN, Yu-Hao HO, Wen-Hsin LIN
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Publication number: 20150200261Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes an isolation structure formed in a substrate to define an active region of the substrate. The active region has a field plate region therein. A step gate dielectric structure is formed on the substrate in the field plate region. The step gate dielectric structure includes a first layer of a first dielectric material and a second layer of the dielectric material, laminated vertically to each other. The first and second layers of the first dielectric material are separated from each other by a second dielectric material layer. An etch rate of the second dielectric material layer to an etchant is different from that of the second layer of the first dielectric material. A method for forming a semiconductor device is also disclosed.Type: ApplicationFiled: March 12, 2015Publication date: July 16, 2015Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Sue-Yi CHEN, Chien-Hsien SONG, Chih-Jen HUANG
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Patent number: 9082116Abstract: A mobile payment network receives a payment request from a first user operating a first mobile device and identifies recipients of the payment request based at least in part on the proximity of other mobile devices to the first mobile device.Type: GrantFiled: May 19, 2014Date of Patent: July 14, 2015Assignee: AMAZON TECHNOLOGIES, INC.Inventors: Diwakar Gupta, Paul C. Schattauer, Chih-Jen Huang, Kiran Kumar Meduri
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Patent number: 9054129Abstract: The present disclosure provides a semiconductor device, including a semiconductor substrate, an epitaxial structure, a well region, a drain region and a source region respectively formed in the epitaxial structure inside and outside of the well region. At least one set of first, second and third heavily doped regions formed in the well region between source and drain regions, wherein the first, second and third heavily doped regions are adjoined sequentially from bottom to top. A gate structure disposed over the epitaxial structure. The present disclosure also provides a method for manufacturing the semiconductor device.Type: GrantFiled: March 26, 2014Date of Patent: June 9, 2015Assignee: Vanguard International Semiconductor CorporationInventors: Shang-Hui Tu, Chih-Jen Huang, Jui-Chun Chang, Yu-Hao Ho, Wen-Hsin Lin, Shin-Cheng Lin
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Publication number: 20150123199Abstract: A lateral diffused semiconductor device is disclosed, including: a substrate; a first isolation and a second isolation comprising at least portions disposed in the substrate to define an active area; a first drift region and a second drift region disposed in the active area, wherein the first drift region is disposed in the second drift region; a gate structure on the substrate; a source region in the first drift region; a drain region in the second drift region; and a ring-shaped field plate on the substrate, wherein the ring-shaped field plate surrounds at least one of the source and the drain region.Type: ApplicationFiled: November 5, 2013Publication date: May 7, 2015Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Sue-Yi CHEN, Chien-Hsien SONG, Chih-Jen HUANG
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Patent number: 9012988Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes an isolation structure formed in a substrate to define an active region of the substrate. The active region has a field plate region therein. A step gate dielectric structure is formed on the substrate in the field plate region. The step gate dielectric structure includes a first layer of a first dielectric material and a second layer of the dielectric material, laminated vertically to each other. The first and second layers of the first dielectric material are separated from each other by a second dielectric material layer. An etch rate of the second dielectric material layer to an etchant is different from that of the second layer of the first dielectric material. A method for forming a semiconductor device is also disclosed.Type: GrantFiled: August 15, 2013Date of Patent: April 21, 2015Assignee: Vanguard International Semiconductor CorporationInventors: Sue-Yi Chen, Chien-Hsien Song, Chih-Jen Huang
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Patent number: 8977568Abstract: Anonymous mobile payments enable a user to make and/or receive payments without disclosing personal or private information to another party. In some aspects, a provider of a payment may request an anonymous payment for a specified value from a host. In response, the host may transmit to the provider a code that is available for redemption. The provider may then relay the code to a recipient, who may redeem the code from the host. In other aspects, a recipient may request a temporary identifier (special code) from a host. The recipient may relay the temporary identifier to a provider, who may in turn transmit a payment, via the host, using the temporary identifier. The recipient may then claim the payment from the host. In additional aspects, the codes of the anonymous payments may include expiration times and/or restrictions on a number of uses of the code.Type: GrantFiled: March 13, 2013Date of Patent: March 10, 2015Assignee: Amazon Technologies, Inc.Inventors: Paul C. Schattauer, Derek Edward Wegner, Diwakar Gupta, Chih-Jen Huang, Philip Yuen