Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

Abstract: An electronic device is provided. The electronic device includes an antenna array including a plurality of antenna patterns collectively configured to provide a scan-angle coverage. Each of the antenna patterns includes a curved surface.

Abstract: A semiconductor device includes a first substrate and a first device layer. The first device layer is disposed on the first substrate and includes a first region and a second region of the first device layer. The first device layer includes at least one first device and a sensor aside the at least one first device. The sensor includes a first resistor with a first non-linear temperature resistance curve and a second resistor with a second non-linear temperature resistance curve. A temperature of the sensor is linearly related to a difference between a first resistance of the first resistor at the temperature and a second resistance of the second resistor at the temperature.

Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device, a second electronic device, a first underfill, a second underfill and a stiff bonding material. The first electronic device and the second electronic device are disposed on the wiring structure, and are electrically connected to each other through the wiring structure. The first underfill is disposed in a first space between the first electronic device and the wiring structure. The second underfill is disposed in a second space between the second electronic device and the wiring structure. The stiff bonding material is disposed in a central gap between the first electronic device and the second electronic device. The stiff bonding material is different from the first underfill and the second underfill.

Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.

Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

Abstract: The present disclosure relates to a wireless communication module. The wireless communication module includes a first antenna layer and a second antenna layer non-coplanar with the second antenna layer. An electromagnetic wave of the first antenna and the second antenna are configured to have far-field interference to each other.

Abstract: A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.

Abstract: A capacitor structure is provided. The capacitor structure includes a first electrode and a second electrode. The first electrode includes a first segment and a third segment. The second electrode includes a second segment and a fourth segment, the second segment is interposed between the first segment and the third segment, and the third segment is interposed between the second segment and the fourth segment. A first distance is between the first segment and the second segment, and a second distance between the second segment and the third segment. The first distance is different from the second distance.

Abstract: An assembly structure and a method for manufacturing an assembly structure are provided. The assembly structure includes a wiring structure and a semiconductor element. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the at least one dielectric layer, and defines an accommodating recess recessed from a top surface of the wiring structure. The wiring structure has a smooth surface extending from the top surface of the wiring structure to a surface of the accommodating recess. The semiconductor element is disposed in the accommodating recess.

Abstract: An assembly structure and a method for manufacturing an assembly structure are provided. The assembly structure includes a wiring structure and a semiconductor element. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the at least one dielectric layer, and defines an accommodating recess recessed from a top surface of the wiring structure. The wiring structure has a smooth surface extending from the top surface of the wiring structure to a surface of the accommodating recess. The semiconductor element is disposed in the accommodating recess.

Abstract: The present disclosure relates to a wireless communication module. The wireless communication module includes a first antenna layer and a second antenna layer non-coplanar with the second antenna layer. An electromagnetic wave of the first antenna and the second antenna are configured to have far-field interference to each other.

Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device, a second electronic device, a first underfill, a second underfill and a stiff bonding material. The first electronic device and the second electronic device are disposed on the wiring structure, and are electrically connected to each other through the wiring structure. The first underfill is disposed in a first space between the first electronic device and the wiring structure. The second underfill is disposed in a second space between the second electronic device and the wiring structure. The stiff bonding material is disposed in a central gap between the first electronic device and the second electronic device. The stiff bonding material is different from the first underfill and the second underfill.

Abstract: An electroless semiconductor bonding structure, an electroless plating system and an electroless plating method of the same are provided. The electroless semiconductor bonding structure includes a first substrate and a second substrate. The first substrate includes a first metal bonding structure disposed adjacent to a first surface of the first substrate. The second substrate includes a second metal bonding structure disposed adjacent to a second surface of the second substrate. The first metal bonding structure connects to the second metal bonding structure at an interface by electroless bonding and the interface is substantially void free.

Abstract: A wiring structure is provided. The wiring structure includes an upper redistribution structure, a lower redistribution structure, a conductive structure, an upper bonding layer and a lower bonding layer. The conductive structure is disposed between and electrically connected to the upper redistribution structure and the lower redistribution structure. The upper bonding layer is disposed between the upper redistribution structure and the conductive structure to bond the upper redistribution structure and the conductive structure together. The lower bonding layer is disposed between the lower redistribution structure and the conductive structure to bond the lower redistribution structure and the conductive structure together.

Abstract: A semiconductor device package includes a substrate, an electronic component disposed on the substrate, a supporting structure disposed on the substrate and surrounding the electronic component, and a heat spreading structure disposed on the supporting structure. A length of the supporting structure and a length of the heat spreading structure are greater than a length of the substrate.

Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

Abstract: A wiring structure is provided. The wiring structure includes an upper redistribution structure, a lower redistribution structure, a conductive structure, an upper bonding layer and a lower bonding layer. The conductive structure is disposed between and electrically connected to the upper redistribution structure and the lower redistribution structure. The upper bonding layer is disposed between the upper redistribution structure and the conductive structure to bond the upper redistribution structure and the conductive structure together. The lower bonding layer is disposed between the lower redistribution structure and the conductive structure to bond the lower redistribution structure and the conductive structure together.

Abstract: An electronic device includes a main substrate, a semiconductor package structure and at least one heat pipe. The semiconductor package structure is electrically connected to the main substrate, and includes a die mounting portion, a semiconductor die and a cover structure. The semiconductor die is disposed on the die mounting portion. The cover structure covers the semiconductor die. The heat pipe contacts the cover structure for dissipating a heat generated by the semiconductor die.