Patents by Inventor Chin-Jen Huang
Chin-Jen Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145255Abstract: An electronic includes an electronic element, an encapsulation layer surrounding the electronic element, a first circuit structure, a second circuit structure and a connecting structure. The encapsulation layer has a top surface, a bottom surface and an opening, wherein a sidewall of the opening connects the top surface and the bottom surface. The first circuit structure is disposed at the top surface of the encapsulation layer. The second circuit structure is disposed at the bottom surface of the encapsulation layer. The connecting structure is disposed in the opening, wherein the electronic element is electrically connected to the second circuit structure through the first circuit structure and the connecting structure. The connecting structure includes a first sub layer and a second sub layer, the first sub layer is located between the encapsulation layer and the second sub layer, and the first sub layer covers the sidewall of the opening.Type: ApplicationFiled: September 14, 2023Publication date: May 2, 2024Applicant: InnoLux CorporationInventors: Ker-Yih KAO, Chin-Ming HUANG, Wei-Yuan CHENG, Jui-Jen YUEH, Kuan-Feng LEE
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Patent number: 11969677Abstract: A method for eliminating bubbles from a liquid dispensing system includes flowing a liquid containing bubbles into a liquid inlet of a tank from a filter to substantially fill the tank, wherein substantially all bubbles accumulate in an upper portion of the tank having a lateral dimension greater than a lateral dimension of a lower portion of the tank, and flowing the liquid into the tank comprises flowing the liquid through an inlet pipe extending at an acute angle relative to a horizontally-oriented axis of the tank. The method further includes flowing a liquid substantially free of bubbles out of the tank via a liquid outlet at the lower portion of the tank for dispensing to a substrate.Type: GrantFiled: March 9, 2022Date of Patent: April 30, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Y. L. Huang, Chin-Kun Fang, Li-Jen Wu, Yu Kai Chen
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Publication number: 20110297550Abstract: The prevent disclosure discloses a structure of thermal resistive layer and the method of forming the same. The thermal resistive structures, formed on a plastic substrate, comprises a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure, and a buffer layer, formed on said porous layer, wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process. With the structure and method disclosed above, making a thin film transistor and forming electronic devices on the plastic substrate in the technology of Low Temperature PolySilicon, i.e. LTPS, without changing any parameters is possible.Type: ApplicationFiled: August 19, 2011Publication date: December 8, 2011Applicant: Industrial Technology Research InstituteInventors: Jung-Fang Chang, Te-Chi Wong, Chien-Te Hsieh, Chin-Jen Huang, Yu-Hung Chen
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Patent number: 8029890Abstract: The prevent invention discloses a structure of thermal resistive layer and the method of forming the same. The thermal resistive structures, formed on a plastic substrate, comprises a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure, and a buffer layer, formed on said porous layer, wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process. With the structure and method disclosed above, making a thin film transistor and forming electronic devices on the plastic substrate in the technology of Low Temperature PolySilicon, i.e. LTPS, without changing any parameters is easy to carry out.Type: GrantFiled: December 3, 2009Date of Patent: October 4, 2011Assignee: Industrial Technology Research InstituteInventors: Jung-Fang Chang, Te-Chi Wong, Chien-Te Hsieh, Chin-Jen Huang, Yu-Hung Chen
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Patent number: 7807551Abstract: In a method for fabricating a flexible pixel array substrate, first, a release layer is formed on a rigid substrate. Next, on the release layer, a polymer film is formed, the adhesive strength between the rigid substrate and the release layer being higher than that between the release layer and the polymer film. The polymer film is formed by spin coating a polymer monomer and performing a curing process to form a polymer layer. Afterwards, a pixel array is formed on the polymer film. The polymer film with the pixel array formed thereon is separated from the rigid substrate.Type: GrantFiled: June 19, 2009Date of Patent: October 5, 2010Assignee: Industrial Technology Research InstituteInventors: Chin-Jen Huang, Jung-Fang Chang, Yih-Rong Luo, Yu-Hung Chen
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Publication number: 20100080977Abstract: The prevent invention discloses a structure of thermal resistive layer and the method of forming the same. The thermal resistive structures, formed on a plastic substrate, comprises a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure, and a buffer layer, formed on said porous layer, wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process. With the structure and method disclosed above, making a thin film transistor and forming electronic devices on the plastic substrate in the technology of Low Temperature PolySilicon, i.e. LTPS, without changing any parameters is easy to carry out.Type: ApplicationFiled: December 3, 2009Publication date: April 1, 2010Applicant: Industrial Technology Research InstituteInventors: Jung-Fang Chang, Te-Chi Wong, Chien-Te Hsieh, Chin-Jen Huang, Yu-Hung Chen
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Publication number: 20090269874Abstract: In a method for fabricating a flexible pixel array substrate, first, a release layer is formed on a rigid substrate. Next, on the release layer, a polymer film is formed, the adhesive strength between the rigid substrate and the release layer being higher than that between the release layer and the polymer film. The polymer film is formed by spin coating a polymer monomer and performing a curing process to form a polymer layer. Afterwards, a pixel array is formed on the polymer film. The polymer film with the pixel array formed thereon is separated from the rigid substrate.Type: ApplicationFiled: June 19, 2009Publication date: October 29, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chin-Jen Huang, Jung-Fang Chang, Yih-Rong Luo, Yu-Hung Chen
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Patent number: 7566950Abstract: The present invention provides a method for fabricating a flexible pixel array substrate as follows. First, a release layer is formed on a rigid substrate. Next, on the release layer, a polymer film is formed, the adhesive strength between the rigid substrate and the release layer being higher than that between the release layer and the polymer film. The polymer film is formed by spin coating a polymer monomer and performing a curing process to form a polymer layer. Afterwards, a pixel array is formed on the polymer film. The polymer film with the pixel array formed thereon is separated from the rigid substrate.Type: GrantFiled: November 22, 2005Date of Patent: July 28, 2009Assignee: Industrial Technology Research InstituteInventors: Chin-Jen Huang, Jung-Fang Chang, Yih-Rong Luo, Yu-Hung Chen
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Publication number: 20090155988Abstract: A low temperature poly-silicon thin film element, method of making poly-silicon thin film by direct deposition at low temperature, and the inductively-coupled plasma chemical vapor deposition equipment utilized, wherein the poly-silicon material is induced to crystallize into a poly-silicon thin film at low temperature by means of high density plasma and substrate bias voltage. Furthermore, the atom structure of the poly-silicon thin film is aligned in regular arrangement by making use of the induction layer having optimal orientation and lattice constant close to that of the silicon, thus raising the crystallization quality of the poly-silicon thin film and reducing the thickness of the incubation layer.Type: ApplicationFiled: January 13, 2009Publication date: June 18, 2009Inventors: I-Hsuan PENG, Chin-jen HUANG, Liang-Tang WANG, Jung-Fang CHANG, Te-Chi WONG
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Patent number: 7521341Abstract: A method for forming a polysilicon film in a plasma-assisted chemical vapor deposition (CVD) system including a chamber in which a first electrode and a second electrode spaced apart from the first electrode are provided comprises providing a substrate on the second electrode, the substrate including a surface exposed to the first electrode, applying a first power to the first electrode for generating a plasma in the chamber, applying a second power to the second electrode during a nucleation stage of the polysilicon film for ion bombarding the surface of the substrate, and flowing an erosive gas into the chamber.Type: GrantFiled: November 9, 2005Date of Patent: April 21, 2009Assignee: Industrial Technology Research InstituteInventors: Liang-Tang Wang, Chi-Lin Chen, I-Hsuan Peng, Jung-Fang Chang, Chin-Jen Huang
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Publication number: 20080188062Abstract: A method capable of making a semiconductor device in a plasma-assisted chemical vapor deposition (CVD) system including a chamber having a first electrode and a second electrode spaced apart from one another, the method comprising providing a substrate on the second electrode, the substrate including a surface being exposed to the first electrode, forming a semiconductor film on the surface of the substrate and applying a first bias to the second electrode during a nucleation stage of the semiconductor film till a predetermined thickness of the semiconductor film is reached, and applying a second bias to the second electrode after the predetermined thickness of the semiconductor film is reached.Type: ApplicationFiled: February 2, 2007Publication date: August 7, 2008Inventors: Chi-Lin Chen, Chin-Jen Huang
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Publication number: 20070254399Abstract: A method for manufacturing a thin film transistor (“TFT”) device includes providing a substrate, forming a patterned first metal layer on the substrate, forming an insulating layer over the patterned first metal layer, forming an amorphous silicon layer over the insulating layer, forming a first polycrystalline silicon layer over the amorphous silicon layer, forming a second polycrystalline silicon layer over the first polycrystalline silicon layer, doping the second polycrystalline silicon layer to form a doped polycrystalline silicon layer, patterning the amorphous silicon layer, first polycrystalline silicon layer and doped polycrystalline silicon layer to form an active region layer for the TFT device, and forming a patterned second metal layer over the active region layer.Type: ApplicationFiled: April 27, 2006Publication date: November 1, 2007Applicant: Industrial Technology Research InstituteInventors: Min WANG, I-Hsuan PENG, Te-Chi WONG, Liang-Tang WANG, Chin-Jen HUANG
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Publication number: 20070105373Abstract: A method for forming a polysilicon film in a plasma-assisted chemical vapor deposition (CVD) system including a chamber in which a first electrode and a second electrode spaced apart from the first electrode are provided comprises providing a substrate on the second electrode, the substrate including a surface exposed to the first electrode, applying a first power to the first electrode for generating a plasma in the chamber, applying a second power to the second electrode during a nucleation stage of the polysilicon film for ion bombarding the surface of the substrate, and flowing an erosive gas into the chamber.Type: ApplicationFiled: November 9, 2005Publication date: May 10, 2007Inventors: Liang-Tang Wang, Chi-Lin Chen, I-Hsuan Peng, Jung-Fang Chang, Chin-Jen Huang
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Publication number: 20070077735Abstract: A low temperature poly-silicon thin film element, method of making poly-silicon thin film by direct deposition at low temperature, and the inductively-coupled plasma chemical vapor deposition equipment utilized, wherein the poly-silicon material is induced to crystallize into a poly-silicon thin film at low temperature by means of high density plasma and substrate bias voltage. Furthermore, the atom structure of the poly-silicon thin film is aligned in regular arrangement by making use of the induction layer having optimal orientation and lattice constant close to that of the silicon, thus raising the crystallization quality of the poly-silicon thin film and reducing the thickness of the incubation layer.Type: ApplicationFiled: April 3, 2006Publication date: April 5, 2007Inventors: I-Hsuan Peng, Chin-Jen Huang, Liang-Tang Wang, Jung-Fang Chang, Te-Chi Wong
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Publication number: 20070059854Abstract: The present invention provides a method for fabricating a flexible pixel array substrate as follows. First, a release layer is formed on a rigid substrate. Next, on the release layer, a polymer film is formed, the adhesive strength between the rigid substrate and the release layer being higher than that between the release layer and the polymer film. The polymer film is formed by spin coating a polymer monomer and performing a curing process to form a polymer layer. Afterwards, a pixel array is formed on the polymer film. The polymer film with the pixel array formed thereon is separated from the rigid substrate.Type: ApplicationFiled: November 22, 2005Publication date: March 15, 2007Inventors: Chin-Jen Huang, Jung-Fang Chang, Yih-Rong Luo, Yu-Hung Chen
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Publication number: 20060093807Abstract: The prevent invention discloses a structure of thermal resistive layer and the method of forming the same. The thermal resistive structures, formed on a plastic substrate, comprises a porous layer, formed on said plastic substrate, including a plurality of oxides of hollow structure, and a buffer layer, formed on said porous layer, wherein said porous layer can protect said plastic substrate from damage caused by the heat generated during manufacturing process. With the structure and method disclosed above, making a thin film transistor and forming electronic devices on the plastic substrate in the technology of Low Temperature PolySilicon, i.e. LTPS, without changing any parameters is easy to carry out.Type: ApplicationFiled: December 29, 2004Publication date: May 4, 2006Inventors: Jung-Fang Chang, Te-Chi Wong, Chien-Te Hsieh, Chin-Jen Huang, Yu-Hung Chen
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Patent number: 6191000Abstract: The invention relates to a shallow trench isolation method used in a semiconductor wafer that comprises a plurality of predetermined active regions, a plurality of shallow trenches used for electrically isolating the plurality of active regions, and a wafer alignment region wherein at least one recess having a predetermined pattern is formed on the surface of the wafer. In the method of the present invention, an insulation layer is first formed on the surface of the semiconductor wafer to fill the recesses in the wafer alignment region and the plurality of shallow trenches. An etching process is then implemented to reduce the thickness of the insulation layer on the surface of the working region, the working region having a relatively high density of active regions. Also, the insulation layer is completely removed from the recesses within the wafer alignment region.Type: GrantFiled: August 23, 1999Date of Patent: February 20, 2001Assignee: Macronix International Co., Ltd.Inventors: Chin-Yi Huang, Chin-Jen Huang, Chen-Chin Liu, Yun Chang