Abstract: A mirror image shielding structure is provided, which includes an electronic element and a ground shielding plane below the electronic element. The shape of the ground shielding plane is identical to the projection shape of the electronic element, and the horizontal size of the ground shielding plane is greater than or equal to that of the electronic element. Thus, the parasitic effect between the electronic element and the ground shielding plane is effectively reduced, and the vertical coupling effect between electronic elements is also reduced. Furthermore, the vertical impact on the signal integrity of the embedded elements caused by the layout of the transmission lines is prevented.

Abstract: A mirror image shielding structure is provided, which includes an electronic element and a ground shielding plane below the electronic element. The shape of the ground shielding plane is identical to the projection shape of the electronic element, and the horizontal size of the ground shielding plane is greater than or equal to that of the electronic element. Thus, the parasitic effect between the electronic element and the ground shielding plane is effectively reduced, and the vertical coupling effect between electronic elements is also reduced. Furthermore, the vertical impact on the signal integrity of the embedded elements caused by the layout of the transmission lines is prevented.

Abstract: A method is provided for testing a built-in component including multiple terminals in a multi-layered circuit board. At least one signal pad is provided on a top surface of the multi-layered circuit board for signal transmission. Each of the signal pads are electrically connected to one of the multiple terminals. At least one test pad is provided on the top surface of the multi-layered circuit board and each of the test pads is electrically connected to one of the multiple terminals. Then, detection occurs regarding one of the signal pads and one of the test pads that are electrically connected to a same one of the multiple terminals in order to determine a connection status of an electric path extending from the one signal pad through the same one terminal to the one test pad.

Abstract: A capacitor structure is provided. In the capacitor structure, a signal electrode plate and an extension ground electrode plate are disposed on the same plane to form a co-plane capacitor structure. Due to slow wave characteristic, the resonance frequency of the capacitor structure is effectively raised and the capacitor structure may be applied in high frequency.

Abstract: Embedded inductor devices and fabrication methods thereof. An embedded inductor device includes a substrate, a conductive coil disposed on the substrate, and a patterned high-permeability (?r>1) magnetic layer on the substrate. The patterned high-permeability (?r>1) magnetic layer physically contacts the conductive coil. The conductive coil and the patterned high-permeability (?r>1) magnetic layer are intersected and substantially perpendicular to each other.

Abstract: Embedded inductor devices and fabrication methods thereof. An embedded inductor device includes a substrate, a conductive coil disposed on the substrate, and a patterned high-permeability (?r>1) magnetic layer on the substrate. The patterned high-permeability (?r>1) magnetic layer physically contacts the conductive coil. The conductive coil and the patterned high-permeability (?r>1) magnetic layer are intersected and substantially perpendicular to each other.

Abstract: A capacitor structure with a cross-coupling design is provided. In the capacitor structure, conductive lines or electrode plates are coupled together by cross coupling an electrode above or below or aside the other electrode. By cross coupling and fewer vias, the largest capacitance value can be obtained within a minimum area. The capacitor structure provided can also be applied to a high-frequency high-speed module or system to enhance noise inhibition capability of a capacitive substrate.

Abstract: A multi-layered printed circuit board embedded with a filter, the multi-layered printed circuit board using a composite multi-layered printed circuit board formed of at least a high dielectric material stacked with at least a low dielectric material. A plurality of serial or parallel capacitors are disposed in the composite multi-layered printed circuit board so as to form a filter. At least one capacitor is an interdigital capacitor disposed on a low dielectric material. Metal electrodes of the interdigital capacitor are located on the same plane such that the area of the metal electrodes or the spacing between the metal electrodes can be adjusted in advance to precisely control the electrical properties such as the center frequency and the transmission loss of the filter. Problems resulting from alignment errors caused in manufacturing the composite multi-layered printed circuit board can also be prevented.

Abstract: A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.

Abstract: A meander inductor is disclosed, the inductor is disposed on a substrate or embedded therein. The meander inductor includes a conductive layer composed of a plurality of sinusoidal coils with different amplitudes and in series connection to each other, wherein the sinusoidal coils with different amplitudes are laid out according to a periphery outline. The profile of the meander inductor is designed according to an outer frame range available for accommodating the meander inductor and is formed by coils with different amplitudes. Therefore, under a same area condition, the present invention enables the Q factor and the resonant frequency fr of the novel inductor to be advanced, and further expands the applicable range of the inductor.

Abstract: Suspension inductor devices are provided. A suspension inductor device includes a dielectric substrate and a suspension induction coil. The suspension induction coil includes an input end disposed on the dielectric substrate. A spiral coil is wound from the dielectric substrate to an interconnection. The interconnection is disposed in the spiral coil and connects the input end and the spiral coil. An output end is disposed on the dielectric substrate and adjacent to the input end.

Abstract: A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.

Abstract: The invention is directed to inter-helix inductor devices. The inter-helix inductor device includes a dielectric substrate. An input end is disposed on the first surface of the dielectric substrate. A clockwise winding coil has one end connecting to the input end and at least one winding turn through the dielectric substrate. A counter clockwise winding coil includes at least one winding turn through the dielectric substrate, wherein the clockwise and counter clockwise winding coils are connected by an interconnection. An output end is disposed on the dielectric substrate, connects one end of the counter clockwise winding coil, and is adjacent to the input end.

Abstract: An interdigital capacitor includes a first finger electrode structure and a second finger electrode structure. The first finger electrode structure has a first electrode and a plurality of first extending electrodes. The first extending electrodes are linearly disposed and arranged. The second finger electrode structure has a second electrode and a plurality of second extending electrodes. The second extending electrodes are linearly disposed and arranged. The second finger electrode structure interlaces with the first finger electrode structure. At least one pair of first coupling electrodes extend respectively from the neighboring first and second extending electrodes and are disposed between them.

Abstract: The invention provides tunable embedded high frequency inductor devices. The inductor device comprises a dielectric substrate. A first conductive line is disposed on a first surface of the dielectric substrate. A second conductive line is disposed on a second surface of the dielectric substrate. An interconnection is disposed perforating the dielectric substrate and connecting the first conductive line with the second conductive line. A coupling region is defined between the first and the second conductive lines. A conductive plug connecting the first conductive line and the second line is disposed in the coupling region. Alternatively, an opening is disposed in the first and second conductive lines to tune inductance of the inductor.

Abstract: An embedded resistor device includes a resistor, a ground plane located near a first side of the resistor and electrically coupled to a first end of the resistor, at the ground plane a hole is provided, a first dielectric layer exists between the resistor and the ground plane, a conductive wire, which is electrically coupled to a second end of the resistor different from the first end of the resistor and partially surrounds the resistor, is used as an auxiliary for supporting a resistor-coating process of the resistor and to provide a terminal of the embedded resistor device at the conductive wire, a conductive region located near a second side of the ground plane different from the first side of the resistor, a second dielectric layer exists between the ground plane and the conductive region, and a conductive path to electrically couple the conductive wire to the conductive region through the hole.

Abstract: A resistor layout structure and a manufacture method thereof are provided. The resistor layout structure includes a substrate, a plurality of metals, and a plurality of resistor lumps. The plurality of metals is disposed on the substrate. The plurality of first resistor lumps is disposed on the substrate. The metals are used as a supporting structure during the disposing process. Besides, the metals are interlaced and connected in series connected with the resistor lumps to form the resistor. Therefore, the present invention decreases the resistance variability of the resistor.

Abstract: The present invention relates to an adjustable resistor embedded in a circuit board and a method of fabricating the same. The adjustable resistor comprises a resistor with a number of connection terminals, and a number of via holes extending to contact with the resistor. The resistive value of the resistor is variable depending on the size of the via holes, the number of the via holes, or the distance between the via holes.

Abstract: An inductor device comprising a first conductive pattern on a first layer of a substrate, a second conductive pattern on a second layer of the substrate, and a first region between the first layer and the second layer through which at least one hole is coupled between the first dielectric layer and the second dielectric layer, wherein a magnetic field induced by at least one of the first conductive pattern or the second conductive pattern at the first region is more intensive than that induced by at least one of the first conductive pattern or the second conductive pattern at a second region between the first conductive layer and the second conductive layer.

Abstract: Embedded inductor devices and fabrication methods thereof. An embedded inductor device includes a substrate, a conductive coil disposed on the substrate, and a patterned high-permeability (?r>1) magnetic layer on the substrate. The patterned high-permeability (?r>1) magnetic layer physically contacts the conductive coil. The conductive coil and the patterned high-permeability (?r>1) magnetic layer are intersected and substantially perpendicular to each other.