Patents by Inventor Ching-Sheng Cheng
Ching-Sheng Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136316Abstract: A semiconductor package includes a conductive pillar and a solder. The conductive pillar has a first sidewall and a second sidewall opposite to the first sidewall, wherein a height of the first sidewall is greater than a height of the second sidewall. The solder is disposed on and in direct contact with the conductive pillar, wherein the solder is hanging over the first sidewall and the second sidewall of conductive pillar.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chiang-Jui Chu, Ching-Wen Hsiao, Hao-Chun Liu, Ming-Da Cheng, Young-Hwa Wu, Tao-Sheng Chang
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Publication number: 20240071432Abstract: A memory device includes a resistor and a controller chip. The controller chip includes a first controller, a second controller, a first set of input/output (I/O) circuits, a second set of I/O circuits, a first calibration circuit, a second calibration circuit, and an arbitration circuit. The first controller transmits a first controller calibration request. The second controller transmits a second controller calibration request. The arbitration circuit instructs the first calibration circuit to perform a first controller calibration on the first set of I/O circuits using the resistor in response to the first controller calibration request, and instructs the second calibration circuit to perform a second controller calibration on the second set of I/O circuits using the resistor in response to the second controller calibration request. A first time interval of performing the first controller calibration and a second time interval of performing the second controller calibrations are non-overlapping.Type: ApplicationFiled: March 2, 2023Publication date: February 29, 2024Applicant: Realtek Semiconductor Corp.Inventors: Wen-Wei Lin, Ching-Sheng Cheng
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Patent number: 11886664Abstract: A touch display and a sensing method are provided. The touch display includes a substrate, a display array disposed on the substrate and having an upper layer which includes a shielding metal layer, a touch sensor disposed above the display array, and a controller coupled to the display array and the touch sensor. The controller is configured to enable the display array to display and obtain a first sensing result from the touch sensor during a first time interval, and disable the display array and obtain a second sensing result from the touch sensor during a second time interval. According to the first sensing result and the second sensing result, a touch determination result of whether the touch display receives a touch from a user is generated.Type: GrantFiled: December 28, 2022Date of Patent: January 30, 2024Assignee: AUO CorporationInventors: Chia-Hsien Chu, Chun-Chi Lai, Ching-Sheng Cheng
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Publication number: 20240015903Abstract: A display device includes a bezel annular in shape and a flexible display panel. The flexible display panel includes a display area annular in shape and a pin bonding area connected to the display area. The display area is disposed above the front side of the bezel. The pin bonding 5 area is bent from the front side of the bezel to the outer side of the bezel.Type: ApplicationFiled: November 28, 2022Publication date: January 11, 2024Applicant: AUO CorporationInventors: Chung Tan Lin, Hsu-Sheng Hsu, Ching-Sheng Cheng
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Patent number: 11783747Abstract: A display device includes readout line, first circuit, second circuit, and third circuit. Readout line includes first side and second side. First side is opposite to the second side. Each of first circuit, second circuit, and third circuit is coupled to readout line. Each of first circuit and third circuit is located at first side of readout line. First circuit resets according to first scan signal at first stage. Second circuit is located at second side of readout line. Second circuit and first circuit are arranged in dislocation manner. Second circuit reads first light sensing signal to output to readout line according to first scan signal at first stage. Third circuit and second circuit are arranged in dislocation manner, and third circuit is directly adjacent to first circuit. Third circuit senses light so as to generate second light sensing signal according to second scan signal at first stage.Type: GrantFiled: December 7, 2022Date of Patent: October 10, 2023Assignee: AUO CORPORATIONInventors: Po-Chun Lai, Ling-Ying Chien, Li-Wei Shih, Ching-Sheng Cheng, Chih-Lung Lin, Chia-Lun Lee
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Publication number: 20230306885Abstract: A display device includes readout line, first circuit, second circuit, and third circuit. Readout line includes first side and second side. First side is opposite to the second side. Each of first circuit, second circuit, and third circuit is coupled to readout line. Each of first circuit and third circuit is located at first side of readout line. First circuit resets according to first scan signal at first stage. Second circuit is located at second side of readout line. Second circuit and first circuit are arranged in dislocation manner. Second circuit reads first light sensing signal to output to readout line according to first scan signal at first stage. Third circuit and second circuit are arranged in dislocation manner, and third circuit is directly adjacent to first circuit. Third circuit senses light so as to generate second light sensing signal according to second scan signal at first stage.Type: ApplicationFiled: December 7, 2022Publication date: September 28, 2023Inventors: Po-Chun LAI, Ling-Ying CHIEN, Li-Wei SHIH, Ching-Sheng CHENG, Chih-Lung LIN, Chia-Lun LEE
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Publication number: 20230251741Abstract: The sensing circuit comprises a plurality of first transceiver capacitors and a plurality of second transceiver capacitors. The plurality of first transceiver capacitors are configured to send and receive a plurality of first detection signals. The plurality of second transceiver capacitors, configured to send and receive a plurality of second detection signals. During a self-capacitance mode, the plurality of first transceiver capacitors are configured to output the plurality of first detection signals and receive the plurality of first detection signals, and the plurality of second transceiver capacitors are configured to output the plurality of second detection signals and receive the plurality of second detection signals. During a mutual-capacitance mode, the plurality of first transceiver capacitors are configured to output the plurality of first detection signals, and the plurality of second transceiver capacitors are configured to receive the plurality of first detection signals.Type: ApplicationFiled: September 7, 2022Publication date: August 10, 2023Inventors: Chia-Hsien CHU, Chun-Chi LAI, Ching-Sheng CHENG
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Publication number: 20230236685Abstract: The disclosure provides an electronic device including a host control circuit, a display driving circuit, a touch driving circuit and a logic circuit. The host control circuit is configured to provide a first reset control signal. The display driving circuit is configured to reset according to the first reset control signal. The logic circuit is configured to generate a second reset control signal to the touch driving circuit according to the first reset control signal and an enable signal. During a sleep mode of the electronic device, the enable signal has a first logic level. In response to the enable signal at the first logic level, the logic circuit generates the second reset control signal at the first logic level. The touch driving circuit does not reset according to the second reset control signal at the first logic level.Type: ApplicationFiled: September 7, 2022Publication date: July 27, 2023Inventors: Chia-Hsien CHU, Chun-Chi LAI, Ching-Sheng CHENG
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Patent number: 11694743Abstract: A chip system includes a first chip, a first DRAM, a second chip and a second DRAM. The first chip includes a first DRAM controller and a first serial transmission interface. The first DRAM is coupled to the first DRAM controller. The second chip includes a second DTAM controller and a second serial transmission interface. The second serial transmission interface is coupled to the first serial transmission interface. The second DRAM is coupled to the second DRAM controller. When the first chip intends to store first data and second data, the first chip stores the first data into the first DRAM via the first DRAM controller, and transmits the second data to the second chip via the first serial transmission interface; and the second chip stores the second data into the second DRAM via the second DRAM controller.Type: GrantFiled: June 6, 2021Date of Patent: July 4, 2023Assignee: Realtek Semiconductor Corp.Inventor: Ching-Sheng Cheng
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Patent number: 11682351Abstract: A display device includes a display panel, a power integrated circuit, a comparison circuit and a selection circuit. The display panel is configured to receive a system cross voltage. The power integrated circuit is configured to provide the system cross voltage to the display panel and includes a current conversion circuit configured to convert a calibration current outputted by the display panel when displaying a calibration frame into a detection voltage. The comparison circuit is configured to compare the detection voltage with a threshold to generate a comparison result. The selection circuit is configured to determine a magnitude of the system cross voltage according to the comparison result. The power integrated circuit is configured to generate the system cross voltage according to the magnitude of the system cross voltage determined by the selection circuit to provide the system cross voltage to the display panel.Type: GrantFiled: July 12, 2022Date of Patent: June 20, 2023Assignee: AUO CORPORATIONInventors: Feng-Sheng Lin, Ching-Sheng Cheng, Ming-Ci Siao, Wei-Jen Chen, Chun-Chi Lai, Yi-Yo Dai
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Publication number: 20230136140Abstract: A display device includes a display panel, a power integrated circuit, a comparison circuit and a selection circuit. The display panel is configured to receive a system cross voltage. The power integrated circuit is configured to provide the system cross voltage to the display panel and includes a current conversion circuit configured to convert a calibration current outputted by the display panel when displaying a calibration frame into a detection voltage. The comparison circuit is configured to compare the detection voltage with a threshold to generate a comparison result. The selection circuit is configured to determine a magnitude of the system cross voltage according to the comparison result. The power integrated circuit is configured to generate the system cross voltage according to the magnitude of the system cross voltage determined by the selection circuit to provide the system cross voltage to the display panel.Type: ApplicationFiled: July 12, 2022Publication date: May 4, 2023Inventors: Feng-Sheng LIN, Ching-Sheng CHENG, Ming-Ci SIAO, Wei-Jen CHEN, Chun-Chi LAI, Yi-Yo DAI
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Patent number: 11481071Abstract: A touch display panel including a pixel defining layer, a first light emitting structure, a second light emitting structure, a first light sensing device and a touch electrode layer is provided. The pixel defining layer has a first pixel opening and a second pixel opening. The first light sensing device is adjacently disposed on a first side of the first pixel opening. A first edge defining a first electrode opening of the touch electrode layer and a second edge defining the first pixel opening of the pixel defining layer have a first spacing on the first side of the first pixel opening. A third edge defining a second electrode opening of the touch electrode layer and a fourth edge defining the second pixel opening of the pixel defining layer have a second spacing on a side of the second pixel opening. The first spacing is greater than the second spacing.Type: GrantFiled: November 10, 2021Date of Patent: October 25, 2022Assignee: Au Optronics CorporationInventors: Mao-Hsun Cheng, Chun-Cheng Hung, Kuang-Hsiang Liao, Ching-Sheng Cheng, Li-Wei Shih
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Patent number: 11428552Abstract: In an example implementation according to aspects of the present disclosure, a system includes a sensor device attachable to an electronic device. The sensor device includes a first alignment member and a first conductive contact. The electronic device includes a second alignment member to align with the first alignment member of the sensor device, and a second conductive contact wherein, upon alignment of the sensor device with the electronic device via the first and second alignment members, to make contact with the first conductive contact of the sensor device.Type: GrantFiled: April 25, 2019Date of Patent: August 30, 2022Assignee: Hewlett-Packard Development Company, L.P.Inventors: Ching-Sheng Cheng, Chia-Wen Weng
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Patent number: 11411729Abstract: A receiving circuit includes a first channel, a second channel, a third channel and a control circuit, wherein the first channel is arranged to decode and descramble a first data stream to generate first data corresponding to first color information of an image frame, the second channel is arranged to decode and descramble a second data stream to generate second data corresponding to second color information of the image frame, and the third channel is arranged to decode and descramble a third data stream to generate third data corresponding to third color information of the image frame. The control circuit is configured to enable the first channel to make the first channel decode the first data stream, and enable or disable at least part of functions of the second channel and the third channel according to whether or not the image frame is displayed on a display panel.Type: GrantFiled: March 1, 2020Date of Patent: August 9, 2022Assignee: Realtek Semiconductor Corp.Inventors: Kuan-Chia Huang, Tsung-Hsuan Wu, Ching-Sheng Cheng
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Patent number: 11403242Abstract: The present invention provides a control method of multiple memory devices, wherein the multiple devices comprise a first memory device and a second memory device, and the control method includes the steps of: determining a first operation timing and a second operation timing according to at least a first command signal that a first memory controller needs to send to the first memory device; controlling the first memory controller to send the first command signal to the first memory device at the first operation timing; and controlling the second memory controller to send the second command signal to the second memory device at the second operation timing.Type: GrantFiled: February 7, 2021Date of Patent: August 2, 2022Assignee: Realtek Semiconductor Corp.Inventors: Ching-Sheng Cheng, Wen-Wei Lin, Kuan-Chia Huang
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Publication number: 20220214758Abstract: A touch display panel including a pixel defining layer, a first light emitting structure, a second light emitting structure, a first light sensing device and a touch electrode layer is provided. The pixel defining layer has a first pixel opening and a second pixel opening. The first light sensing device is adjacently disposed on a first side of the first pixel opening. A first edge defining a first electrode opening of the touch electrode layer and a second edge defining the first pixel opening of the pixel defining layer have a first spacing on the first side of the first pixel opening. A third edge defining a second electrode opening of the touch electrode layer and a fourth edge defining the second pixel opening of the pixel defining layer have a second spacing on a side of the second pixel opening. The first spacing is greater than the second spacing.Type: ApplicationFiled: November 10, 2021Publication date: July 7, 2022Applicant: Au Optronics CorporationInventors: Mao-Hsun Cheng, Chun-Cheng Hung, Kuang-Hsiang Liao, Ching-Sheng Cheng, Li-Wei Shih
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Patent number: 11321232Abstract: A method for simultaneously accessing a first DRAM device and a second DRAM device includes the steps of: in an active phase, generating a first signal at a first pad, wherein the first signal is provided for the first DRAM device to select a first memory bank group, and the first signal is not for the second DRAM device to select any memory bank group; and generating a second signal at the first pad, wherein the second signal is provided for the first DRAM device to select the first bank group, and the second signal and the first signal correspond to a same digital value.Type: GrantFiled: April 23, 2020Date of Patent: May 3, 2022Assignee: Realtek Semiconductor Corp.Inventors: Wen-Wei Lin, Kuan-Chia Huang, Ching-Sheng Cheng
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Publication number: 20220113170Abstract: In an example implementation according to aspects of the present disclosure, a system includes a sensor device attachable to an electronic device. The sensor device includes a first alignment member and a first conductive contact. The electronic device Includes a second alignment member to align with the first alignment member of the sensor device, and a second conductive contact wherein, upon alignment of the sensor device with the electronic device via the first and second alignment members, to make contact with the first conductive contact of the sensor device.Type: ApplicationFiled: April 25, 2019Publication date: April 14, 2022Applicant: Hewlett-Packard Development Company, L.P.Inventors: Ching-Sheng Cheng, Chia-Wen Weng
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Publication number: 20220068344Abstract: A chip system includes a first chip, a first DRAM, a second chip and a second DRAM. The first chip includes a first DRAM controller and a first serial transmission interface. The first DRAM is coupled to the first DRAM controller. The second chip includes a second DRAM controller and a second serial transmission interface. The second serial transmission interface is coupled to the first serial transmission interface. The second DRAM is coupled to the second DRAM controller. When the first chip intends to store first data and second data, the first chip stores the first data into the first DRAM via the first DRAM controller, and transmits the second data to the second chip via the first serial transmission interface; and the second chip stores the second data into the second DRAM via the second DRAM controller.Type: ApplicationFiled: June 6, 2021Publication date: March 3, 2022Inventor: Ching-Sheng Cheng
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Patent number: 11217158Abstract: A pixel structure includes a light-emitting module, multiple sub-pixel circuits, and an internal driving circuit. The light-emitting module includes multiple sub-pixel light-emitting elements, and is disposed on a first plane. The multiple sub-pixel circuits are disposed on a second plane, and each of the multiple sub-pixel circuits is electrically connected with a corresponding one of the multiple sub-pixel light-emitting elements. The internal driving circuit is disposed on the second plane, and is electrically connected with one of the multiple sub-pixel circuits. The first plane is different from the second plane, and the multiple sub-pixel circuits and the internal driving circuit are located in a vertical projection projected by the light-emitting module onto the second plane.Type: GrantFiled: August 27, 2020Date of Patent: January 4, 2022Assignee: AU OPTRONICS CORPORATIONInventors: Mao-Hsun Cheng, Cheng-Han Huang, Ching-Sheng Cheng