Patents by Inventor Chiyu Zhu

Chiyu Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11139383
    Abstract: A process for depositing titanium aluminum or tantalum aluminum thin films comprising nitrogen on a substrate in a reaction space can include at least one deposition cycle. The deposition cycle can include alternately and sequentially contacting the substrate with a vapor phase Ti or Ta precursor and a vapor phase Al precursor. At least one of the vapor phase Ti or Ta precursor and the vapor phase Al precursor may contact the substrate in the presence of a vapor phase nitrogen precursor.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: October 5, 2021
    Assignee: ASM IP HOLDING B.V.
    Inventors: Suvi Haukka, Michael Givens, Eric Shero, Jerry Winkler, Petri Räisänen, Timo Asikainen, Chiyu Zhu, Jaakko Anttila
  • Patent number: 11114283
    Abstract: A reactor for processing substrates and methods for manufacturing and using the reactor are disclosed. Specifically, the reactor can include a material that forms gas compounds. The gas compounds are then easily removed from the reactor, thus reducing or avoiding contamination of the substrates in the reactor that would otherwise arise.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: September 7, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Tom Blomberg, Varun Sharma, Chiyu Zhu
  • Patent number: 11094582
    Abstract: A method for depositing a film to form an air gap within a semiconductor device is disclosed. An exemplary method comprises pulsing a metal halide precursor onto the substrate and pulsing an oxygen precursor onto a selective deposition surface. The method can be used to form an air gap to, for example, reduce a parasitic resistance of the semiconductor device.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: August 17, 2021
    Assignee: ASM IP Holding B.V.
    Inventor: Chiyu Zhu
  • Publication number: 20210233772
    Abstract: There is provided a method of selectively depositing a material on a substrate with a first and second surface, the first surface being different than the second surface. The depositing of the material on the substrate comprises: supplying a bulk precursor comprising metal atoms, halogen atoms and at least one additional atom not being a metal or halogen atom to the substrate; and supplying a reactant to the substrate. The bulk precursor and the reactant have a reaction with the first surface relative to the second surface to form more material on the first surface than on the second surface.
    Type: Application
    Filed: February 7, 2019
    Publication date: July 29, 2021
    Inventors: Chiyu Zhu, Henri Jussila, Qi Xie
  • Patent number: 11056344
    Abstract: There is provided a method of forming a layer, comprising depositing a seed layer on the substrate and depositing a bulk layer on the seed layer. Depositing the seed layer comprises supplying a first precursor comprising metal and halogen atoms to the substrate; and supplying a first reactant to the substrate. Depositing the bulk layer comprises supplying a second precursor comprising metal and halogen atoms to the seed layer and supplying a second reactant to the seed layer.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: July 6, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Chiyu Zhu, Kiran Shrestha, Qi Xie
  • Publication number: 20210193515
    Abstract: Systems and methods are described for depositing a TiN liner layer and a cobalt seed layer on a semiconductor wafer in a cobalt metallization process. In some embodiments the wafer is cooled after deposition of the TiN liner layer and/or the cobalt seed layer. In some embodiments the TiN liner layer and cobalt seed layer are deposited in process modules that are part of a semiconductor processing apparatus that also includes one or more modules for cooling the substrate. In some embodiments the cobalt seed layer may comprise a mixture of TiN and cobalt, a nanolaminate of TiN and cobalt layers or a graded TiN/Co layer.
    Type: Application
    Filed: December 3, 2020
    Publication date: June 24, 2021
    Inventors: Chiyu Zhu, Shinya Iwashita, Jan Willem Maes, Jiyeon Kim
  • Publication number: 20210151352
    Abstract: Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process are disclosed. The methods may include: providing a substrate comprising a dielectric surface into a reaction chamber; depositing a nucleation film directly on the dielectric surface; and depositing a molybdenum metal film directly on the nucleation film, wherein depositing the molybdenum metal film includes: contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor; and contacting the substrate with a second vapor phase reactant comprising a reducing agent precursor. Semiconductor device structures including a molybdenum metal film disposed over a surface of a dielectric material with an intermediate nucleation film are also disclosed.
    Type: Application
    Filed: January 18, 2021
    Publication date: May 20, 2021
    Inventors: Bhushan Zope, Kiran Shrestha, Shankar Swaminathan, Chiyu Zhu, Henri Tuomas Antero Jussila, Qi Xie
  • Publication number: 20210123128
    Abstract: There is disclosed apparatus and processes for the uniform controlled growth of materials on a substrate which direct a plurality of pulsed flows of a precursor into a reaction space of a reactor to deposit the thin film on the substrate. Each pulsed flow is a combination of a first pulsed subflow and a second pulsed subflow, wherein a pulse profile of the second pulsed subflow overlaps at least a portion of a latter half of a pulse profile of the first pulsed subflow.
    Type: Application
    Filed: October 23, 2020
    Publication date: April 29, 2021
    Inventor: Chiyu Zhu
  • Patent number: 10903113
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Grant
    Filed: January 27, 2020
    Date of Patent: January 26, 2021
    Assignee: ASM IP Holding B.V.
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen, Krzysztof Kachel, Harald Profijt
  • Patent number: 10851456
    Abstract: A method for depositing a metal film onto a substrate is disclosed. In particular, the method comprises pulsing a metal halide precursor onto the substrate and pulsing a decaborane precursor onto the substrate. A reaction between the metal halide precursor and the decaborane precursor forms a metal film, specifically a metal boride.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: December 1, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Chiyu Zhu, Kiran Shrestha, Suvi Haukka
  • Patent number: 10847361
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: November 24, 2020
    Assignee: ASM IP HOLDING B.V.
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen
  • Publication number: 20200343089
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Application
    Filed: February 11, 2020
    Publication date: October 29, 2020
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen
  • Publication number: 20200343358
    Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.
    Type: Application
    Filed: July 9, 2020
    Publication date: October 29, 2020
    Inventors: Chiyu Zhu, Kiran Shrestha, Petri Raisanen, Michael Eugene Givens
  • Publication number: 20200328285
    Abstract: A process for depositing titanium aluminum or tantalum aluminum thin films comprising nitrogen on a substrate in a reaction space can include at least one deposition cycle. The deposition cycle can include alternately and sequentially contacting the substrate with a vapor phase Ti or Ta precursor and a vapor phase Al precursor. At least one of the vapor phase Ti or Ta precursor and the vapor phase Al precursor may contact the substrate in the presence of a vapor phase nitrogen precursor.
    Type: Application
    Filed: April 15, 2020
    Publication date: October 15, 2020
    Inventors: Suvi Haukka, Michael Givens, Eric Shero, Jerry Winkler, Petri Räisänen, Timo Asikainen, Chiyu Zhu, Jaakko Anttila
  • Publication number: 20200308709
    Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.
    Type: Application
    Filed: May 22, 2020
    Publication date: October 1, 2020
    Inventors: Tom E. Blomberg, Varun Sharma, Suvi P. Haukka, Marko J. Tuominen, Chiyu Zhu
  • Publication number: 20200312620
    Abstract: Atomic layer etching (ALE) processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase non-metal halide reactant and a second vapor phase halide reactant. In some embodiments both the first and second reactants are chloride reactants. In some embodiments the first reactant is fluorinating gas and the second reactant is a chlorinating gas. In some embodiments a thermal ALE cycle is used in which the substrate is not contacted with a plasma reactant.
    Type: Application
    Filed: May 22, 2020
    Publication date: October 1, 2020
    Inventors: Tom E. Blomberg, Varun Sharma, Suvi Haukka, Marko Tuominen, Chiyu Zhu
  • Publication number: 20200308710
    Abstract: Thermal atomic layer etching processes are disclosed. In some embodiments, the methods comprise at least one etch cycle in which the substrate is alternately and sequentially exposed to a first vapor phase halide reactant and a second vapor halide reactant. In some embodiments, the first reactant may comprise an organic halide compound. During the thermal ALE cycle, the substrate is not contacted with a plasma reactant.
    Type: Application
    Filed: May 22, 2020
    Publication date: October 1, 2020
    Inventors: Tom E. Blomberg, Varun Sharma, Suvi Haukka, Marko Tuominen, Chiyu Zhu
  • Publication number: 20200263297
    Abstract: Vapor deposition processes such as atomic layer deposition (ALD) processes employing a deposition enhancing precursor can be used to form a variety of oxide and nitride films, including metal oxide, metal nitride, metal oxynitride, silicon oxide and silicon nitride films. For example, the methods can be used to deposit transition metal nitrides, transition metal oxides, and silicon oxides and nitrides. In some embodiments the deposition enhancing precursor comprises a Group II metal such as Mg, Sr, Ba or Ca. Atomic layer deposition processes may comprise a deposition cycle comprising a first sub-cycle in which a substrate is contacted with a deposition enhancing precursor and an oxygen or nitrogen reactant and a second sub-cycle in which the substrate is contacted with a metal or silicon precursor and an oxygen or nitrogen reactant. In some embodiments the methods advantageously enable improved thin film formation, for example increased deposition rates.
    Type: Application
    Filed: January 21, 2020
    Publication date: August 20, 2020
    Inventors: Henri Jussila, Chiyu Zhu, Qi Xie, Jiyeon Kim, Tom E. Blomberg
  • Publication number: 20200266096
    Abstract: Methods are provided for selectively depositing Al and N containing material on a first conductive surface of a substrate relative to a second, dielectric surface of the same substrate. In some aspects, methods of forming an Al and N containing protective layer or etch stop layer for use in integrated circuit fabrication are provided.
    Type: Application
    Filed: January 27, 2020
    Publication date: August 20, 2020
    Inventors: Han Wang, Qi Xie, Delphine Longrie, Jan Willem Maes, David de Roest, Julian Hsieh, Chiyu Zhu, Timo Asikainen, Krzysztof Kachel, Harald Profijt
  • Patent number: 10734497
    Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: August 4, 2020
    Assignee: ASM IP Holding B.V.
    Inventors: Chiyu Zhu, Kiran Shrestha, Petri Raisanen, Michael Eugene Givens