Patents by Inventor Christian Weis

Christian Weis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6275445
    Abstract: A memory has data lines through which data connections are connected to groups of memory cells via a synchronizing unit. The synchronizing unit is disposed adjacent to the cell group and has a clock input to which an internal clock signal is fed. In the event of a write access to the memory, the synchronizing unit synchronizes with the internal clock signal data signals that are fed via the data connections and are synchronous with an external clock signal.
    Type: Grant
    Filed: July 17, 2000
    Date of Patent: August 14, 2001
    Assignee: Infineon Technologies AG
    Inventors: Stefan Dietrich, Peter Schrögmeier, Torsten Partsch, Christian Weis
  • Patent number: 6272035
    Abstract: A memory has an input circuit, which is provided adjacent to two groups of memory cells and via which two global data lines are connected to two local data lines. The memory has two operating states during which it feeds the data provided on the global data lines in respective different assignments to the two local data lines.
    Type: Grant
    Filed: July 17, 2000
    Date of Patent: August 7, 2001
    Assignee: Infineon Technologies AG
    Inventors: Stefan Dietrich, Peter Schrögmeier, Torsten Partsch, Christian Weis
  • Patent number: 6256219
    Abstract: An integrated memory has first control lines, which run in the direction of bit lines, and a second control line, which runs in the direction of word lines. First control inputs of in each case at least two switching elements that are connected to different sense amplifiers are connected to the same first control line. The second control inputs of the switching elements are connected to the second control line. The invention makes it possible to reduce the number of first control lines running in the direction of the bit lines.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: July 3, 2001
    Assignee: Infineon Technologies AG
    Inventors: Peter Schrögmeier, Stefan Dietrich, Sabine Schöniger, Christian Weis