Abstract: A network switch is disclosed for resolving requests from a plurality of host initiators by scheduling access to a plurality of storage systems. The network switch comprises a plurality of multi-port switches interconnected to form a switched fabric, the multi-port switches for routing requests to the plurality of storage systems and for receiving scheduling data from each of the plurality of storage systems. The network switch further comprises a memory for storing the scheduling data, and a microprocessor, responsive to the scheduling data stored in the memory, for executing a scheduling algorithm to schedule the requests. The scheduling data is transferred automatically from each storage system to the memory through the multi-port switches without the microprocessor requesting the scheduling data from each storage system.

Abstract: A method for designing an integrated circuit includes selecting representations of integrated circuit components from a plurality of integrated circuit component representations, the representations suitable for being displayed on a display device. Connections are indicated between at least a portion of the selected representations of the integrated circuit components. An integrated circuit description is provided including the selected representations and the indicated connections between the representations, wherein the integrated circuit description includes data obtained from a database having characteristic data corresponding to the plurality of representations.

Abstract: The present invention is directed to an interactive representation of structural dependencies in semiconductor design flows. In an aspect of the present invention, a method for providing interactive representation of structural dependencies in a semiconductor design flow as implemented by an information handling system may include detecting a modified value of a parameter of the semiconductor design flow. At least one parameter dependent on the changed parameter is identified, the dependent parameter previously entered by a user.

Abstract: The present invention is directed to a scale-invariant topology and traffic allocation in multi-node system-on-chip switching fabrics. A method for allocating resources in a design of an integrated circuit may include receiving resource data for components of an integrated circuit. The resource data is suitable for indicating consumption by the components of at least one resource. Integrated circuit resources for the components of the integrated circuit are allocated according to a power law distribution as applied to the received resource data.

Abstract: The present invention is directed to a timing abstraction and partitioning strategy for integrated circuit design. A method for designing an integrated circuit may include monitoring user interaction with logical blocks during a function design process of an integrated circuit. Indications of timing properties are derived during the functional design process.

Abstract: The invention is directed to a method and associated device for storing stream and non-streaming data in common memory space of a data storage device. The method includes steps of organizing addressable locations of a data storage in a logical sequence, and initially storing streaming data by accessing the logical sequence of addressable locations in a first direction, and for storing non-streaming data by accessing the logical sequence of addressable locations in a second direction which is opposite the first direction.

Abstract: The present invention provides a comprehensive design environment defining a system architecture and methodology that may integrate interconnects, cores, ePLC, re-configurable processors and software into a manageable and predictable system designs that achieve on-time system IC design results meeting desired specifications and budgets. For example, an interscalable interconnect maybe provided that is scalable and isochronous capable. Additionally, an abstract language may be provided to be able to describe interconnecting core functions. Further, a self-programmable chip may be provided that, upon receiving a construct, it could program itself to achieve the desired functionality, such as through the use of on-chip knowledge and the like.

Abstract: The present invention is directed to extended instruction sets, compilers and platforms architectures. A system may include a plurality of platforms and a compiler operationally linked to the plurality of platforms. The platforms include sets of embedded instruction extensions selectable for implementation by a function of the platforms, the sets of embedded instruction extensions suitable for performing operations. The compiler is suitable for generating operational codes to invoke the sets of embedded instruction extensions of the platforms.

Abstract: The present invention is directed to a system and method for providing a collaborative integration of hybrid electronic and micro and sub-micro, including nano, level aggregates. A method of sampling aggregate nano behavior to determine progress by the nano aggregate toward a desired result may include sampling at least one of aggregate nano and aggregate micro behavior by a transducer. The aggregate behavior is measured through use of the sample by a macro level control apparatus. If the measured aggregate behavior is identified as diverging from progress toward a desired result, an effector is activated by the macro level control apparatus to influence the aggregate behavior toward progress toward the desired result.

Abstract: The present invention is directed to platform architecture. A system for providing distributed dynamic functionality in an electronic environment may include a plurality of platforms. The platforms are suitable for providing a logic function, and include embedded programmable logic, memory and a reconfigurable core. The logic, memory and reconfigurable core are communicatively coupled via a fabric interconnect. A map is also included which expresses logic functions of the plurality of platforms.

Abstract: This invention is directed to a method for processing file system service requests in a computer having an attached disk drive that in response to commands from the computer can write data to or read data from disk locations to reproduce stream data and non-stream data. The method comprises the steps of responding to a first file system service request by recording whether the first file system service request is for non-stream data or stream data, associating a first set of disk locations of the disk drive with the first file system service request, and preparing a first command that requires access to the first set of disk locations, the first command including control data categorizing the command as a non-stream access command or as a stream access command in response to the step of recording. The method includes transmitting the first command to the disk drive.

Abstract: The present invention is directed to magnetoresistive memory and data storage devices. A system for providing distributed functionality in an electronic environment includes a plurality of platforms suitable for providing a logic function. The platforms include embedded programmable logic, and MRAM memory, the logic and MRAM memory communicatively coupled via an interconnect.

Abstract: A multi-dimensional computer network is disclosed comprising a multi-dimensional network controller for interconnecting a plurality of computer devices, including a plurality of disk drives, communicating via a network protocol through a plurality of nodes, each node comprising more than two bi-directional ports for simultaneously transmitting data in multiple dimensions through the multi-dimensional computer network. At least one of the disk drives comprises a disk for storing data and an index mark, a spindle motor for rotating the disk, a head for reading the data and the index mark stored on the disk, an index mark detector for generating an index mark detect signal in response to the head reading the index mark, an interface for receiving a spindle sync signal from the multi-dimensional network controller through the network protocol, and a spindle synchronization circuit, responsive to the index mark detect signal, for synchronizing the rotation of the disk to the spindle sync signal.

Abstract: The present invention is directed to platform architecture. A system for providing distributed dynamic functionality in an electronic environment may include a plurality of platforms. The platforms are suitable for providing a logic function, and include embedded programmable logic, memory and a reconfigurable core. The logic, memory and reconfigurable core are communicatively coupled via a fabric interconnect. A map is also included which expresses logic functions of the plurality of platforms.

Abstract: The present invention is directed to a system and method for coevolutionary circuit design. A system suitable for providing integrated circuit design may include a memory suitable for storing a first set of instructions and a second set of instructions and a processor communicatively coupled to the memory. The processor is suitable for performing the first set of instructions and the second set of instructions. The first set of instructions is suitable for configuring a processor to provide an integrated circuit development environment in which a support methodology for an integrated circuit is created. The second set of instructions is suitable for configuring a processor to provide tools for implementing a platform architecture of an integrated circuit in which the platform architecture supplies a structure of the integrated circuit.

Abstract: The present invention is directed to a comprehensive design flow system. A system and method are provided that provide a comprehensive system to introduce a metamethodology that integrates EDA design tools into a manageable and predictable design flow. A method of designing an integrated circuit may include accessing a design utility operating on an information handling system, displaying a dynamic template on a display device of an information handling system, wherein the dynamic template implements at least two symbols displayable on a display device, in which the at least two symbols each correspond to a respective EDA tool, and arranging the at least two symbols displayed on the display device. The at least two symbols are arranged to indicate an interrelationship of the EDA tools in a design process of an integrated circuit.

Abstract: A disk-based storage system for storing a plurality of data segments responds to a direction-selection signal by autonomously providing the data segments in a selected sequence so as to be concatenated together to define a continuous data stream. The disk-based storage system comprises nonvolatile storage including rotating disk media having a plurality of addressable locations. Each of the data segments is stored in a respective one of the addressable locations. Each of the addressable locations has a leading end and a trailing end. A first one of the addressable locations has a trailing end on a first track, and a second one of the addressable locations has a leading end on a second track, the second track being spaced from the first track. The non-volatile storage provides for locally storing a doubly-linked list of pointers.

Abstract: The present invention is directed to a disk drive which can assert control over the information content supplied in response to a read request from the host by performing a selective translation of addresses received from the host. The disk drive can include hardware, firmware, or a combination thereof, to unambiguously detect a command block to read a predetermined location on the drive. The drive, upon detecting occurrence of a predetermined address included in the command block, translates the address to initiate a read from an alternate, substitute location information stored at the substitute location is returned to the requesting host in satisfaction of the host's request. The information can be blocks of data, such as audio/video data, or can be executable code including, but not limited to, code used to boot a substitute operating system stored at a location known only to the drive.

Abstract: A method and apparatus for operating a computer system at the interrupt level. Rather than having a primary task list that is interrupted to service interrupts, all tasks derive from interrupts. To this end, interrupt-time data structures and representations are precomputed and represented. The taxonomy of real time data types is organized. It is preferable to include isochronous media, together with supporting algorithms and heuristics.

Abstract: A signal distribution system having a converter with input terminals for receiving signals of varying configurations and an output terminal for transmitting converted signals. The input signals received by the converter are each converted into a converted signal frequency component of a common bus signal, which is then transmitted by the converter. The converter output terminal transmits the common bus signal on a communication bus. The communication bus is coupled to at least one interface pod for receiving the common bus signal and re-transmitting a desired converted signal.