Abstract: A channel all-around semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a plurality of gate structures and a multi-connected channel layer. The gate structures have the same extension direction, and each of the gate structures has opposite first end and second end. The gate structures are all surrounded by the multi-connected channel layer, and the plane direction of the multi-connected channel layer is perpendicular to the above extension direction, so that the channels of the gate structures are connected to each other.

Abstract: A circuit structure including a first gate structure, a first multi-connected channel layer and a second transistor is provided. The first gate structure has a first extension direction, and the first gate structure has a first end and a second end opposite to each other. The first gate structure is fully surrounded by the first multi-connected channel layer, and a plane direction of the multi-connected channel layer is perpendicular to the first extension direction. The first gate structure and the first multi-connected channel layer form a first transistor. The second transistor is disposed in the first multi-connected channel layer. A second gate structure or a channel of the second transistor is electrical connected to the first multi-connected channel layer.

Abstract: A MOSFET includes a substrate, a trench, a bottom oxide, a shield poly, two gate polys and an inter-poly oxide. The trench is formed on the substrate. The bottom oxide is formed on the trench. The shield poly is formed on the trench, and a part of the bottom oxide is separated by the shield poly. The two gate polys are formed on the bottom oxide. The inter-poly oxide is formed between the two gate polys. The shield poly is staggered from at least one of the two gate polys in a horizontal direction and a vertical direction. Therefore, the capacitance between a source electrode and a gate electrode is effectively reduced, and the delay time during switching is shorten and the energy loss is reduced at the same time.

Abstract: The present invention provides a metal-oxide-metal (MOM) capacitor including a first metal layer and a second metal layer. The first metal layer includes a plurality of first metal stripes and second metal stripes extending along a first direction and a plurality of first metal jogs and second metal jogs extending along a second direction. Each of the first metal jogs is connected to one of the first metal stripes and each of the second metal jogs is connected to one of the second metal stripes. The second metal layer includes a plurality of third metal stripes and fourth metal stripes extending along the first direction and includes a plurality of third metal jogs and fourth metal jogs. Each of the third metal jogs is connected to one of the third metal stripes and each of the fourth metal jogs is connected to one of the fourth metal stripes.

Abstract: The present invention provides a metal-oxide-metal (MOM) capacitor including a first metal layer and a second metal layer. The first metal layer includes a plurality of first metal stripes and second metal stripes extending along a first direction and a plurality of first metal jogs and second metal jogs extending along a second direction. Each of the first metal jogs is connected to one of the first metal stripes and each of the second metal jogs is connected to one of the second metal stripes. The second metal layer includes a plurality of third metal stripes and fourth metal stripes extending along the first direction and includes a plurality of third metal jogs and fourth metal jogs. Each of the third metal jogs is connected to one of the third metal stripes and each of the fourth metal jogs is connected to one of the fourth metal stripes.

Abstract: A circuit allowing self-recovery of an operating system (OS) includes a PCH chip, a switch chip, a first ROM, a second ROM, a connector, and a storage unit. The switch chip, the second ROM, and the connector are coupled to the PCH chip. The first ROM is coupled to the PCH chip through the switch chip. The second ROM controls the PCH chip to output a signal according to the state of the operating system. The first ROM stores a backup the operating system. The switch chip receives control signal from the PCH chip, and controls whether the first ROM communicates with the PCH chip, to allow recovery of the entire or part of the OS in the event that repair is required.

Abstract: A warning circuit is configured to output a warning in response to an integrated graphics card unit being coupled to a display screen and a discrete graphics card being coupled to a first connector. The first connector is configured to output a coupling signal in response to the discrete graphics card being coupled to the first connector. The integrated graphics card unit is configured to output a control signal in response to the integrated graphics card unit being coupled to the display screen. The warning circuit includes a controller that controls the discrete graphics card to convert display data to drive the display screen in response to receiving the coupling signal. The warning circuit is configured to output the warning in response to receiving the control signal and the coupling signal.

Abstract: A main board slot power control circuit will select a lowest priority interface card from a plurality of interface cards to reduce operation frequency, when the system power consumption is found to be too large. The main board slot power control circuit includes a power supply module, a control module, and a plurality of slots. The plurality of interface cards is plugged into the plurality of slots. The control module applies different priorities to the plurality of interface cards. The power supply module detects and determines when the system power consumption is greater than a predetermined value, and the power supply module outputs a control signal to the control module accordingly. The control module selects the lowest priority interface card to reduce operation frequency according to the control signal, and then the next lowest and so on until power consumption is found to be sufficiently reduced.

Abstract: A main board slot power control circuit will select a lowest priority interface card from a plurality of interface cards to reduce operation frequency, when the system power consumption is found to be too large. The main board slot power control circuit includes a power supply module, a control module, and a plurality of slots. The plurality of interface cards is plugged into the plurality of slots. The control module applies different priorities to the plurality of interface cards. The power supply module detects and determines when the system power consumption is greater than a predetermined value, and the power supply module outputs a control signal to the control module accordingly. The control module selects the lowest priority interface card to reduce operation frequency according to the control signal, and then the next lowest and so on until power consumption is found to be sufficiently reduced.

Abstract: A circuit allowing self-recovery of an operating system (OS) includes a PCH chip, a switch chip, a first ROM, a second ROM, a connector, and a storage unit. The switch chip, the second ROM, and the connector are coupled to the PCH chip. The first ROM is coupled to the PCH chip through the switch chip. The second ROM controls the PCH chip to output a signal according to the state of the operating system. The first ROM stores a backup the operating system. The switch chip receives control signal from the PCH chip, and controls whether the first ROM communicates with the PCH chip, to allow recovery of the entire or part of the OS in the event that repair is required.

Abstract: A warning circuit is configured to output a warning in response to an integrated graphics card unit being coupled to a display screen and a discrete graphics card being coupled to a first connector. The first connector is configured to output a coupling signal in response to the discrete graphics card being coupled to the first connector. The integrated graphics card unit is configured to output a control signal in response to the integrated graphics card unit being coupled to the display screen. The warning circuit includes a controller that controls the discrete graphics card to convert display data to drive the display screen in response to receiving the coupling signal. The warning circuit is configured to output the warning in response to receiving the control signal and the coupling signal.

Abstract: An interface control circuit to apply a compatible voltage for a USB device upon connection includes a USB connector, a controlling module, and a switching module. The USB connector outputs the plug signal when connected to the USB device. The controlling module outputs a power supply signal when the plug signal is received. The switching module outputs a power supply drive signal when the power supply signal is received.

Abstract: A heating apparatus includes a power source, a heating unit, and a control unit. The control unit includes a transistor and a thermal resistor. The transistor is connected between the power source and the heating unit to control the power source to provide power to the heating unit. The thermal resistor is connected to the transistor. A resistance value of the thermal resistor changes along with ambient temperature to turn on or off the transistor to control the power source to provide power to the heating unit according the ambient temperature.

Abstract: A management method of a hybrid storage unit and an electronic apparatus of the hybrid storage unit are provided. The electronic apparatus includes a hybrid storage unit. The hybrid storage unit includes a first storage unit and a second storage unit. The second storage unit includes a first storage area and a second storage area. If a relationship between the electronic apparatus and an external apparatus is detected as being an undocked relationship, the first storage unit is disabled by a controller of the hybrid storage unit, and the second storage area serves to simulate and replace the first storage unit. The controller reports a storage unit status change notification to an operating system, so as to allow the operating system to re-enumerate the hybrid storage unit.

Abstract: A power control system allowing multiple voltage levels from a single power adaptor includes a power supply device and an electronic device. The power supply device includes a power supply and a first power controller. The power supply is configured to supply power for a graphics card as an external renderer, and the first power controller is configured to output a voltage signal. The electronic device includes a second power controller electrically coupled to the first power controller and the second power controller is configured for obtaining the voltage signal from the first power controller. The first power controller can output a first voltage or a second voltage to the second power controller to supply power for the electronic device.

Abstract: A wake up system for electronic device includes a detecting circuit, an amplifier circuit, a switch circuit, and a south bridge chip. The detecting circuit detects an ambient temperature change as a result of the physical proximity of a user, converts the temperature change to a weak voltage signal, and amplifies the voltage signal for the first time. The amplifier circuit receives the amplified voltage signal and amplifies the voltage signal for the second time. The switch circuit receives the voltage signal that is amplified for the second time, and outputs a wake up signal when the voltage signal amplified for the second time is greater than a turn-on voltage. The south bridge chip receives the wake up signal, and wakes up the electronic device accordingly.

Abstract: A power control system allowing multiple voltage levels from a single power adaptor includes a power supply device and an electronic device. The power supply device includes a power supply and a first power controller. The power supply is configured to supply power for a graphics card as an external renderer, and the first power controller is configured to output a voltage signal. The electronic device includes a second power controller electrically coupled to the first power controller and the second power controller is configured for obtaining the voltage signal from the first power controller. The first power controller can output a first voltage or a second voltage to the second power controller to supply power for the electronic device.

Abstract: A riser card includes a main body and an inserting portion. The main body includes a lower portion and defines a power supply interface. The inserting portion is coupled to the lower portion of the main body. The inserting portion can be inserted in and coupled to different expansion slots. The power supply interface can be coupled to an external power source to supply power to the riser card.

Abstract: A discharge circuit applied in a motherboard includes a platform controller hub (PCH), a first electronic switch, a second electronic switch, and first capacitor. A control terminal of the first electronic switch is coupled to a standby pin of the PCH. A second terminal of the first electronic switch is coupled to the standby power. A control terminal of the second electronic switch is coupled to the second terminal of the first electronic switch. A second terminal of the second electronic switch is coupled to a first power source through a resistor coupled with a capacitor in parallel. The standby pin of the PCH outputs a digital low signal, to control the first electronic switch is turned off rapidly, and the second electronic switch is turned on. A voltage of the first power source is discharged through the resistor rapidly.

Abstract: Motherboard voltage testing device includes a power supply module for supplying a DC voltage, an illuminating module, and a switching module for detecting a DC voltage of a motherboard. A first terminal of the switching module is coupled to the power supply module, and a second opposite terminal of the switching module is coupled to the illuminating module. When the switching module detects the DC voltage of the motherboard is in the motherboard, the illuminating module is configured to receive the DC voltage of the power supply module to emit light, and when the switching module detects there is no remaining DC voltage on the motherboard, the illuminating module cannot receive the DC voltage from the motherboard and the illuminating module is power off and does not emit light.