Abstract: An apparatus for electromagnetic interference shielding is described herein. The apparatus includes an electromagnetic bandgap (EBG) structure. The EBG structure is attached to a surface of the apparatus such that noise propagation is mitigated. The apparatus may be a chassis of an electronic device, and the EBG structure may be attached to one surface of the chassis. Further, the apparatus may be a heat sink, and the EBG structure can be attached to one surface of the heat sink.

Abstract: Techniques and mechanisms for interconnecting circuitry disposed on a transparent substrate. In an embodiment, a multilayer circuit is bonded to the transparent substrate, the multilayer circuit including conductive traces that are variously offset at different respective levels from a side of the transparent substrate. Circuit components, such as packaged or unpackaged integrated circuit devices, are coupled each to respective input and/or output (IO) contacts of the multilayer circuit, where the conductive traces and the IO contacts interconnect the circuit components with each other. In another embodiment, the multilayer circuit is a flexible circuit that is bent to interconnect circuit components which are disposed on opposite respective sides of the transparent substrate.

Abstract: A read only memory (ROM) is provided in the present invention, which includes a plurality of bit lines extending in a first direction, a plurality of source lines extending in parallel to the plurality of bit lines, and a plurality of word lines extending in a second direction perpendicular to the first direction. Each two ROM cells share an active area and are electrically coupled to one of the plurality of source lines by a common source line contact.

Abstract: An apparatus is provided which comprises: an oscillator circuit to generate a clock signal and transmit the clock signal over a signal line; a ground reference plane associated with the signal line; and one or more patterns formed in the ground reference plane, wherein the one or more patterns in the ground reference plane is to filter out noise from the clock signal transmitted over the signal line.

Abstract: Apparatus and method to provide integrated circuit (IC) package integrity without adverse performance degradation are disclosed herein. In some embodiments, an apparatus may include one or more integrated circuits (ICs); a metallic structure that encircles the one or more ICs without being in contact with the one or more ICs, wherein the metallic structure is without an electrical ground; and a conductive epoxy layer disposed below and in contact with the metallic structure, wherein the conductive epoxy is to reduce an electromagnetic field induced by the metallic structure in response to a presence of a wireless signal that operates at approximately a resonant frequency associated with the metallic structure.

Abstract: Techniques and mechanisms for interconnecting circuitry disposed on a transparent substrate. In an embodiment, a multilayer circuit is bonded to the transparent substrate, the multilayer circuit including conductive traces that are variously offset at different respective levels from a side of the transparent substrate. Circuit components, such as packaged or unpackaged integrated circuit devices, are coupled each to respective input and/or output (IO) contacts of the multilayer circuit, where the conductive traces and the IO contacts interconnect the circuit components with each other. In another embodiment, the multilayer circuit is a flexible circuit that is bent to interconnect circuit components which are disposed on opposite respective sides of the transparent substrate.

Abstract: Techniques and mechanisms for exchanging image data via a three-wire data channel of an interconnect, at least a portion of which is disposed in or on a substrate of a printed circuit board. In an embodiment, three data signals are concurrently exchanged in parallel, each via a different respective trace portion of the data channel. The substrate has disposed therein or thereon three filter structures each to perform filtering of a different respective one of the three signals. The filter structures each include a respective sequence of corrugations to increase a stray capacitance provided by a substrate material. In another embodiment, the interconnect is compatible with a Mobile Industry Processor Interface (MIPI) camera physical layer interface (C-PHY) standard.

Abstract: A chassis for an electronic device may include a first metal layer to form an inner surface of the chassis, an insulating layer on the first metal layer, and a second metal layer on the insulating layer. The second metal layer may be connected to a ground area of a circuit board to be provided in the chassis.

Abstract: Techniques for routing signal traces in a circuit board are described. An example of an electronic device in accordance with the described techniques includes a circuit board comprising a plurality of conductive layers. The conductive layers include a signal layer and a reference plane. The signal layer includes signal traces and the reference plane includes an additional signal trace.

Abstract: Techniques for routing signal traces in a circuit board are described. An example of an electronic device in accordance with the described techniques includes a circuit board comprising a plurality of conductive layers. The conductive layers include a signal layer and a reference plane. The signal layer includes signal traces and the reference plane includes an additional signal trace.

Abstract: Techniques for signal grounding are described herein. The techniques include a conductive element conductively coupled to an exposed ground pad of a circuit board. The conductive element is to conductively couple to a shield of a signaling link, and thereby conductively coupling the shield to the exposed ground pad.

Abstract: A chassis for an electronic device may include a first metal layer to form an inner surface of the chassis, an insulating layer on the first metal layer, and a second metal layer on the insulating layer. The second metal layer may be connected to a ground area of a circuit board to be provided in the chassis.

Abstract: A low voltage bandgap reference circuit includes a positive temperature coefficient circuit unit, a negative temperature coefficient circuit unit and a load unit, wherein the positive temperature coefficient circuit unit comprises a first differential operational amplifier, a first, second and third transistor, a first resistor, a first and second diode, and the negative temperature coefficient circuit unit includes a second differential operational amplifier, a fourth, fifth and sixth transistor, a second resistor and a third diode. The low voltage bandgap reference circuit provides a current having a positive temperature coefficient characteristics and a current having a negative temperature coefficient characteristics to flow through the load in order to generate a stable reference voltage less affected by the temperature. Therefore, it avoids the problems of the low voltage bandgap reference circuit that can not be activated at low voltage.

Abstract: A low voltage bandgap reference circuit includes a positive temperature coefficient circuit unit, a negative temperature coefficient circuit unit and a load unit, wherein the positive temperature coefficient circuit unit comprises a first differential operational amplifier, a first, second and third transistor, a first resistor, a first and second diode, and the negative temperature coefficient circuit unit includes a second differential operational amplifier, a fourth, fifth and sixth transistor, a second resistor and a third diode. The low voltage bandgap reference circuit provides a current having a positive temperature coefficient characteristics and a current having a negative temperature coefficient characteristics to flow through the load unit, whereby generate a stable reference voltage thereon, which the stable reference voltage is less affected by the temperature. Therefore, it avoids the problems of the low voltage bandgap reference circuit can not be activated at low voltage.

Abstract: A light emitting module includes a circuit board, a reflective layer, at least one light emitting chip and at least one metal wire. The circuit board has at least one connecting pad. The reflective layer is disposed on the circuit board and has at least one first opening exposing the connecting pad and at least one second opening exposing the circuit board. The light emitting chip is located in the second opening. The metal wire has a first end portion connecting to the connecting pad and a second end portion extending from the first end portion and crossing above the reflective layer and electrically connecting to the light emitting chip in the second opening. Consequently, the reflective layer can extend close to the light emitting chip and maximize the covered area of the reflective layer, and thus increase the light emitting efficiency of the light emitting module.

Abstract: Transflective liquid crystal displays and fabrication methods thereof. A single gap transflective liquid crystal display includes a first substrate with a reflective region and a transmissive region. A second substrate opposes the first substrate with a gap therebetween. A liquid crystal layer is disposed between the first and second substrates. A color filter is disposed on the first substrate, wherein the color filter is thicker in the transmissive region than in the reflective region, wherein a recess is formed at the reflective region. A first alignment layer is conformably formed on the color filter, forming a second recess in the reflective region. The second recess is filled with a second alignment, wherein the first and second alignment layers provide different orientations and pre-tilt angles for the liquid crystal layer.

Abstract: A method of manufacturing a display panel and a display panel are described. A first substrate is provided. A wall structure is formed on the first substrate to define several microcups. A displaying medium is filled into the microcups. Thereafter, a sealing material is formed over the microcups filled with the displaying medium. A second substrate is put over the sealing material and a lamination process is performed, wherein the sealing material which contacts the wall structure bonds the second substrate to the wall structure, and the sealing material which contacts the displaying medium dissolves in the displaying medium.

Abstract: Substrate structures for liquid crystal display devices and methods of fabricating liquid crystal display devices. A substrate structure for the liquid crystal display device comprises a transparent substrate. A patterned protrusion structure is formed to divide a plurality of pixel regions. An alignment layer is filled on the transparent substrate of each pixel region, wherein alignment orientations of liquid crystal molecules on the patterned protrusion structure and on the alignment layer are different.

Abstract: A method of manufacturing a display panel and a display panel are described. A first substrate is provided. A wall structure is formed on the first substrate to define several microcups. A displaying medium is filled into the microcups. Thereafter, a sealing material is formed over the microcups filled with the displaying medium. A second substrate is put over the sealing material and a lamination process is performed, wherein the sealing material which contacts the wall structure bonds the second substrate to the wall structure, and the sealing material which contacts the displaying medium dissolves in the displaying medium.

Abstract: Transflective liquid crystal displays and fabrication methods thereof. A single gap transflective liquid crystal display includes a first substrate with a reflective region and a transmissive region. A second substrate opposes the first substrate with a gap therebetween. A liquid crystal layer is disposed between the first and second substrates. A color filter is disposed on the first substrate, wherein the color filter is thicker in the transmissive region than in the reflective region, wherein a recess is formed at the reflective region. A first alignment layer is conformably formed on the color filter, forming a second recess in the reflective region. The second recess is filled with a second alignment, wherein the first and second alignment layers provide different orientations and pre-tilt angles for the liquid crystal layer.