Patents by Inventor Chung-Hsuan Tsai

Chung-Hsuan Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11233020
    Abstract: A semiconductor package device includes: (1) a die having an active surface, a back surface opposite to the active surface and a lateral surface extending between the active surface and the back surface; (2) a first conductive pillar disposed on the active surface of the die and electrically connected to the die, the first conductive pillar having a top surface facing away from the die and a lateral surface substantially perpendicular to the top surface of the first conductive pillar; (3) a dielectric layer disposed on the active surface of the die and fully covering the lateral surface of the first conductive pillar; and (4) a package body encapsulating the back surface and the lateral surface of the die.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: January 25, 2022
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chung-Hsuan Tsai
  • Patent number: 11139577
    Abstract: A wireless electronic device includes a ground plane, a first antenna element, a first extension element, a first switching element and a plurality of impedance elements. The ground plane includes a first edge and a second edge opposite to each other. The first antenna element is adjacent to the first edge. The first extension element is adjacent to the second edge. The first switching element is electrically connected to the first extension element. The plurality of impedance elements are electrically connected between the first switching element and a ground. The first switching element connects the first extension element to one of the plurality of impedance elements in response to an operation frequency band of the first antenna element.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: October 5, 2021
    Assignee: Acer Incorporated
    Inventors: Yung-Sheng Tseng, Huei-Chun Yang, Chung-Hsuan Tsai
  • Publication number: 20210272866
    Abstract: The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ya-Yu HSIEH, Chin-Li KAO, Chung-Hsuan TSAI, Chia-Pin CHEN
  • Patent number: 11011444
    Abstract: The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: May 18, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Ya-Yu Hsieh, Chin-Li Kao, Chung-Hsuan Tsai, Chia-Pin Chen
  • Publication number: 20210050273
    Abstract: The present disclosure provides a semiconductor package structure having a semiconductor die having an active surface, a conductive bump on the active surface, configured to electrically couple the semiconductor die to an external circuit, the conductive bump having a bump height, a dielectric encapsulating the semiconductor die and the conductive bump, and a plurality of fillers in the dielectric, each of the fillers comprising a diameter, wherein a maximum diameter of the fillers is smaller than the bump height.
    Type: Application
    Filed: August 14, 2019
    Publication date: February 18, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Ya-Yu HSIEH, Chin-Li KAO, Chung-Hsuan TSAI, Chia-Pin CHEN
  • Patent number: 10418299
    Abstract: A semiconductor device includes a first die including a first pad and a first passivation layer, a second die including a second pad and a second passivation layer, and an encapsulant surrounding the first die and the second die. Surfaces of the first die are not coplanar with corresponding surfaces of the second die. A dielectric layer covers at least portions of the first passivation layer and the second passivation layer, and further covers the encapsulant between the first die and the second die. The encapsulant has a first surface. The dielectric layer has a second surface adjacent to the first passivation layer, the second passivation layer and the encapsulant, and further has a third surface opposite the second surface. The semiconductor device further includes a redistribution layer electrically connected to the first pad and the second pad and disposed above the third surface of the dielectric layer.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: September 17, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chung-Hsuan Tsai, Chuehan Hsieh
  • Publication number: 20190267341
    Abstract: A semiconductor package device includes: (1) a die having an active surface, a back surface opposite to the active surface and a lateral surface extending between the active surface and the back surface; (2) a first conductive pillar disposed on the active surface of the die and electrically connected to the die, the first conductive pillar having a top surface facing away from the die and a lateral surface substantially perpendicular to the top surface of the first conductive pillar; (3) a dielectric layer disposed on the active surface of the die and fully covering the lateral surface of the first conductive pillar; and (4) a package body encapsulating the back surface and the lateral surface of the die.
    Type: Application
    Filed: May 15, 2019
    Publication date: August 29, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chung-Hsuan TSAI
  • Patent number: 10325868
    Abstract: A semiconductor package device comprises a die, a dielectric layer, a plurality of conductive pillars and a package body. The die has an active surface, a back surface opposite to the active surface and a lateral surface extending between the active surface and the back surface. The dielectric layer is on the active surface of die, has a top surface and defines a plurality of openings. Each conductive pillar is disposed in a corresponding opening of the plurality of openings of the dielectric layer. Each conductive pillar is electrically connected to the die. Each conductive pillar has a top surface. The top surface of each conductive pillar is lower than the top surface of the dielectric layer. The package body encapsulates the back surface and the lateral surface of the die.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: June 18, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Chung-Hsuan Tsai
  • Publication number: 20190173188
    Abstract: A wireless electronic device includes a ground plane, a first antenna element, a first extension element, a first switching element and a plurality of impedance elements. The ground plane includes a first edge and a second edge opposite to each other. The first antenna element is adjacent to the first edge. The first extension element is adjacent to the second edge. The first switching element is electrically connected to the first extension element. The plurality of impedance elements are electrically connected between the first switching element and a ground. The first switching element connects the first extension element to one of the plurality of impedance elements in response to an operation frequency band of the first antenna element.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 6, 2019
    Applicant: Acer Incorporated
    Inventors: Yung-Sheng Tseng, Huei-Chun Yang, Chung-Hsuan Tsai
  • Publication number: 20180308811
    Abstract: A semiconductor package device comprises a die, a dielectric layer, a plurality of conductive pillars and a package body. The die has an active surface, a back surface opposite to the active surface and a lateral surface extending between the active surface and the back surface. The dielectric layer is on the active surface of die, has a top surface and defines a plurality of openings. Each conductive pillar is disposed in a corresponding opening of the plurality of openings of the dielectric layer. Each conductive pillar is electrically connected to the die. Each conductive pillar has a top surface. The top surface of each conductive pillar is lower than the top surface of the dielectric layer. The package body encapsulates the back surface and the lateral surface of the die.
    Type: Application
    Filed: April 24, 2017
    Publication date: October 25, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Chung-Hsuan TSAI
  • Publication number: 20170287738
    Abstract: A semiconductor device includes a first die including a first pad and a first passivation layer, a second die including a second pad and a second passivation layer, and an encapsulant surrounding the first die and the second die. Surfaces of the first die are not coplanar with corresponding surfaces of the second die. A dielectric layer covers at least portions of the first passivation layer and the second passivation layer, and further covers the encapsulant between the first die and the second die. The encapsulant has a first surface. The dielectric layer has a second surface adjacent to the first passivation layer, the second passivation layer and the encapsulant, and further has a third surface opposite the second surface. The semiconductor device further includes a redistribution layer electrically connected to the first pad and the second pad and disposed above the third surface of the dielectric layer.
    Type: Application
    Filed: June 20, 2017
    Publication date: October 5, 2017
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chung-Hsuan TSAI, Chuehan HSIEH
  • Patent number: 9711426
    Abstract: A semiconductor device includes a first die including a first pad and a first passivation layer, a second die including a second pad and a second passivation layer, and an encapsulant surrounding the first die and the second die. Surfaces of the first die are not coplanar with corresponding surfaces of the second die. A dielectric layer covers at least portions of the first passivation layer and the second passivation layer, and further covers the encapsulant between the first die and the second die. The encapsulant has a first surface. The dielectric layer has a second surface adjacent to the first passivation layer, the second passivation layer and the encapsulant, and further has a third surface opposite the second surface. The semiconductor device further includes a redistribution layer electrically connected to the first pad and the second pad and disposed above the third surface of the dielectric layer.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: July 18, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chung-Hsuan Tsai, Chuehan Hsieh
  • Publication number: 20170025322
    Abstract: A semiconductor device includes a first die including a first pad and a first passivation layer, a second die including a second pad and a second passivation layer, and an encapsulant surrounding the first die and the second die. Surfaces of the first die are not coplanar with corresponding surfaces of the second die. A dielectric layer covers at least portions of the first passivation layer and the second passivation layer, and further covers the encapsulant between the first die and the second die. The encapsulant has a first surface. The dielectric layer has a second surface adjacent to the first passivation layer, the second passivation layer and the encapsulant, and further has a third surface opposite the second surface. The semiconductor device further includes a redistribution layer electrically connected to the first pad and the second pad and disposed above the third surface of the dielectric layer.
    Type: Application
    Filed: October 6, 2016
    Publication date: January 26, 2017
    Inventors: Chung-Hsuan TSAI, Chuehan HSIEH
  • Patent number: 9484307
    Abstract: Described herein is a semiconductor device and the manufacturing method thereof, wherein the semiconductor device includes a first die including a first pad and a first passivation layer; a second die including a second pad and a second passivation layer; an encapsulant surrounding the first die and the second die and comprising a first surface; a dielectric layer covering at least a portion of the first passivation layer and at least a portion of the second passivation layer, and further covering the encapsulant between the first die and the second die, wherein the dielectric layer includes: a second surface adjacent to the first passivation layer, the second passivation layer and the encapsulant; and a third surface opposite to the second surface; and a redistribution layer electrically connecting to the first pad and the second pad and disposed above the third surface of the dielectric layer.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: November 1, 2016
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chung-Hsuan Tsai, Chuehan Hsieh
  • Publication number: 20160218063
    Abstract: Described herein is a semiconductor device and the manufacturing method thereof, wherein the semiconductor device includes a first die including a first pad and a first passivation layer; a second die including a second pad and a second passivation layer; an encapsulant surrounding the first die and the second die and comprising a first surface; a dielectric layer covering at least a portion of the first passivation layer and at least a portion of the second passivation layer, and further covering the encapsulant between the first die and the second die, wherein the dielectric layer includes: a second surface adjacent to the first passivation layer, the second passivation layer and the encapsulant; and a third surface opposite to the second surface; and a redistribution layer electrically connecting to the first pad and the second pad and disposed above the third surface of the dielectric layer.
    Type: Application
    Filed: January 26, 2015
    Publication date: July 28, 2016
    Inventors: Chung-Hsuan TSAI, Chuehan HSIEH
  • Patent number: 8803852
    Abstract: A touch input device includes a touch pad and a switch. The touch pad has a floating side. The switch is positioned on the touch pad. The floating side is permitted to move down to enable the switch to generate input commands when a pressure is exerted on the floating side.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: August 12, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Chung-Hsuan Tsai, Chun-Chung Chen
  • Patent number: 8549548
    Abstract: A disc tray for a printing device includes a driving mover including a first guiding portion; a main body including a disc receiver having a holding portion and a sloping portion connected with each other, a second guiding portion engaged with the first guiding portion, and a third guiding portion, with the driving mover driving the main body by way of the first guiding portion and the second guiding portion to move the main body; and a supporter including a fourth guiding portion engaged with the third guiding portion to allow the fourth guiding portion to move along the third guiding portion. The supporter and the holding portion are used to support a printed disc. When the disc receiver receives the printed disc, the supporter is moved to be veiled under the main body for dropping the printed disc from the sloping portion of the disc receiver.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: October 1, 2013
    Assignee: Datatronics Technology, Inc.
    Inventors: Ming-Hsun Liu, Chung-Hsuan Tsai, Chih-Sheng Liu
  • Patent number: 8422348
    Abstract: A method for reproducing digital data and identifying the same by executing a software program stored in a memory of a computer is disclosed. The method includes: reading digital data; identifying total size of the digital data; saving the digital data as a temporary file; receiving a request for selecting at least one target medium, wherein the target medium is used for storing the digital data; determining a quantity of the target medium to be used for writing; writing the digital data into the target medium; generating a list text file and an index text file into each target medium, wherein the list text file includes information regarding to the content stored in each target medium respectively and the index text file includes information regarding to the content in all target medium; and building an index database of the digital data.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: April 16, 2013
    Assignee: Datatronics Technology, Inc.
    Inventors: Ming-Hsun Liu, Chung-Hsuan Tsai
  • Patent number: 8332880
    Abstract: An information storage disk dispensing apparatus includes a frame, a disk drive and a disk inclining member. The disk drive is connected to the frame and includes a tray. The tray includes a receiving area and has an ejected position. The disk inclining member is mounted on the frame over the receiving area of the tray when the tray is at the ejected position to incline a disk pulled by gravity to fall vertically.
    Type: Grant
    Filed: February 5, 2008
    Date of Patent: December 11, 2012
    Inventors: Ming-Hsun Liu, Chung-Hsuan Tsai
  • Publication number: 20120263028
    Abstract: A method for reproducing digital data and identifying the same by executing a software program stored in a memory of a computer is disclosed. The method includes: reading digital data; identifying total size of the digital data; saving the digital data as a temporary file; receiving a request for selecting at least one target medium, wherein the target medium is used for storing the digital data; determining a quantity of the target medium to be used for writing; writing the digital data into the target medium; generating a list text file and an index text file into each target medium, wherein the list text file includes information regarding to the content stored in each target medium respectively and the index text file includes information regarding to the content in all target medium; and building an index database of the digital data.
    Type: Application
    Filed: June 22, 2012
    Publication date: October 18, 2012
    Inventors: Ming-Hsun LIU, Chung-Hsuan Tsai