Abstract: A method for processing an integrated circuit includes forming first and second gate all around transistors. The method forms a dipole oxide in the first gate all around transistor without forming the dipole oxide in the second gate all around transistor. This is accomplished by entirely removing an interfacial dielectric layer and a dipole-inducing layer from semiconductor nanosheets of the second gate all around transistor before redepositing the interfacial dielectric layer on the semiconductor nanosheets of the second gate all around transistor.

Abstract: A semiconductor device structure is provided. The device includes one or more first semiconductor layers, each first semiconductor layer of the one or more first semiconductor layers is surrounded by a first intermixed layer, wherein the first intermixed layer comprises a first material and a second material.

Abstract: A memory device, a failure bits detector, and a failure bits detection method thereof are provided. The failure bits detector includes a current generator, a current mirror, and a comparator. The current generator generates a first current according to a reference code. The current mirror mirrors the first current to generate a second current at a second end of the current mirror. The comparator compares a first voltage at a first input end with a second voltage at a second input end to generate a detection result.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.

Abstract: A semiconductor device according to the present disclosure includes a source feature and a drain feature, a plurality of semiconductor nanostructures extending between the source feature and the drain feature, a gate structure wrapping around each of the plurality of semiconductor nanostructures, a bottom dielectric layer over the gate structure and the drain feature, a backside power rail disposed over the bottom dielectric layer, and a backside source contact disposed between the source feature and the backside power rail. The backside source contact extends through the bottom dielectric layer.

Abstract: A method of controlling movement of an autonomous mobile apparatus including a driving module, a processor, and a positioning module includes steps of: the processor moving the autonomous mobile apparatus at a default speed from a first location toward a second location along a straight path; the positioning module obtaining data related to a current location; when the processor determines that a distance between the current location and the second location is greater than a predetermined distance, the processor obtaining a deviating direction and a minimum distance of the current location relative to the straight path; the processor setting a movement speed and an angular velocity based on the deviating direction, a tolerant distance, the minimum distance, and the default speed; and the processor controlling the driving apparatus to move the autonomous mobile apparatus at the movement speed and turning the autonomous mobile apparatus at the angular velocity.

Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first channel structure configured to transport charge carriers within a first transistor device and a first gate electrode layer wrapping around the first channel structure. A second channel structure is configured to transport charge carriers within a second transistor device. A second gate electrode layer wraps around the second channel structure. The second gate electrode layer continuously extends from around the second channel structure to cover the first gate electrode layer. A third channel structure is configured to transport charge carriers within a third transistor device. A third gate electrode layer wraps around the third channel structure. The third gate electrode layer continuously extends from around the third channel structure to cover the second gate electrode layer.

Abstract: A method for forming a bonded semiconductor structure is disclosed. A first device wafer having a first bonding layer and a first bonding pad exposed from the first bonding layer and a second device wafer having a second bonding layer and a second bonding pad exposed from the second bonding layer are provided. Following, a portion of the first bonding pad is removed until a sidewall of the first bonding layer is exposed, and a portion of the second bonding layer is removed to expose a sidewall of the second bonding pad. The first device wafer and the second device wafer are then bonded to form a dielectric bonding interface between the first bonding layer and the second bonding layer and a conductive bonding interface between the first bonding pad and the second bonding pad. The conductive bonding interface and the dielectric bonding interface comprise a step-height.

Abstract: A transistor includes an insulating layer, a source region, a drain region, a channel layer, a ferroelectric layer, and a gate electrode. The source region and the drain region are respectively disposed on and in physical contact with two opposite sidewalls of the insulating layer. A thickness of the source region, a thickness of the drain region, and a thickness of the insulating layer are substantially the same. The channel layer is disposed on the insulating layer, the source region, and the drain region. The ferroelectric layer is disposed over the channel layer. The gate electrode is disposed on the ferroelectric layer.

Abstract: A supported metallocene catalyst includes a carrier and a metallocene component. The carrier includes an inorganic oxide particle and an alkyl aluminoxane material. The inorganic oxide particle includes at least one inorganic oxide compound selected from the group consisting of an oxide of Group 3A and an oxide of Group 4A. The alkyl aluminoxane material includes an alkyl aluminoxane compound and an alkyl aluminum compound that is present in amount ranging from greater than 0.01 wt % to less than 14 wt % base on 100 wt % of the alkyl aluminoxane material. The metallocene component is supported on the carrier, and includes one of a metallocene compound containing a metal from Group 3B, a metallocene compound containing a metal from Group 4B, and a combination thereof. A method for preparing the supported metallocene catalyst and a method for preparing polyolefin using the supported metallocene catalyst are also disclosed.

Abstract: A motherboard module is adapted for an M.2 expansion card to configure. The M.2 expansion card includes a connecting end and a fixing end. An edge of the fixing end has a semi-circular hole. The motherboard module includes a motherboard body, a locking member, and an abutting member. The motherboard body includes an expansion card slot, a first fixing hole, and a second fixing hole. The locking member is detachably fixed in the first fixing hole. The abutting member has a first end and a second end. The first end is detachably fixed in the second fixing hole. When the M.2 expansion card is installed on the motherboard module, the abutting member is located between the M.2 expansion card and the motherboard body, and the second end abuts against the M.2 expansion card. An electronic device is further provided.

Abstract: A motherboard module is adapted for an M.2 expansion card to configure. The M.2 expansion card includes a connecting end and a fixing end. An edge of the fixing end has a semi-circular hole. The motherboard module includes a motherboard body, a locking member, and an abutting member. The motherboard body includes an expansion card slot, a first fixing hole, and a second fixing hole. The locking member is detachably fixed in the first fixing hole. The abutting member has a first end and a second end. The first end is detachably fixed in the second fixing hole. When the M.2 expansion card is installed on the motherboard module, the abutting member is located between the M.2 expansion card and the motherboard body, and the second end abuts against the M.2 expansion card. An electronic device is further provided.

Abstract: A memory socket protecting cover adapted to be assembled to a memory socket which is adapted for a memory module to insert is provided. The memory module includes a fool-proof concave, and includes a fool-proof member corresponding to the fool-proof concave. The memory socket protecting cover includes two lateral walls and a wear-resistant member. The two lateral walls are adapted to be disposed at two sides of the memory socket. The wear-resistant member is connected to the two lateral walls and adapted to be disposed on the fool-proof member. A width of the wear-resistant member is greater than or equal to a width of the fool-proof member and is smaller than a width of the fool-proof concave. When the memory module is inserted in or pulled from the memory socket, a wall of the memory module besides the fool-proof concave is adapted to contact the wear-resistant member.

Abstract: Provided is a slurry composition including abrasive particles, halogen oxide, and nitroxide compound. The combination of halogen oxide and nitroxide compound has a synergistic effect to remove a substrate containing tungsten and silicon oxide. Moreover, a use of the slurry composition and a polishing method using the slurry composition are provided.

Abstract: An electronic device adapted for an expansion card is provided. The electronic device includes a main board and a light guide heat dissipation module. The main board includes a connector and a light source disposed beside the connector. The light guide heat dissipation module is detachably disposed on a position of the main board near the connector and is adapted to be thermally coupled to the expansion card inserted in the connector. The light guide heat dissipation module includes a first heat dissipation member, a second heat dissipation member thermally coupled to the first heat dissipation member, and a first light guide member disposed between the first heat dissipation member and the second heat dissipation member. The first heat dissipation member includes an opening, and the opening exposes a portion of the first light guide member.

Abstract: An electronic device adapted for an expansion card is provided. The electronic device includes a main board and a light guide heat dissipation module. The main board includes a connector and a light source disposed beside the connector. The light guide heat dissipation module is detachably disposed on a position of the main board near the connector and is adapted to be thermally coupled to the expansion card inserted in the connector. The light guide heat dissipation module includes a first heat dissipation member, a second heat dissipation member thermally coupled to the first heat dissipation member, and a first light guide member disposed between the first heat dissipation member and the second heat dissipation member. The first heat dissipation member includes an opening, and the opening exposes a portion of the first light guide member.

Abstract: Provided is a slurry composition including abrasive particles, halogen oxide, and nitroxide compound. The combination of halogen oxide and nitroxide compound has a synergistic effect to remove a substrate containing tungsten and silicon oxide. Moreover, a use of the slurry composition and a polishing method using the slurry composition are provided.

Abstract: A connector module including a connector and a heatsink is provided. The connector includes a shaft. The heatsink includes a groove recessed in a single direction. The heatsink is adapted to move along a direction opposite to the recessed direction of the groove to insert the shaft into the groove. The shaft is pivoted in the groove so that the heatsink is adapted to pivotally rotate relative to the connector.

Abstract: An interface card fixing device adapted to fix an interface card to a main board is provided. The interface card fixing device includes a base, a fixing portion, an engaging portion and a connecting portion. The base includes a first surface and a second surface opposite to each other and a protrusion protruding from the first surface. The base has a through hole passing through the first surface, the second surface and the protrusion so that the protrusion forms a hollow cylinder. The fixing portion extends from the second surface of the base and includes a breach communicating with the through hole. The engaging portion is adapted to pass through the through hole and the breach, and fix to the base. The connecting portion is connected to the base and the engaging portion. A main board module having the interface card fixing device is further provided.